JPS60132044U - wireless receiver - Google Patents

wireless receiver

Info

Publication number
JPS60132044U
JPS60132044U JP1984018032U JP1803284U JPS60132044U JP S60132044 U JPS60132044 U JP S60132044U JP 1984018032 U JP1984018032 U JP 1984018032U JP 1803284 U JP1803284 U JP 1803284U JP S60132044 U JPS60132044 U JP S60132044U
Authority
JP
Japan
Prior art keywords
circuit
received signal
noise squelch
wireless receiver
detects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984018032U
Other languages
Japanese (ja)
Inventor
実 神田
安彦　利夫
邦治 竪月
和博 本田
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP1984018032U priority Critical patent/JPS60132044U/en
Publication of JPS60132044U publication Critical patent/JPS60132044U/en
Pending legal-status Critical Current

Links

Landscapes

  • Transceivers (AREA)
  • Noise Elimination (AREA)
  • Circuits Of Receivers In General (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の実施例の構成図、第２図は同上のブロ
ック回路図、第３図は同上のノイズスケルチの具体回路
図、第４図は同上の特性図である。 ３はアンテナ、５は送信回路部、６は復調回路、７はス
ピーカ、８は低周波増幅回路、９はノイズスケルチ回路
、１１は電源部、１２は急速充電回路、Ｃ１はコンデン
サーを示す。FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block circuit diagram of the same, FIG. 3 is a specific circuit diagram of the noise squelch described above, and FIG. 4 is a characteristic diagram of the same. 3 is an antenna, 5 is a transmitter circuit, 6 is a demodulation circuit, 7 is a speaker, 8 is a low frequency amplifier circuit, 9 is a noise squelch circuit, 11 is a power supply section, 12 is a quick charging circuit, and C1 is a capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アンテナを介して受信した受波信号を復調する復調回路
と、復調回路からの出力信号をスピーカにて出力する低
周波増幅回路と、復調回路からの受信信号を検出するノ
イズスケルチ回路とからなる受信回路部と、ノイズスケ
ルチ回路からの受信信号の検知出力による各回路への電
源供給を間欠駆動から全駆動に行う電源部とを具備し、
受信信号の検知出力を検知するコンデンサーを電源供給
時の立ち上がりから検知感度レベルまで急速充電する急
速充電回路をノイズスケルチ回路に付設して成るワイヤ
レス受信機。Receiving consists of a demodulation circuit that demodulates the received signal received via the antenna, a low frequency amplification circuit that outputs the output signal from the demodulation circuit to a speaker, and a noise squelch circuit that detects the received signal from the demodulation circuit. It is equipped with a circuit section and a power supply section that supplies power to each circuit from intermittent drive to full drive based on the detection output of the received signal from the noise squelch circuit,
A wireless receiver consisting of a noise squelch circuit and a quick charging circuit that rapidly charges a capacitor that detects the detection output of a received signal from the time of power supply to the detection sensitivity level.
JP1984018032U 1984-02-10 1984-02-10 wireless receiver Pending JPS60132044U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984018032U JPS60132044U (en) 1984-02-10 1984-02-10 wireless receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984018032U JPS60132044U (en) 1984-02-10 1984-02-10 wireless receiver

Publications (1)

Publication Number Publication Date
JPS60132044U true JPS60132044U (en) 1985-09-04

Family

ID=30506288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984018032U Pending JPS60132044U (en) 1984-02-10 1984-02-10 wireless receiver

Country Status (1)

Country Link
JP (1) JPS60132044U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015149624A (en) * 2014-02-06 2015-08-20 アイコム株式会社 Power saving circuit for radio device, and radio device having power saving circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015149624A (en) * 2014-02-06 2015-08-20 アイコム株式会社 Power saving circuit for radio device, and radio device having power saving circuit

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