JPS60132047U - wireless transceiver - Google Patents

wireless transceiver

Info

Publication number
JPS60132047U
JPS60132047U JP1984018033U JP1803384U JPS60132047U JP S60132047 U JPS60132047 U JP S60132047U JP 1984018033 U JP1984018033 U JP 1984018033U JP 1803384 U JP1803384 U JP 1803384U JP S60132047 U JPS60132047 U JP S60132047U
Authority
JP
Japan
Prior art keywords
circuit
signal
power
output
antenna
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984018033U
Other languages
Japanese (ja)
Inventor
豊 小川
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP1984018033U priority Critical patent/JPS60132047U/en
Publication of JPS60132047U publication Critical patent/JPS60132047U/en
Pending legal-status Critical Current

Links

Landscapes

  • Circuits Of Receivers In General (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Transceivers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例のブロック図、第2図は同上の
基本となる回路の具体回路図、第3図は同上の特性図、
第4図は同上の具体回路図、第、5図は同上のタイムチ
ャートである。 1はマイクロフォン、2は変調回路、3はアンテナ、4
は出力回路、5は送信回路部、6は復調   。 回路、7はスピーカ、′8は低周波増幅回路、9はノイ
ズスケルチ回路、10は受信′回路部、11はコントロ
ール回路、12は急速充電回路、19は電池、20はア
クティブフィルタ、Coはコンデンサを示す。 叫ff1M1B  1m@− 三 /19 ≧       14    \ −少
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a specific circuit diagram of the basic circuit of the above, Fig. 3 is a characteristic diagram of the same,
FIG. 4 is a specific circuit diagram of the same as above, and FIGS. 5 and 5 are time charts of same as above. 1 is a microphone, 2 is a modulation circuit, 3 is an antenna, 4
5 is the output circuit, 5 is the transmitter circuit, and 6 is the demodulator. circuit, 7 is a speaker, 8 is a low frequency amplifier circuit, 9 is a noise squelch circuit, 10 is a reception circuit, 11 is a control circuit, 12 is a quick charging circuit, 19 is a battery, 20 is an active filter, Co is a capacitor shows. Shout ff1M1B 1m@- 3/19 ≧ 14 \ -small

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロフォンからの入力信号を変調する変調回路と、
変調回路からの信号をアンテナを介して送波する出力回
路とから成る送信回路部と、上記アンテナを介して受信
した受波信号を復調する復調回路と、復調回路からの出
力信号をスピーカにて出力する低周波増幅回路と、アン
テナからの呼び出し信号を検出するノイズスケルチ回路
とからなる受信回路部と、ノイズスケルチ回路からの呼
び出し信号の検知出力による各回路への電源供給−を間
欠駆動から全駆動に行う電池を有する電源部とを具備し
、双方向同時通話が可能なワイヤレス送受信機において
、前記復調回路からのノイズ成分を増幅するアクティブ
フィルタと、アクティブフィルタからの出力をローピー
クホールドするコンデンサと、電源印加時にコンデンサ
にホールド電圧と比較すべく任意の感度レベル以上まで
急速充電回路と、コンデンサを急速充電した後に任意の
感度レベルにまで急速放電させる急速放電手段とでノイ
ズスケルチ回路を構成し、ノイズスケルチ回路からの出
力信号の有無を、電源印加時点から電源印加終了直前に
検知して電源の間欠駆動乃至全駆動に制御するコントロ
ール回路を設けて成ることを特徴とするワイヤレス送受
信機。
a modulation circuit that modulates the input signal from the microphone;
A transmitter circuit section includes an output circuit that transmits the signal from the modulation circuit via the antenna, a demodulation circuit that demodulates the received signal received via the antenna, and a speaker that outputs the output signal from the demodulation circuit. The receiving circuit consists of a low-frequency amplification circuit that outputs, a noise squelch circuit that detects the calling signal from the antenna, and the power supply to each circuit by the detection output of the calling signal from the noise squelch circuit. In a wireless transmitter/receiver equipped with a power supply section having a battery for driving and capable of simultaneous two-way communication, an active filter that amplifies noise components from the demodulation circuit, and a capacitor that holds the output from the active filter at a low peak. A noise squelch circuit is constructed of a circuit that quickly charges the capacitor to a given sensitivity level or above in order to compare it with a hold voltage when power is applied, and a quick discharge means that quickly charges the capacitor and then quickly discharges it to a given sensitivity level. A wireless transmitter/receiver comprising: a control circuit that detects the presence or absence of an output signal from a noise squelch circuit from the time when power is applied to immediately before the end of power application, and controls the power from intermittent drive to full drive.
JP1984018033U 1984-02-10 1984-02-10 wireless transceiver Pending JPS60132047U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984018033U JPS60132047U (en) 1984-02-10 1984-02-10 wireless transceiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984018033U JPS60132047U (en) 1984-02-10 1984-02-10 wireless transceiver

Publications (1)

Publication Number Publication Date
JPS60132047U true JPS60132047U (en) 1985-09-04

Family

ID=30506290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984018033U Pending JPS60132047U (en) 1984-02-10 1984-02-10 wireless transceiver

Country Status (1)

Country Link
JP (1) JPS60132047U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5547742A (en) * 1978-10-02 1980-04-04 Fujitsu General Ltd Radio communication unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5547742A (en) * 1978-10-02 1980-04-04 Fujitsu General Ltd Radio communication unit

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