JPS5866744U - receiving device - Google Patents

receiving device

Info

Publication number
JPS5866744U
JPS5866744U JP1981161355U JP16135581U JPS5866744U JP S5866744 U JPS5866744 U JP S5866744U JP 1981161355 U JP1981161355 U JP 1981161355U JP 16135581 U JP16135581 U JP 16135581U JP S5866744 U JPS5866744 U JP S5866744U
Authority
JP
Japan
Prior art keywords
receiving device
signal
resistor
oscillator
low frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1981161355U
Other languages
Japanese (ja)
Other versions
JPS628604Y2 (en
Inventor
前川 義一
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP1981161355U priority Critical patent/JPS5866744U/en
Publication of JPS5866744U publication Critical patent/JPS5866744U/en
Application granted granted Critical
Publication of JPS628604Y2 publication Critical patent/JPS628604Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Transceivers (AREA)
  • Noise Elimination (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の装置の構成図、第2図は本考案の一例の
構成図、第3図は他の例の構成図である。 19は可変抵抗器、20は抵抗器、21は低周波アンプ
、32はスケルチ用ダイオード、33は発振器である。 第1図 Y/−l &1
FIG. 1 is a block diagram of a conventional device, FIG. 2 is a block diagram of an example of the present invention, and FIG. 3 is a block diagram of another example. 19 is a variable resistor, 20 is a resistor, 21 is a low frequency amplifier, 32 is a squelch diode, and 33 is an oscillator. Figure 1 Y/-l &1

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 受信信号のレベルを検出し、この検出信号にて検波信号
のスケルチを行うと共に、スタンバイ時に受信を表示す
る信号の発振器を制御するようにした受信装置において
、音量ボリュームの可動子を抵抗器を介して低周波アン
プに接続し、この抵抗器と低周波アンプとの間に上記発
振器の出力を接続するようにした受信装置。
In a receiving device that detects the level of the received signal, uses this detection signal to squelch the detected signal, and also controls the oscillator of the signal that indicates reception during standby, the volume control is controlled via a resistor. and a low frequency amplifier, and the output of the oscillator is connected between the resistor and the low frequency amplifier.
JP1981161355U 1981-10-29 1981-10-29 receiving device Granted JPS5866744U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1981161355U JPS5866744U (en) 1981-10-29 1981-10-29 receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1981161355U JPS5866744U (en) 1981-10-29 1981-10-29 receiving device

Publications (2)

Publication Number Publication Date
JPS5866744U true JPS5866744U (en) 1983-05-06
JPS628604Y2 JPS628604Y2 (en) 1987-02-27

Family

ID=29953725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1981161355U Granted JPS5866744U (en) 1981-10-29 1981-10-29 receiving device

Country Status (1)

Country Link
JP (1) JPS5866744U (en)

Also Published As

Publication number Publication date
JPS628604Y2 (en) 1987-02-27

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