JPS60128691A - Semiconductor light-emitting device - Google Patents

Semiconductor light-emitting device

Info

Publication number
JPS60128691A
JPS60128691A JP23682583A JP23682583A JPS60128691A JP S60128691 A JPS60128691 A JP S60128691A JP 23682583 A JP23682583 A JP 23682583A JP 23682583 A JP23682583 A JP 23682583A JP S60128691 A JPS60128691 A JP S60128691A
Authority
JP
Japan
Prior art keywords
layer
semiconductor layer
type
type inp
grown
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23682583A
Other languages
Japanese (ja)
Inventor
Hiroshi Ishikawa
浩 石川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23682583A priority Critical patent/JPS60128691A/en
Publication of JPS60128691A publication Critical patent/JPS60128691A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2237Buried stripe structure with a non-planar active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/24Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser

Abstract

PURPOSE:To obtain a semiconductor light-emitting device having structure, in which the rise of threshold currents is inhibited and differential quantum efficiency and temperature characteristics are improved, by forming a semiconductor layer, forbidden band width thereof is smaller than those of a substrate, a buffer layer and a current inhibiting layer, between the substrate or the buffer layer and the current inhibiting layer while being separated from a striped groove. CONSTITUTION:A layer such as an N type InGaAsP layer 22 is grown on an N type InP substrate 21, and a P type InP current inhibiting layer 23 is grown. A striped groove extending in the <011> direction of a crystal is formed through etching by a hydrochloric acid solution. The InGaAsP layer 22 is etched selectively up to a section exposed to the base of the groove and the lower layer section of the P type InP layer 23 in the vicinity of said section by using a sulfuric acid solution. A base body is thermally treated for approximately thirty min at a temperature of 600 deg.C in a hydrogen atmosphere, and N type InP grown in an air gap section from which the InGaAsP layer 22 is removed and the bottom of the groove. An N type InP clad layer 25, a non-doped InGaAsP active layer 26, a P type InP clad layer 27 and a P type InGaAsP contact layer 28 are grown in succession. A P side electrode 29 and an N side electrode 30 are formed to the base body, and cleavage is executed, thus completing an aimed element.

Description

【発明の詳細な説明】 (al 発明の技術分野 本発明は半導体発光装置、特にストライブ溝内に活性領
域か埋め込み成長される半導体発光装置の微分童子効率
及び温度特性の改善に関する。
TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor light emitting device, particularly to improving the differential efficiency and temperature characteristics of a semiconductor light emitting device in which an active region is grown embedded in a stripe groove.

(b) 技術の背景 光通信等の光を情報信号の媒体とするシステムにおいて
は半導体発光装置は最も重要な構成要素であって、要求
される波長帯域の実現、或いは安定した単一の基本零次
横モード発振、単一の縦モード発振、電流−光出力特性
の直線性の向上、量子効率の向上、出力の増大などの緒
特性の改善が重ねられて、システムの進展に寄与してい
る。
(b) Background of the technology Semiconductor light emitting devices are the most important component in systems that use light as an information signal medium, such as optical communications, and are essential for realizing the required wavelength band or for producing a stable single fundamental zero. Contributing to the advancement of the system are the repeated improvements in basic characteristics such as second-order transverse mode oscillation, single longitudinal mode oscillation, improved linearity of current-optical output characteristics, improved quantum efficiency, and increased output power. .

(C1従来技術と問題点 半導体発光装置について既に多数の構造が提供されてい
るが、その一つにVSB (V−grOovedSub
strate Buried double hete
ro−structure)レーザがある。
(C1 Prior Art and Problems Many structures have already been provided for semiconductor light emitting devices, one of which is VSB (V-grOovedSub
Strate Buried double hete
ro-structure) lasers.

第1図はVSBレーザの一例を示す断面図であるっ図に
おいて、1はn型インジウム・燐化合物(InP)基板
、3はp型InP電流阻止ノ音、4はストライプ溝、5
はn型1nl)クラッド層 5 aはクラッド層5と同
時に成長したn型InP層。
Figure 1 is a cross-sectional view showing an example of a VSB laser. In the figure, 1 is an n-type indium phosphorus compound (InP) substrate, 3 is a p-type InP current blocking sound, 4 is a stripe groove, and 5 is a cross-sectional view showing an example of a VSB laser.
is an n-type InP layer grown at the same time as the cladding layer 5.

6はノンドープのインジウム・ガリウム・砒素・燐化合
物(、I n G a、 A s P ) 活性層、5
aは活性層6と同時に成長したInGaAsp層、7は
p型■Hl)クラッド層、8はp壓■I]GaAsPコ
ンタクト層、9はp側電極、10はn ll1l寛極を
示す。
6 is a non-doped indium-gallium-arsenic-phosphorus compound (InGa, AsP) active layer; 5
a indicates an InGaAsp layer grown at the same time as the active layer 6, 7 indicates a p-type ■Hl) cladding layer, 8 indicates a p-type ■I]GaAsP contact layer, 9 indicates a p-side electrode, and 10 indicates an nlll1l tolerance pole.

本従来例の如きVS、Bレーザは、ストライプ溝4のτ
lt1表面が(111)B面であるために前記クラッド
層5.活性層6及びクラッド層7のダブルへテロ接合構
造の成長が容易であり、活性層6の形状と寸法が安定す
るなどの製造上の利点よ、溝の内部表面が結晶面である
ために極めて平滑であってこの部分からの光の乱反射が
なく、光の強度分布が滑らかであることなどの特性上の
利点とを兼ね備えている。
In the VS, B laser like this conventional example, the stripe groove 4 has a τ
Since the lt1 surface is the (111)B plane, the cladding layer 5. The double heterojunction structure of the active layer 6 and cladding layer 7 can be easily grown, and the shape and dimensions of the active layer 6 are stable. It is smooth and has the advantages of characteristics such as no diffuse reflection of light from this part and smooth light intensity distribution.

以上説明したVSBレーザの従来例については下記の問
題点がある。すなわち、前記構造のVSBレーザのスト
ライプ溝外の部分の半導体層の導電型を見れば、(イ)
 l 11 Q a A s Pコンタクト層8及びI
nP クラッド層7からなるp型頭域、(ロ)InP/
m5aからなるn型領域、(ハ)i n p電流阻止層
3からなるp型頭域、に)InP基板lからなるn型領
域が、中間のp型もしくはn型の薄いInGaAsP層
6aを含めて、pHpn 接合を両電極間に構成してい
ることが知られる。このVSBレーザに第1図において
1gで示すp型inPクラッド層7−)I) 壓I n
 P電流阻止層3−・n壓In1)基板1の径路の洩れ
電流が流れることによって、前記p田川構造は電流Ig
をゲート電流上するサイリスクとして動作し7.アノー
ド1比流に相当T6電流1aが順次ターンオンして無効
電流が増大し、レーザの温度特性の低下の原因となって
いる。
The conventional example of the VSB laser described above has the following problems. That is, if we look at the conductivity type of the semiconductor layer outside the stripe groove of the VSB laser with the above structure, (a)
l 11 Q a A s P contact layer 8 and I
p-type head region consisting of nP cladding layer 7, (b) InP/
(iii) a p-type head region consisting of the i n p current blocking layer 3; It is known that a pHpn junction is formed between both electrodes. This VSB laser is provided with a p-type inP cladding layer 7-) I) denoted by 1g in FIG.
Due to the flow of leakage current in the path of the P current blocking layer 3-・n 壓In1) substrate 1, the p Tagawa structure has a current Ig.
7. Operates as a sirisk that increases the gate current. The T6 current 1a corresponding to the anode 1 specific current is sequentially turned on, increasing the reactive current and causing a decrease in the temperature characteristics of the laser.

このp’n I) n41G造によるサイリスタ動作に
関し、で、半導体基板上にまず活性領域とすうダブルへ
ゾロ接合半導体層をエビタキ7ヤル成長し、ストライプ
部上メサ形lこ残してその両側をエソナングしてfat
を形成し、これを埋め込む半導体層を成長する埋め込6
構造のレーザにおいては、埋め込み層の外側に残された
活性層がp n p 11構造のアノード電流を抑制す
る効果を与えることが既に知られている。
Regarding the operation of the thyristor using the p'n I) n41G structure, first, an active region and a double diode junction semiconductor layer are grown on the semiconductor substrate, and then a mesa-shaped layer is left on the striped part, and both sides thereof are etsonized. And fat
Embedment 6 to form a semiconductor layer and grow a semiconductor layer to embed it.
It is already known that in a laser with a p n p 11 structure, the active layer left outside the buried layer has the effect of suppressing the anode current of the p n p 11 structure.

しかしながら前記VSBレーザの如くストライプ溝内に
活性領域を成長させる構造のレーザにおいてこれと同等
の効果を得るために、もし前記従来例に対して第2図ζ
こ示ず如<、pmInPmIn上層3の下にInPより
工不ルギーバンドギャソグの小さいJnGaASP層2
を設けるならば。
However, in order to obtain the same effect in a laser having a structure in which the active region is grown within the stripe groove, such as the VSB laser, it is necessary to
As shown below, under the pmInPmIn upper layer 3, there is a JnGaASP layer 2 with a smaller manufacturing energy band gap than InP.
If you set up.

ストライプ溝の近傍において先に説明した洩れ電流1g
が大幅に増大し、閾値電流が上昇する結果となる。この
様な閾値電流の上昇を伴うことなくpnl)n構造によ
るサイリスタ動作が抑制される構造が要望されている。
The leakage current 1g as described above near the stripe groove
significantly increases, resulting in an increase in threshold current. There is a need for a structure in which the thyristor operation due to the pnl)n structure can be suppressed without such an increase in threshold current.

(dl 発明の目的 本発明は、ストライプ溝内に活性領域が埋め込み成長さ
れる半導体発光装置について、閾値電流の上昇を抑制し
て微分量子効率と温度特性とが改善される構造を提供す
ることを目的とする。
(dl Purpose of the Invention The present invention aims to provide a structure for a semiconductor light emitting device in which an active region is embedded and grown in a stripe trench, in which the increase in threshold current is suppressed and the differential quantum efficiency and temperature characteristics are improved. purpose.

tel 発明の構成 本発明の前記目的は、第1導電型の半導体基板又は第1
の半導体層に接して第2導電型の第2の半導体層が設け
られ、該第2の半導体層を貫通するストライプ状の溝が
形成されて、該溝内に第1導電型の第3の半導体層と、
該第3の半導体層に接して該第3の半導体層より禁制帯
幅が小であり活性領域となる第4の半導体層き、該第4
の半導体層に接して該第4の半導体層より禁制帯幅が犬
である第2導電型の第5の半導体層とが設けられて、該
第5の半導体層の前記溝外に延伸する領域と前記第2の
半導体層との間に第1導電型の第6の半導体層が介在し
て、前記第2の半導体層並びに前記半導体基板もしくは
第1の半導体層より禁制帯幅が小である第7の半導体層
によって、前記溝の近傍を除いて該第2の半導体層が該
半導体基板もしくは第1−の、半導体層から隔てられて
なる半導体発光装置により達成される、 すなわち本発明の半導体発光装置には、何れも第1導電
型の半導体基板又はバッファ層と2ストライプ溝外に第
1のクラッド層と同時に成長した前記第6の半纏体層と
の間に第2導電型の電流阻止層があり、第6の半導体層
上船こ第24電型の第2のり2ノド層の延伸部分があっ
て、pnpn構造が含まれることは従来のVSBレーザ
と同様である。
tel Structure of the Invention The object of the present invention is to provide a first conductivity type semiconductor substrate or a first conductivity type semiconductor substrate.
A second semiconductor layer of a second conductivity type is provided in contact with a semiconductor layer of the second conductivity type, a stripe-shaped groove penetrating the second semiconductor layer is formed, and a third semiconductor layer of the first conductivity type is formed in the groove. a semiconductor layer;
a fourth semiconductor layer that is in contact with the third semiconductor layer and has a smaller forbidden band width than the third semiconductor layer and serves as an active region;
a fifth semiconductor layer of a second conductivity type whose forbidden band width is narrower than that of the fourth semiconductor layer in contact with the semiconductor layer, and a region extending outside the groove of the fifth semiconductor layer; A sixth semiconductor layer of the first conductivity type is interposed between the semiconductor layer and the second semiconductor layer, and has a smaller forbidden band width than the second semiconductor layer, the semiconductor substrate, or the first semiconductor layer. achieved by a semiconductor light emitting device in which the second semiconductor layer is separated from the semiconductor substrate or the first semiconductor layer by the seventh semiconductor layer, except in the vicinity of the groove, that is, the semiconductor of the present invention In each of the light emitting devices, a current blocking layer of the second conductivity type is provided between the semiconductor substrate or buffer layer of the first conductivity type and the sixth semi-integrated layer grown simultaneously with the first cladding layer outside the two-stripe groove. It is similar to the conventional VSB laser in that there is a sixth semiconductor layer on top of the second semiconductor layer, an extended portion of the second layer of the 24th voltage type, and a pnpn structure.

本発明の半導体発光装置は、ストライプ溝から離隔して
、半導体基板又はバッファ層と電流阻止層との間(ここ
れらより禁制帯幅が小さい前記第7の半導体層が設けら
れていることを特徴とする。
The semiconductor light emitting device of the present invention is characterized in that the seventh semiconductor layer is provided between the semiconductor substrate or the buffer layer and the current blocking layer (where the forbidden band width is smaller than that of the seventh semiconductor layer), spaced apart from the stripe groove. shall be.

なおこの第7の半導体層の導′亀型はp、n何れでもよ
い。
Note that the conductive turtle type of this seventh semiconductor layer may be either p or n.

第7の半導体層がこれより禁制帯幅が大きい第1及び第
2の半導体層に挾まれるために、電子又は正孔がこの第
7の半纏体層に閉じ込められてサイリスク動作のターン
スーンが阻止される。
Since the seventh semiconductor layer is sandwiched between the first and second semiconductor layers having a larger forbidden band width, electrons or holes are confined in this seventh semi-integrated layer and the turn-soon of the silice operation is caused. thwarted.

しかしながら第7の半導体層かストライプ溝に当接する
ならば活性領域からこの第7の半纏体層までの距離が小
さく、従って第7の半導体層と第1もしくは第2の半導
体層との間に形成されるpH接合までに介在する抵抗が
低く、このpn接合を通る洩れ電流、すなわち閾値電流
の増大が著しくなる。この閾値電流の増大を抑制するた
めに第7の半導体層をストライプ溝から離隔する。良に
禁制帯幅が小さい第7の半導体層と第1もしくは第2の
半導体層との間に形成されるpn接合は、第1の半導体
層と第2の半導体層との間に形成されるpn接合に比較
して、第2のクラッド層内の電圧上昇ΔVに対する電流
の増加ΔIの比率△■/Δ■が減少する特性をもつため
に、第7の半導体層を設けないストライプ溝近傍におけ
る洩れ電流の増加を抑制する効果をもち、電流を増大し
たときの光出力の飽和と、温度が上昇するときの特性の
劣化を抑制する効果が得られる。
However, if the seventh semiconductor layer is in contact with the striped groove, the distance from the active region to the seventh semi-integrated layer is small, and therefore the distance between the seventh semiconductor layer and the first or second semiconductor layer is small. Since the resistance present up to the pH junction is low, the leakage current passing through this pn junction, that is, the threshold current increases significantly. In order to suppress this increase in threshold current, the seventh semiconductor layer is separated from the stripe trench. A pn junction formed between the seventh semiconductor layer and the first or second semiconductor layer, which preferably has a small forbidden band width, is formed between the first semiconductor layer and the second semiconductor layer. Compared to a pn junction, the ratio Δ■/Δ■ of the current increase ΔI to the voltage increase ΔV in the second cladding layer decreases. It has the effect of suppressing an increase in leakage current, and the effect of suppressing saturation of optical output when the current is increased and deterioration of characteristics when the temperature rises can be obtained.

(f) 発明の実施例 以下本発明を実施例により図面を参照して具体的に説明
する。
(f) Embodiments of the Invention The present invention will be specifically described below by way of embodiments with reference to the drawings.

第3図は本発明の第1の実施例を示す断面図でアル。図
において、21i;Ln型InP基板、22Ltn型又
はpmのInGaASP層、23はp型)nP電流阻止
層、25はn型InP クラッド層、25aもn型In
Pノ飢 26はノンドープの1nGaA8P活性層、2
6aもこれと同等r、zInGaASP層。
FIG. 3 is a sectional view showing the first embodiment of the present invention. In the figure, 21i is an Ln-type InP substrate, 22 is an InGaASP layer of Ltn-type or pm, 23 is a p-type (nP) current blocking layer, 25 is an n-type InP cladding layer, and 25a is also an n-type InP layer.
P starvation 26 is a non-doped 1nGaA8P active layer, 2
6a is also the same r, zInGaASP layer.

27はp型111P re、 28はp型工nQaAs
pコンタクト層、29はp側電極、30はn側電極を示
す。
27 is p-type 111P re, 28 is p-type nQaAs
The p-contact layer, 29 is a p-side electrode, and 30 is an n-side electrode.

本実施例は7例えば不純物濃1jt2 X 10is 
(m−3〕 程度のn mI n P基板21上に、基
板及び電流阻止層23を構成するInPよりエイ・ルギ
ーバンドギャップが小さい材料である例えば活性層26
と同等の組成比のInGaASPを、不純物濃度5 X
 10” (、x−” )程度のn型として厚さ0.2
〔μm〕程度に成長し、ストライプ溝が形成される領域
近傍の部分を選択的に除去して第3図に示す層22を設
けさらに層23を成長することにより、以降の製造工程
については先に述べた従来例と同様の製造方法によって
製造することができる。ただし、InGaABP層22
は、その導電型がp型であってもよく、不純物濃度及び
厚さの自由度も大きい。
In this example, 7, for example, impurity concentration 1jt2 x 10is
(m-3) On the n mI n P substrate 21 of about 100 nm, for example, an active layer 26 made of a material having a smaller energy bandgap than InP constituting the substrate and the current blocking layer 23 is formed.
InGaASP with a composition ratio equivalent to
The thickness is 0.2 as an n-type of about 10"(,x-").
The layer 22 shown in FIG. 3 is formed by selectively removing the area near the area where the stripe grooves are to be formed, and further growing the layer 23. It can be manufactured by the same manufacturing method as the conventional example described in . However, InGaABP layer 22
The conductivity type may be p-type, and there is a large degree of freedom in terms of impurity concentration and thickness.

前記製造方法によれば半導体層の成長が3回に分割され
るが、第4図(a)乃至(dlに工程順断面図を例示す
る製造方法によれば半導体層の成長工程数を従来方法と
同じ(2回とすることが可能である。
According to the manufacturing method described above, the growth of the semiconductor layer is divided into three steps, but according to the manufacturing method whose step-by-step cross-sectional views are illustrated in FIGS. Same as (possibly twice).

すなわち2本第2の実施例においては、n型inP基板
21上に例えばn型のInGaASP層22を成長し、
続い°?l−p型InP電流阻止層23を例えば不純物
濃度2x10 Ccm 〕、厚さ1.5 (μm)程度
に成長する。次いで結晶の<011>方向に伸びるスト
ライプ溝を塩酸(ltict)系溶液によるエツテング
によって形成する。このストライプ溝の断面形状は逆台
形となり、斜面は(111) B面である。(第4図(
a)参照) 続いて硫酸(H2SO4)系溶液を用いC2前記溝の底
面に表出する部分のみならすその近傍のp凰InP7m
23の下層となっている部分まで、■nGaASP層2
2を選択約22ツテングする。(第4図(b)参照) 次いで前記半導体基体に、水素(H2)雰囲気中で温度
600Co)程度の加熱処理を30分間程度実施する。
That is, in the second embodiment, for example, an n-type InGaASP layer 22 is grown on an n-type inP substrate 21,
Continuation°? The l-p type InP current blocking layer 23 is grown to, for example, an impurity concentration of 2×10 Ccm and a thickness of about 1.5 (μm). Next, stripe grooves extending in the <011> direction of the crystal are formed by etching with a hydrochloric acid (ltic) solution. The cross-sectional shape of this stripe groove is an inverted trapezoid, and the slope is a (111) B plane. (Figure 4 (
(See a)) Next, using a sulfuric acid (H2SO4) solution, remove only the portion exposed on the bottom of the C2 groove and the vicinity thereof.
■ nGaASP layer 2 up to the lower layer of 23
Select 2 and spend about 22 minutes. (See FIG. 4(b)) Next, the semiconductor substrate is subjected to heat treatment in a hydrogen (H2) atmosphere at a temperature of about 600 Co for about 30 minutes.

この加熱処理による物質移動(masstranspo
rt )現象によって、先にI n G aAsPIt
j 22が選択的に除去された空隙部分及び溝の底部に
n型InPが成長する。このn型InP領域を24とす
る。(第4図(C1参照) しかる後に、従来技術によって、不純物濃度が例えは2
XlO(tM )程度のn 型工n pクラッド層25
と、厚さ例えば0.15Cμm〕程朋のノンドープのl
 n G a A s P活性層26と、不純物濃度が
例えは5X10(−+++J程度のp型Ir1P クラ
ッド層27と、不純物濃度が例えは1x10 〔α 〕
;1UcJpWInGaAsPコンタクト層28とを順
次成長する。
Mass transfer due to this heat treatment
rt ) phenomenon, I n GaAsPIt first
n-type InP grows in the void where j 22 has been selectively removed and in the bottom of the groove. This n-type InP region is designated as 24. (See Figure 4 (C1)) After that, by using the conventional technology, the impurity concentration is reduced to 2, for example.
N-type np cladding layer 25 of about XlO (tM)
and the thickness is, for example, 0.15 Cμm] Chengho's non-doped l
The n Ga As P active layer 26 and the p-type Ir1P cladding layer 27 with an impurity concentration of, for example, 5×10 (-+++J), the impurity concentration of, for example, 1×10 [α]
; 1UcJpWInGaAsP contact layer 28 is sequentially grown.

この半導体基体eこ従来技術によって、1)側電極29
、n側電極30を設(力臂開等を行なって本実施例の素
子が完成する。(第4図(d)参照)以上説明した本発
明の第2の実施例と、これと同等の構成で本発明の特徴
とする禁制帯幅が小さい層を設けない従来例のVSBレ
ーサとについて電流−光出力特性を第5図に例示する。
By this conventional technology, 1) the side electrode 29
, the n-side electrode 30 is installed (by force opening, etc., the device of this example is completed. (See FIG. 4(d)). FIG. 5 illustrates the current-optical output characteristics of a conventional VSB laser in which the structure does not include a layer with a narrow forbidden band width, which is a feature of the present invention.

ただし。however.

実線Aは本実施例、破線Bは比較する従来例を斤し2周
囲温度25(’O)もしくは50(’O)を()内に示
す。
The solid line A represents the present embodiment, and the broken line B represents the conventional example for comparison, and the ambient temperature of 25 ('O) or 50 ('O) is shown in parentheses.

先ζこ説明した如〈従来例においては、印加′電圧を上
昇し電流を増加させるとき無効電流か次第にその比率を
高めて、光出力特性曲線は下方に湾曲する。この無効電
流増加の大きい要因はpnpH構造のサイリスタ動作で
あるが2周囲温度が上昇すればこの量子効率の低下が甚
だしく lzる。
As explained above, in the conventional example, when the applied voltage is increased and the current is increased, the ratio of the reactive current is gradually increased, and the optical output characteristic curve is curved downward. A major factor in this increase in reactive current is the operation of the thyristor of the pnpH structure, but if the ambient temperature rises, this decrease in quantum efficiency will become significant.

本発明によれば閾値電流は従来例に比較して増大するが
、電流を増加させるときに無効電流の増加が僅少であっ
て微分量子効率が大きく光出力特性曲線はほぼ直線とな
り、従来例をこえる出力の増大が達成される。この効果
は特に周囲温度が尚い場合に太きい。
According to the present invention, the threshold current increases compared to the conventional example, but when the current is increased, the increase in reactive current is small, the differential quantum efficiency is large, and the optical output characteristic curve becomes almost a straight line, which is better than the conventional example. A significant increase in power output is achieved. This effect is particularly strong when the ambient temperature is still low.

(g) 発明の詳細 な説明した如く本発明によれは、ストライプ溝内に活性
領域が埋め込み成長される半導体発光装置の微分量子効
率及び温度特性が改善されて。
(g) As described in detail, the present invention improves the differential quantum efficiency and temperature characteristics of a semiconductor light emitting device in which an active region is buried and grown in a striped trench.

光出力の増大が達成される。An increase in light output is achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はV’ S Bレーザの従来例を示す断面図。 第2図はその改善試案の例を示す断面図、第3図は本発
明の実施例を示す断面図、第4図(a)乃至((1)は
本発明の他の実施例を示す工程順断面図、第5図は′耐
流−光出力特性の例を示す図である。 図において、21はn型Jnp基板、22はI nQa
ASP層、23はp型InP層、25及び25aはn型
InP層、26はInGaASP活性層、27はp型I
nP層、28はp型Ir1GaASPI頼、29はn側
電極、30はn側電極を示す。 第 1 図 9 第 3 図 2.9 第 4 月 扼 4 図 (シ) 第 5 図 (克 [n A]
FIG. 1 is a sectional view showing a conventional example of a V'SB laser. Fig. 2 is a cross-sectional view showing an example of an improvement plan, Fig. 3 is a cross-sectional view showing an embodiment of the present invention, and Fig. 4 (a) to (1) are process steps showing other embodiments of the present invention. The forward sectional view and FIG. 5 are diagrams showing an example of 'current resistance-light output characteristics. In the figure, 21 is an n-type Jnp substrate, 22 is an InQa
ASP layer, 23 is a p-type InP layer, 25 and 25a are n-type InP layers, 26 is an InGaASP active layer, 27 is a p-type I
28 is a p-type Ir1GaASPI layer, 29 is an n-side electrode, and 30 is an n-side electrode. Fig. 1 Fig. 9 Fig. 3 Fig. 2.9 Fig. 4 Fig. 4 (shi) Fig. 5 (katsu [n A]

Claims (1)

【特許請求の範囲】 第14電型の半導体基板又は第1の半導体層fこ接して
第24電型の第2の半導体層が設けられ。 該第2の半導体層を貫通するストライプ状の溝が形成さ
れて、該溝内に第1導電型の第3の半導体層と、該第3
の半導体層に接して該第3の半導体層より禁制帯幅が小
であり活性領域となる第4の半導体層と、該第4の半導
体層に接して該第4の半導体層より禁制帯幅が犬である
第24電型の第5の半導体層とが設けられて、該第5の
半導体層の前記溝外に延伸する領域と前記第2の半導体
層との間に第1導電型の第6の半導体層が介在して、前
記第2の半導体層並びに前記半導体基板もしくは第1の
半導体層より禁制帯幅が小である第7の半導体層によっ
て、前記溝の近傍を除いて該第2の半導体層が該半導体
基板もしくは第1の半導体層から隔てられてrlること
を特徴とする半導体発光装置。
Claims: A second semiconductor layer of a 24th voltage type is provided in contact with a semiconductor substrate of a 14th voltage type or a first semiconductor layer f. A striped groove penetrating the second semiconductor layer is formed, and a third semiconductor layer of the first conductivity type is formed in the groove.
a fourth semiconductor layer that is in contact with the semiconductor layer and has a smaller forbidden band width than the third semiconductor layer and serves as an active region; is provided with a fifth semiconductor layer of a 24th conductivity type, and a fifth semiconductor layer of a first conductivity type is provided between a region of the fifth semiconductor layer extending outside the groove and the second semiconductor layer. A sixth semiconductor layer is interposed between the second semiconductor layer and a seventh semiconductor layer whose forbidden band width is smaller than that of the semiconductor substrate or the first semiconductor layer. A semiconductor light emitting device characterized in that a second semiconductor layer is separated from the semiconductor substrate or the first semiconductor layer.
JP23682583A 1983-12-15 1983-12-15 Semiconductor light-emitting device Pending JPS60128691A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23682583A JPS60128691A (en) 1983-12-15 1983-12-15 Semiconductor light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23682583A JPS60128691A (en) 1983-12-15 1983-12-15 Semiconductor light-emitting device

Publications (1)

Publication Number Publication Date
JPS60128691A true JPS60128691A (en) 1985-07-09

Family

ID=17006336

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23682583A Pending JPS60128691A (en) 1983-12-15 1983-12-15 Semiconductor light-emitting device

Country Status (1)

Country Link
JP (1) JPS60128691A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4758535A (en) * 1986-05-31 1988-07-19 Mitsubishi Denki Kabushiki Kaisha Method for producing semiconductor laser
CN100377452C (en) * 2006-05-18 2008-03-26 中微光电子(潍坊)有限公司 Ultra-short cavity semiconductor laser and preparing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4758535A (en) * 1986-05-31 1988-07-19 Mitsubishi Denki Kabushiki Kaisha Method for producing semiconductor laser
CN100377452C (en) * 2006-05-18 2008-03-26 中微光电子(潍坊)有限公司 Ultra-short cavity semiconductor laser and preparing method thereof

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