JPS60126979A - Video signal processor - Google Patents

Abstract

PURPOSE:To prevent the overlap of pictures by detecting the difference between pictures of the 1st and 2nd fields and then producing a signal of one field form the signal of the other field by interpolation in case it is decided based on the detection information that a big difference is produced between pictures of both fields. CONSTITUTION:A microcomputer 5 transfers successively the data {L1...L263} of the 1st field to the store addresses M1...M525 for the 1st field of a line memory 3 and at the same time calculates the mean value among data. The results of these calculations are also transferred to the store addresses M2...M524 for the 2nd field of the memory 3. A deciding circuit 15 decides an equation I and delivers ''1'' and ''0'' to the computer 5 with an equation (a) and (b), respectively. Then the computer 5 transfers the data on L264 to the address M2 of the memory 3 with output ''1'' to replace with the mean value (L1+L2)/2, i.e., the contents of the address M2 where the data is already stored. While the data L264 is not transferred to the memory 3 in case the decision output is equal to ''0''.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a video signal processing device that forms still image image data from a video signal for one frame.

[Background of prior art and invention]

In recent years, there has been active development of video printers that obtain still image data from video signals and form still images. Examples of conventional video printers include those shown in FIGS. 1 to 3. FIG. 1 is a block diagram showing the circuit configuration of a one-frame video printer. 1 in the figure is, for example, R, G
This is a video signal interface into which video image signals including H color signals and synchronization signals are input.The signals are synchronized here, γ conversion and color correction are performed as necessary, and the built-in sample and hold circuit performs sample and hold operations. will be done. The image signal is guided to the next stage AD conversion circuit 2,
Color signals R and G with different gradations.

B is converted into a digital signal. 3 is a line memory that stores these digital signals in the manner described later, and 4 is a line memory that sequentially reads the data stored in this line memory 3 and performs various processes such as color conversion, γ conversion, masking, and undercolor removal for each pixel. This is an image processing circuit that performs The processed signal is generally cyan.

After being converted into magenta, yellow, and black signals, the signals are further converted into voltage values applied to each printer head for each corresponding color. 5 is a system controller that controls the sequence of the printer, and is connected to the aforementioned interface 1,
It controls each operation of the AD conversion circuit 2, line memory 3, and image processing circuit 4, and outputs a head drive signal, carriage motor drive signal, and paper feed signal at a timing corresponding to the input image signal. These signals are sent to the head driver 6, carriage motor driver 7,
It is supplied to the paper feed motor driver 8. As a result, the inkjet head 9, carriage mechanism 10, and paper feed mechanism 11 are controlled and driven at predetermined timings to print and output a reproduced image of the input video signal onto a recording medium.

By the way, when performing sample and hold, the video signal interface 1 generally samples in the vertical line L direction with respect to the horizontal scanning line of the video screen, as indicated by the circle in FIG. In FIG. 2, actual Ml~263 represents the horizontal scanning line for the first field in one-frame interlaced scanning, and on the other hand,
It is assumed that the broken lines 263 to 525 represent the second field. The sample hold signal for the first field when sampled along line L (IJI r Lt +...'46B)
, for the second field (Lt 6 S * Ij
264 +...L4. ). Then,
The actual order of sample and hold is first the first field, then the second field, that is, Ll e 'Q r
・・・・・・”t6J+ Ltsa T・・・・・・L
57. becomes. At this time, when the lJ[I interlaced sample and hold data is transferred to the line memory 3 via the AD conversion circuit 2, it is converted into the vertical arrangement order of the actual image. As shown in Fig. 3, the operation is based on the sample hold data of the first field (LI + Lt・
...Lzas) to the odd memory address (
M,,M,,...Mo,), and the second field data ('Q64+L46!1e...
・Lo,) is an even memory address (M, .).

M4. . . . Mo, ). In this way, the line memory 3 stores a group of image digital data in the order of the actual pixel arrangement, so when printing, if the line memory 3 sends out the stored data in order, it is possible to The lines will be printed out. By repeating this printing for one line in the horizontal direction, one frame of image can be printed out.

However, when printing 17 frames of images taken from a fast-moving video, the image signals differ between the first field and the second field by the time difference due to the interlacing due to the interlacing of the image signals. . Specifically, for example, the memory addresses M, , M8 .
...M, 2. (corresponding to the first field), and the contents of M2. The contents of M, . . . M, 24 (corresponding to the second field) are significantly different. For this reason, the printed image on the recording medium has the form of two slightly different images overlapping each other, resulting in an extremely unsightly image.

〔the purpose〕

The present invention addresses the above-mentioned points with tm6, one of the fast-moving moving images.
It is an object of the present invention to provide a video signal processing device that can obtain still image data for one frame without overlapping images.

The video signal processing device of the present invention is characterized by detecting the difference between the images of the first field and the second field of the video signal corresponding to one frame, and based on the detected information, if the images in both fields are significantly different, one A signal of the other field is generated by interpolation from a signal of one field, and printing is performed using this interpolated field signal.

〔Example〕

FIG. 4 is a diagram showing the main part configuration of an embodiment of the present invention. Note that the same or equivalent parts as in FIG. 1 are given the same reference numerals. 12 in the song is a terminal to which image signals such as R, G, B, etc. processed by a video signal interface (not shown) are supplied.

A subtracter array 14 performs subtraction under the control of, for example, a microcomputer 5 as a system controller. A determination circuit 15 identifies a specific state of the output of the subtracter array 14 and outputs the result to the system controller 5. 16 is an output terminal of the line memory 3, the output of which is sent to an image processing circuit (not shown). Note that other printer mechanisms, such as a head driver and an inject head, a carriage motor driver and its mechanisms, and a paper feed motor driver and its mechanisms, are the same as those shown in FIG.

Next, the operation will be explained.

The image signal converted into a digital signal by the AD conversion circuit 2 is sent to the system controller 5.

This digital image signal is, of course, as the time-series interlaced sample hold data mentioned above (L, , L,
・・・・・・Ltas (1st field) + ”t
64+L26. ...Li2S (second field)). The microcomputer 5 as a system controller processes this data string according to the following procedure.

First procedure: First, data for the first field (t,, l Ll
+...L2611) tt, Mi order, M which is the storage address for the first field of line memory 3,
, M, , M,...M,! Step 5: While transferring, the average value between the above data is finally calculated. Then, this calculation result is stored at the storage address for the second field of the line memory 3, M2, M, , M6...MI
124 in the same manner. As a result of the processing according to this first procedure, the data storage state at each address of the line memory 3 is
The result will be as shown in the figure.

Second procedure: Next, among the data arranged and stored as shown in FIG. 5, the contents of odd addresses, for example, L1 and L2, which are the contents of addresses M, . . . , M8, are transferred to the subtracter array 14. Furthermore,
The first data L264 for the second field is taken in from the AD conversion circuit 2 and is also sent to the subtracter array 14.
Transfer to.

In the subtracter array 14, for example, in subtracter 1 =(Lt
as Lt ) is calculated by subtracter 2 as (I164 L2
), and the subtracter 3 performs the calculation (Lx-Ll).

Subtraction output of each subtractor 1, 2.3 "1 e Bl + B
, are sent to the determination circuit 15.

Judgment circuit 15 bald) Ll≦L2, 4≦L2 or ≧
Determine whether L264≧L2 or (b) L264<LI+ Ll or Ltas> Lt+ L2, and for example, if (F), set °1°, and if ←, set °0″.
is sent to microcomputer 5. Microcomputer 5 has this output as 11
°, L26. The data of L+L is transferred and replaced with the average value (-t "1") which is the contents of the previously stored address M7.On the other hand, when the judgment output is @0°, the data L, L and L are stored in the line memory 3. 64 is not transferred. Therefore, the memory contents at address M3 in this case are +L.

will be retained as is. The above second procedure is performed for all columns of the second field of the digital image signal.

The data storage state of the line memory 3 after this process is completed is as shown in FIG. 6, for example.

In the figure, M, , M4. This indicates that the data at each address Mll, , M, , 4 has been replaced and interpolated as a result of the processing according to the second procedure described above.

The contents of the line memory 3 processed and formed through the first and second steps are supplied to the image processing circuit from the output terminal 16, as in the conventional case, and are finally printed on a recording medium. These first and second procedures are repeated for all columns of input frame signals, and one screen of images is formed on the recording medium.

The "first and second processing procedures" in the above-described embodiment can be changed to procedures as described below.

This procedure will be explained with reference to the flowchart in FIG. This flowchart is stored in a ROM (not shown) in the system controller 5 shown in FIG. The system controller 5 also receives a vertical synchronization signal VS of the video signal.
and horizontal synchronization signal ■S are input.

First, as a first step, after detecting the first vertical synchronization signal in step S1, in steps 82 to S8, the first vertical synchronization signal of the time series interlaced sample hold data is detected.
fields (Ll, L, .

. . .Ll61), respectively, at odd-numbered addresses (Ml.

M3. ...Mo,). Then, after detecting the next vertical synchronization signal VS in S9, step SIO
~815 for the second field (L264+L26!
+...Laws) to the even address (M22M4,...Msz4) of line memory 3,
It is stored in the same arrangement as in Figure 3. Note that step S4. a
The timer operation in 11 is an operation that measures the time to determine the position of sampling in the horizontal scanning direction.

Next, as a second procedure, the data in the line memory 3 is transferred to the subtracter 14 in step 317, and the judgment output of the judgment circuit 15 is read (819). and (a) M2Yl≦M
In the case of 2Y≦M2Y+ or M, A, ≧M, Ku≧M, Ku, the contents of M2Y shall not be rewritten, and (B) M2Y
> M2Y-1-M2Y+1 or M2Y<M2Y41
If it is M2Y tenfold, the contents of memory address M2Y are M2Y”
Rewrite it to 17M2Y (819).

And when this operation is completed from Y=1 to Y=262 (
816, 820, 321), it is possible to obtain the same contents of the line memory 3 as in the first embodiment shown in FIG. Thereafter, after the data in the line memory 3 is transferred and outputted in S22, the time of the timers 84 and 811 is changed, and sampling data conversion and data transfer for another position (column) in horizontal scanning are repeated in steps 81 to S23. When the operations for all columns are completed in this way, all of the image data of one screen is recorded.

As described above, the same data and effects as in the first embodiment can be obtained.

Further, in each of the above-described embodiments, data interpolation is performed using average value interpolation, but extreme value interpolation may also be used as described below.

That is, in the "second procedure", when the determination result of the determination circuit 15 is LN14 <Lll Lt, the memory M.

The content of is the content of memories M1 and M, , L is the smaller value, and conversely, when Lta+>"1+ Lt, Ll
year! The larger value shall be taken.

In each of the above embodiments, the subtracter 14 and the determination circuit 15 have been described as external hardware circuits, but the same functions can also be realized by software of the microcomputer 5. Further, although this embodiment has been described using a video printer as an example, it is of course applicable to a device that simply replaces a video signal with still image data, such as an electronic image file.

〔effect〕

As explained above, according to the present invention, when printing one frame of an image of a fast-moving moving image,
If the levels of the image signals in the first field and the second field of the frame differ greatly by the time difference due to interlacing, an interpolated field signal of the other field signal is used instead of the image signal of one field. As a result, it is possible to prevent two field images from being printed in a shifted and overlapping manner. Moreover, as in this embodiment, data interpolation is limited to only the portion where the signal level difference between the two fields is large, so that there is no deterioration in resolution with respect to a normal frame image.

When the P-video signal processing device of the present invention is applied to a video printer, there is an effect that a high-quality printed image can always be printed regardless of whether it is a moving image or not.

[Brief explanation of drawings]

Figure 1 is a block diagram of the circuit configuration of a conventional video printer, Figure 2 is a diagram explaining video screen scanning and print data sampling, and Figure 3 is a time-series interlaced sample hold in line memory. 4 to 6 show an embodiment of the present invention, FIG. 4 is a block diagram of the main part of the circuit configuration, and FIG. 5 shows the first field data line. FIG. 6 is a diagram showing the state of storage in memory, and is a diagram showing the state after processing of what is shown in FIG. 5. 5...System controller (microcomputer) as signal interpolation means 14...Subtractor array 15 as signal level difference detection means...Same judgment circuit No. 7 Figure 2 Figure 3 723δ3-p'A Figure 7 (12383-P) Procedural amendment (method) % formula % 1. Indication of case 1982 Patent Application No. 23416
No. 4 2° Output Qtf@h Video signal processing device 3 Relationship with the case of the person making the amendment Applicant's address (residence) Shosa's name) (100) Canon Co., Ltd. Representative 6 Number of inventions increased by amendment 8 , Contents of the amendment As shown in the attached sheet, JP-A-126979(6) 8. Contents of the amendment (1) The first page of the specification is unclear, so it will be amended to make it clearer as shown in the attached sheet. (2) “~6th” in the first line of page 14 of the specification is replaced with “~7th”
” he corrected. (3) The phrase “Is shown in the drawings” on page 14, line 5 of the specification is amended as follows. "The figure shown, FIG. 7, is a 70-chart diagram of the processing procedure."

Claims (1)

[Claims] In a video signal processing device that forms still image data based on a time series interlaced sample hold signal as an input video signal for one frame, detecting a difference in signal level between a first field and a second field of the time series signal. and means for generating a field signal from one field signal by interpolation when the detected difference is significant, and the generated interpolated field signal is used as part of a time series signal to form an image. A video signal processing device characterized by: