JPS60123951A - ホスト間セシヨン確立処理方式 - Google Patents

ホスト間セシヨン確立処理方式

Info

Publication number
JPS60123951A
JPS60123951A JP58231107A JP23110783A JPS60123951A JP S60123951 A JPS60123951 A JP S60123951A JP 58231107 A JP58231107 A JP 58231107A JP 23110783 A JP23110783 A JP 23110783A JP S60123951 A JPS60123951 A JP S60123951A
Authority
JP
Japan
Prior art keywords
host
session
request
section
communication management
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58231107A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0148573B2 (enExample
Inventor
Akira Murakami
昭 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58231107A priority Critical patent/JPS60123951A/ja
Publication of JPS60123951A publication Critical patent/JPS60123951A/ja
Publication of JPH0148573B2 publication Critical patent/JPH0148573B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
JP58231107A 1983-12-07 1983-12-07 ホスト間セシヨン確立処理方式 Granted JPS60123951A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58231107A JPS60123951A (ja) 1983-12-07 1983-12-07 ホスト間セシヨン確立処理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58231107A JPS60123951A (ja) 1983-12-07 1983-12-07 ホスト間セシヨン確立処理方式

Publications (2)

Publication Number Publication Date
JPS60123951A true JPS60123951A (ja) 1985-07-02
JPH0148573B2 JPH0148573B2 (enExample) 1989-10-19

Family

ID=16918406

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58231107A Granted JPS60123951A (ja) 1983-12-07 1983-12-07 ホスト間セシヨン確立処理方式

Country Status (1)

Country Link
JP (1) JPS60123951A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63261450A (ja) * 1987-04-17 1988-10-28 Fujitsu Ltd ワ−クステ−シヨン制御方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63261450A (ja) * 1987-04-17 1988-10-28 Fujitsu Ltd ワ−クステ−シヨン制御方式

Also Published As

Publication number Publication date
JPH0148573B2 (enExample) 1989-10-19

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