JPS6012376Y2 - clock switching circuit - Google Patents

Description

[Detailed description of the invention] This invention relates to a clock switching circuit, and more specifically to a PC
This invention relates to a circuit that switches clock pulses for phase synchronization in the M transmission system.

Phase synchronization is an important issue in the PCM system.

For this reason, a method is generally used in which synchronization is achieved by receiving clock pulses from an external source.

However, for section communication and small-capacity transmission, a device that generates an external clock pulse (CC3-COMMONclock) is used.
5uply) is uneconomical, and a simple oscillator is provided inside the device.

An example is shown in FIG.

As shown in the figure, when there is a clock pulse input from the outside, the clock pulse is supplied from the external clock pulse side, and when the external clock pulse is cut off due to a failure, the detection circuit 1 detects this and automatically switches the switch. 2, a circuit is used which sends an internal clock pulse generated by an internal oscillator 3 to the outside via a switch 2 to improve the reliability of the system.

However, since the conventional circuit shown in FIG. 1 uses a mechanical switch as a switch, its reliability is insufficient, and the internal oscillator 3 is always in an oscillating state, which has the disadvantage of consuming unnecessary power.

An object of the present invention is to provide a clock switching circuit that improves reliability and avoids unnecessary power consumption by switching between external and internal clocks using simple digital elements.

According to the present invention, in a circuit for switching between an internal clock and an external clock in the ζjPcM communication system, there is provided a detection circuit for detecting the presence or absence of an external clock pulse, an inverter circuit connected to the output of the detection circuit, and one of the power supply terminals connected to the inverter. an internal clock oscillator connected to the output of the
circuit means for outputting the output of the internal clock oscillator or the external clock pulse, and when there is an input of the external clock, the output of the inverter stops the oscillation of the internal clock oscillator and outputs the external clock pulse. is outputted through the circuit means, and when the external clock input is cut off, the internal clock oscillator is activated by the output of the inverter, and the output is outputted through the circuit means, thereby generating a clock pulse. A clock switching circuit is proposed that is characterized by automatic switching.

Embodiments of the clock switching circuit according to the present invention will be described in detail below.

FIG. 2 shows an embodiment of the clock switching circuit according to the present invention, which includes a detection circuit 4 for detecting the presence of an external clock pulse, an inverter circuit 5 connected to its output, and a connection between a power supply and the output of the inverter. It is configured to include an internal oscillation circuit 6 and an OR circuit 7 connected therebetween.

When inputting an external clock pulse in the circuit shown in FIG. Output.

On the other hand, when there is no external clock pulse, the output of the inverter circuit 5 is set to logic "0" and current is passed to the internal oscillator 6 to generate an internal clock pulse, which is output to the OR circuit 7.
Output via .

FIG. 3 shows a specific circuit example of the circuit shown in FIG. 2 according to the present invention.

In Figure 3, 6 is the internal oscillator, 8, 9, 10 and 1
1 is a TrL inverter, 12 is a NAND circuit, 13,1
4.15 is a resistor, 16 is a capacitor, 17 is an external clock pulse input terminal, and 18 is a clock pulse output terminal.

In the circuit shown in Fig. 3, when a pulse is input to the external clock pulse input terminal, the capacitor 16 is charged, so the output of the inverter 9 becomes a logic level "°1", that is, 5V, and the ground terminal of the internal oscillator 6 becomes 5V. This oscillator 6 does not oscillate.

Therefore, since the output of the inverter 8 is at the logic level "1", the output of the inverter 11 is directly applied to the output pulse terminal 1B.

On the other hand, if there is no external clock pulse input, the capacitor 16 is not charged, so the output of the inverter 9 becomes the logic level "0", that is, QV, the internal clock oscillator 6 oscillates, and the output of the inverter 8 remains unchanged (output pulse terminal). Hail to you.

In this case, the output of the inverter 11 is at logic level "1".

As explained in detail above, the circuit according to the present invention makes it possible to switch between external clock pulses and internal clock pulses with an extremely simple logic circuit, making it possible to significantly reduce the size and economy compared to conventional circuits. The effect is extremely large in the PCM communication system.

[Brief explanation of the drawing]

FIG. 1 is an example of a conventional clock switching circuit, FIG. 2 is a block diagram of a clock switching circuit according to the present invention, and FIG. 3 is a specific embodiment of the clock circuit according to the present invention. In the figure, 4 is a detection circuit, 5 is an inverter, 6 is an internal oscillator, 7 is an OR circuit, 8, 9, 10 and 11 are TTL
12 is a NAND circuit, 13, 14, 15 are resistors, 16 is a capacitor, 17 is an external clock pulse input terminal, and 18 is a clock pulse output terminal.

Claims (1)

[Scope of utility model registration request] A circuit that switches between an internal clock and an external clock in a PCM communication system includes a detection circuit that detects the presence or absence of an external clock pulse, an inverter circuit connected to the output of the detection circuit, and one of the power supply terminals connected to the output of the inverter. and circuit means for outputting the output of the internal clock oscillator or the external clock pulse, and when the external clock input is present, the oscillation of the internal clock oscillator is caused by the output of the inverter. and outputs the external clock pulse through the circuit means, and when the external clock input is cut off, the internal clock oscillator is activated by the output of the inverter and its output is output through the circuit means. A clock switching circuit characterized in that it automatically switches clock pulses by outputting clock pulses.