JPS60120567A - Bias charge determining unit of charge coupled device - Google Patents

Abstract

PURPOSE:To always supply a suitable DC bias voltage by comparing the outputs of the first charge coupled device for detecting the optimum bias charge with that of the second charge coupled device, and setting the input bias of a signal main charge coupled device under the input bias condition of the second charge coupled device when both coincide. CONSTITUTION:Charges transferred from the first and second input units 26, 27 are added by an adder 28, then transferred by a thicker transfer unit 29 of channel width, further divided by a divider 30, and transferred for charges of QMAX/ 2 to output units 31, 32. The charged transferred to the unit 32 is converted by the unit 32 to a voltage, and becomes a DC voltage corresponding to QMAX through a sample-holder 33. The output voltage of the holder 33 is inputted to a compartor 34, compared with the output voltage of a sample-holder 38 connected with the output unit 37 of the second charge coupled device 35, and becomes a reference voltage in case of varying the bias voltage of the unit 36 of the second device 35 so that the outputs of the holders 33, 38 become equal.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a charge-coupled device, and in particular automatically adjusts the bias conditions of the input section so that the DC component of the amount of transferred charge to be injected is optimized. This relates to a device that determines the

[Background of the invention]

Conventional charge-coupled devices require preconditioning of the DC bias charge at their input in order to successfully transfer AC signal components. This problem will be explained below using the drawings.

The input operation will be described with reference to FIG. 1 showing the cross-sectional structure of the input section of the charge-coupled device and the internal potential under each gate electrode during operation, and FIG. 2 showing the drive pulse waveform.

The example in Figure 1 shows a buried channel type charge-coupled device with a 2J gate electrode structure and two-phase drive, using the diode cutoff method as the input method. 1 is a P-type semiconductor substrate,
2 is a high concentration N-type diffusion layer, 6 is an N-type buried layer, 4, 5
, 6.7 are N-type buried layers with low concentration formed by doping the N-type buried layer B with P-type impurities, respectively.

When the voltages of gates 8 to 15 are the same, this low concentration of N
Gate electrode 8,1°12 with mold buried layer 4,5.6
．． A difference occurs between the internal potential under the gate electrode 14 and the internal potential under the gate electrode 9 and 11.15, which do not have the same buried layer. This difference in internal potential prevents reverse flow of charges and gives directionality to charge transfer. 8 to 15 are gate electrodes, and 16 to 19 are drive pulse input terminals, respectively. Sampling pulses are applied to the electrode 8 from the terminal 16 shown in FIG. A driving pulse shown in FIG. 2 P1 is inputted to the electrode 12.15, and a driving pulse shown in FIG. 2 P2 is inputted from the input terminal 18, respectively. 20 is a constant voltage source that applies a DC bias voltage to the N type diffusion layer 2 through two resistors. 21 is also a constant voltage source and applies a DC voltage to the gate electrode 9. A signal source 22 supplies a delayed signal t-Nm to the diffusion layer 2 via an AC coupling capacitor 24.

Here, it is assumed that the constant voltage sources 20 and 21 have a regulated appropriate voltage. As shown in FIG. 2, time t = t+
Then, the sampling pulse P8 goes high, and the internal potential under the gate electrode 8 becomes deep.
The potential well below 9 is filled with charges supplied from the N-type diffusion layer 2 up to the potential of the N-type diffusion layer 2. At this time, since the drive pulse P+ is at a low level, the gate electrode 1
The internal potential below 0 is shallow and acts as a potential barrier against the supplied charge. At time t=tz, the sampling pulse Ps
Since the level becomes Low, the internal potential under the gate electrode 8 becomes shallow, and the potential well under the electrode 9 is disconnected from the N-type diffusion layer 2, which is a charge supply hole.

At this time, the charge QiN accumulated under the gate electrode 9 is approximately proportional to the difference between the potential φR under the electrode 9 and the potential V81 of the N-type diffusion layer 2. That is, QiN-K(φHVs+). Here, K is a constant that depends on the area of the gate electrode 9, etc. At time t=ta, the driving force P1 reaches the level nt.
gh, the drive TJh Hals P2 becomes level Low, and the charge under the electrode 9 is transferred to the potential well under the electrode 11. At time t"ts, the driving pulses P1 and P2 are reversed, and the electrode 1
The charge below 1 is transferred to below the electrode 16. Thereafter, charge transfer is performed every time the drive pulses PI and P2 are inverted.

Here, the potential VH is the sum of the potential Vl)C of the constant voltage source 20 and the AC signal f (t) of the voltage source 22, so the supplied charge QiN is QiN = K (φn - VDC) - K f(t) (i
), and is expressed as the sum of the charge Kf(t) proportional to the AC signal and the DC charge K(φR−VυC).

Next, the operation of the output section will be explained. FIG. 6 shows the cross-sectional structure of the output section in the floating diffusion layer amplification method and the internal potential under each electrode during operation. First, the structure shown in FIG. 6 will be explained. 69
is an N-type diffusion layer and acts as a drain for transferred charges.

70 is a floating diffusion layer of ILffl, and this diffusion layer 70 and P
A junction capacitance formed between the mold substrate 71 converts the transferred charge into voltage. 72.75 is an N-type buried layer similar to 3 in FIG. 1, and 74.75.76 is a low concentration N-type buried layer j- similar to 4.5.6 in FIG. , 77-82 are gate electrodes, and 83.8485 is a drive pulse input terminal. The electrodes 77 and 78 have input terminals 83
A driving pulse (Fig. 2 P2) is applied to the electrodes 79 and 80, a driving pulse (Fig. 2 1) 1) is applied to the electrode 81 from the constant voltage source 86, and an appropriate DC voltage is applied to the electrode 81 from the constant voltage source 86. 8
2 is a reset pulse from input terminal 85 (Figure 2 PR)
are input respectively. 87 is a constant voltage source, 89.92
is a constant current source, 88.91 is an N-type MO8) transistor,
90 is sample hold.

93 is an output terminal.

At time t=ta, the driving pulse P+ is at a high level, so that the charge transferred from the potential well below the electrode 78 is accumulated in the potential well below the electrode 80. fC-') Since the set pulse PR is at a high level, the internal potential under the electrode 85 decreases, and the floating diffusion layer 7o and the diffusion layer 69 are electrically connected, and the potential of the floating diffusion layer 70 is determined by the potential of the diffusion layer 69, that is, the voltage source 87. It becomes equal to the potential. This operation is called a reset operation, at time t = t41c ha!
J set Hals PR becomes level Low and p floating diffusion layer 7
0 is insulated from the diffusion layer 69, that is, from the constant voltage source 87. At time t=t6, drive pulse P1. P2 is reversed and electrode 8
Charges below 0 are transferred to the floating diffusion layer 70. When the transferred charge YcQ++1G and the junction capacitance of the floating diffusion node are C, the voltage change ΔV appearing in the floating diffusion layer 7° is approximately expressed as ΔV=Q81G C−−. At time t=h, the driving pulses P1+P2 are inverted again, and the next signal charge is accumulated in the potential well below the electrode 80. Thereafter, the process is repeated from t3. Therefore, the voltage waveform appearing in the floating diffusion layer 70 is as shown in FIG.
), it becomes a comb-shaped waveform with the same period as the drive pulse. The high potential side of this voltage waveform is the voltage of the constant voltage source 87 determined by the reset operation. Since the transferred charges are electrons, the voltage change Δ~ appearing in the floating diffusion layer 70 described above is negative, and the voltage change appears in proportion to the signal charge on the low potential side of the voltage waveform. That is, the low potential side envelope in FIG. 4(a) is the delayed (m) signal. The sample-and-hold (N waveform) shown in FIG.
The signal is taken out from an output terminal 96 via a source follower composed of an S transistor 91 and a constant current source 92.

After this, by band-limiting, it is possible to obtain the waveform of No. 1M shown in FIG. 4(C).

Now, let's consider the maximum transfer charge amount.

In the internal potential diagram at time t"ta in FIG. 1, the internal potential difference ΔφTS between the electrodes 10 and 11 is a constant determined by processes such as the concentration of the N-type buried layer 6 and the concentration of the low-concentration N-type buried layer Lm4. When trying to input charge beyond the depth Δφ'rs, time t in Figure 1
At the change from 3 to t5, the electrical property flows backward from below the electrode 11 to below the electrode 9. That is, in the charge supplied at the input section, ΔφTS exists at the upper limit.
The upper limit of the charge transferred each time 2 is reversed is also the same < ff
, ΔφTS. Therefore, the maximum transfer charge fl QI
IIAX = KΔφTS. O<QiN≦Q, M
Since AX, 0kuK(φR-VDC) -K f(t
)≦, ΔφTs(2), and the signal f (
t) as A Sin 61 t, 0≦φR−VDC−Am′ωt≦ΔφTS (5), and the maximum amplitude of the signal A MAX becomes. This indicates that the optimum amount of bias charge to be supplied at the input section is 1/2 of the maximum transfer charge amount QMAX. Therefore, it is usually necessary to set the values of the constant voltage sources 20 and 21 so as to satisfy equation (4). However, V
Although DC depends only on the potential of constant voltage source 20, φR
is a constant voltage source 21. It depends on the concentration of the N-type buried layer 6 and the thickness of the insulating oxide film between the gate electrode 92 and the semiconductor substrate.

Further, as described above, ΔφT8 depends on the concentration of the N-type buried layer 6, the concentration of the low-concentration N-type diffusion layers 4, 5, 6.7, and the like. As described above, there is no consistency between VD c +φRΔφTs in terms of integrated circuits, and adjustment is always required when considering variations in elements. Generally, a single sine wave is input and adjustments are made so that harmonic distortion in the output is minimized. This method requires manual adjustment or the use of special adjustment jigs, which increases manufacturing costs.

Furthermore, as mentioned earlier, there is no consistency between VDC+φR1ΔφT8, making it difficult to design temperature compensation.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a bias voltage determining device that does not require adjustment of the DC bias at the input section of a charge-coupled device and always supplies an appropriate DC bias voltage.

[Summary of the invention]

The outline of the present invention is as follows. FIG. 5 shows the relationship between input voltage and injected charge in the diode cutoff method. When the input voltage is less than or equal to ViNt, charges of QMAX, which is the maximum amount of transferred charges, are always injected. When the input voltage is below ViNJ and above ViNa, charge corresponding to the input voltage is injected, and when the input voltage is above viNL and below V
It can be seen that the signal component is normally converted into charge when the value is less than iNa. Further, when the input voltage is equal to or higher than ViNH, the charge of QMiN is always injected, but QMIN is a random charge component due to noise at the input section and can be considered to be almost zero. The input voltage range in which the injected charge reaches QMAX or QMIN is sufficiently wide compared to fluctuations due to temperature and process variations, and it is easy to set the input voltage in advance so that the injected charge reaches QMAX or QMIN. It is. Using the characteristics of the input section as described above, Q
The dynamic The charge near the center of the range (QIII
AX”QMIN)/2 can be detected.

Further, as mentioned above, since QMIN is approximately zero, the same effect can be expected even if the second input section and addition section are omitted.

Alternatively, since the maximum transfer charge amount QMAX of a charge-coupled device is approximately proportional to the storage gate area, a charge-coupled device with a storage gate area approximately 1/2 that of the main signal charge-coupled device is operated with an input voltage below ViNL. By using the above-mentioned means, the charge at the center of the dynamic range of the charge-coupled device can always be detected without being affected by fluctuation factors such as temperature and process. a second charge-coupled device whose characteristics are approximately equal to those of the main charge-coupled device for signals;
charge-coupled device with gold coating, 1st. Negative feedback to the input bias charge of the second charge-coupled device so that the output of the second charge-coupled device is compared and the two match? By multiplying by 0, the second charge-coupled device is automatically biased approximately to the center of its dynamic range. By doing so, the main signal charge coupled device is always biased to the optimum state.

[Embodiments of the invention]

Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 6 is a block diagram showing an embodiment of the present invention. In the figure, 25 is the first charge coupled device, 35 is the 20th charge coupled device, and 35 is the 20th charge coupled device.
59 is a signal main cargo coupling device;
55, 38 and 42 are sample holds, and filter 4 is a comparator.

Here, the first charge-coupled device 1i25 has a first input section 26. Second input section 27. It consists of an adder 289, a distributor 30, and an output section 31.52. The input section 26 of 'ig1 is set to input charge of the maximum transfer charge amount QMAX, and the second input section 27 is set so that the input charge is zero. The charges transferred from the first input section 26 and the second input section 27 are added together in the addition section 2B, and transferred by the transfer section 29, which has a slightly thicker channel width to prevent charges from overflowing. The distribution unit 0 divides the charge into two parts, and transfers them to the total charge output parts 31 and 62, each having QMAX/2. The charge transferred to the output section 62 is converted into a voltage at the output section 2, and then passes through a sample hold 65 to become a DC voltage corresponding to QMAX/2. The output 'voltage of this temple hold 55 is input to a comparator 64,
The output voltage of the sample hold 68 connected to the output section 67 of the second charge coupled device 65 is compared to the output voltage of the sample hold 68 connected to the output section 67 of the second charge coupled device 65. This serves as a reference voltage when changing the bias voltage of 66. By the above means, the input bias voltage of the input section 66 of the second charge-coupled device 35 is always biased to the center of the dynamic range, and this bias voltage By using this as the bias voltage of the input section 40 of the signal charge coupling device 69, the signal main charge coupling device 59t can be operated at the optimum bias without external adjustment. ,
Since feedback control is performed even against disturbance factors such as changes over time, it is possible to maintain the optimum bias at all times.

FIG. 7 is a block diagram showing another embodiment of the invention.

In the same figure, 45 is a first charge coupled device, 49 is a second charge coupled device, and 49 is a second charge coupled device.
charge-coupled device; 44, 50 are input parts; 46.47.
51 is the output section, 48.52 is the sample hold, 50
is a comparator.

The input section 44 of the first charge coupling device 46 is set to input charges of the maximum transfer charge amount QMAX. The charges transferred from the input section 44 are sent to the distribution section 45,
Each charge is divided into QMAX/2 charges. As a result, the output of the sample hold 48 becomes an output corresponding to the charge of QMAX/2, that is, the charge corresponding to the center of the dynamic range of the charge coupled device. Using the output of this sample hold 48 as a reference, the sample hold 5
Negative feedback is applied to the input section 50 of the second charge-coupled device 49 so that the two outputs are the same. By setting the input bias condition of the input section 50 as the input bias condition of the main charge-coupled device for signals, all input sections of the main charge-coupled device can be operated with the optimum bias.

The eighth garden is a block diagram showing another embodiment of the present invention. In the figure, "C154" is the first charge-coupled device, 59
1 is a charge coupling device @2, 64 is a main charge coupling device for signals, 57. 61 and 68 are temple holds, and 58 is a comparator.

Here, the channel width of the input section 55 of the first charge coupled device d54 is approximately 1/2 of the channel width of the input section and the transfer section of the main charge coupled device 64 for signals.
5 is set to inject the maximum amount of charge. At this time, a charge of approximately QhaAx/2, that is, a charge approximately at the center of the dynamic range of the signal main charge coupling device 64 is inputted from the input section 55. As a result, the output voltage of the sample hold 57 of the first charge-coupled device 54 is set as a total reference voltage, and the output voltage of the comparator 5B is made equal to the output voltage of the sample-hold 61 of the second charge-coupled device 59.
By controlling the variable voltage source 62, the input 60 of the second signal coupling device 59 is biased toward the center of the dynamic range. By supplying the bias voltage to the human power section 65 of the main charge coupling device 64 via the resistor 65, it is possible to always provide the optimal bias voltage to the signal component input from the signal source 67 via the AC coupling capacitor 66. I can do it.

Furthermore, the charge injected from the input section is measured by the difference between the potential of the input section source diffusion layer (2 in Figure 1) and the internal potential under the second gate electrode (9 in Figure 1). . Therefore, when the output of the comparator 58 is fed back to the input section of the second '^f, the load coupling device 59 and the main one-way coupling device 464 for signals, the feedback light is lT+ even in the human source diffusion layer.
2 't1. It is clear that the same effect can be obtained with the f-th gate 'shapoku'. Furthermore, in other input methods, it is possible to return to either of the two potentials (corresponding to the potential of the input source diffusion layer described above in the diode cutoff method and the lowest potential of the second right gate 6) to measure the charge. It is also clear that both are possible.

The present invention is not limited to the above embodiments, and can be used regardless of the input method, output method, surface channel type, buried channel type, number of drive phases, etc.
It should be understood that this is also applicable to D.

〔Effect of the invention〕

According to the present invention, the input of the coupling device can be operated under suitable conditions through pre-adjustment, so the conventionally cheap WI4 adjustment variable resistor is not required, making it economical. Moreover, there is an advantage that it also leads to miniaturization of the device (k).

[Brief explanation of drawings]

Figure 1 is a schematic diagram showing the cross-sectional structure of the input part of the charge-coupled device and the internal potential during operation. Figure 2 is a waveform diagram showing the drive pulse waveform of the charge-coupled device. Figure 3 is the output part of the charge-coupled device. Fig. 4 is a waveform diagram showing the output waveform of the charge-coupled device, Fig. 5 is a diagram showing the characteristics of the input section of the charge-coupled device, and Fig. 6 is a schematic diagram showing the internal voltage during operation. FIG. 7 is a block diagram showing another embodiment of the invention, and FIG. 8 is a block diagram showing another embodiment of the invention. 25.45 and 54...first charge coupled device 35.
49 and 59...Second charge-coupled device 54.55 and 58...Comparator 39 and 64...Main charge-coupled device for signal Patent attorney Akira Takahashi Diagram 2 t+ t2 b t4b tc t7 ¥3 record 4 figure whisper S figure vlNL ViNH he force voltage whisper 6 figure A absolute 7 section dχ (±

Claims (1)

[Scope of Claims] 1) A bias charge determination device for an input section of a main charge-coupled device for signals, comprising a first charge-coupled device for detecting an optimum bias charge of the main charge-coupled device for signals; 2 of the charge-coupled devices; means for comparing the outputs of the second charge-coupled device and adjusting the bias charge injected from the input section of the second charge-coupled device so that the outputs of the second charge-coupled device match; A bias charge determining device for a charge coupled device, characterized in that an input bias condition is used as an input bias of a main charge coupled device for signals. 2) having a first input section configured to inject a charge at the upper limit of the dynamic range of the main charge-coupled device for signals, and a second input section also configured to inject a charge at the lower limit; , addition of charges transferred from the two input sections. 2. A bias charge determination device for a charge-coupled device as claimed in claim 1, further comprising a first charge-coupled device that detects a charge approximately at the center of the dynamic range of the signal main charge-coupled device by performing distribution. 5) It has an input section that is set to inject the charge at the upper limit of the dynamic range of the main charge-coupled device for signals, and the main charge-coupled device for signals is injected by distributing the charge transferred from the input section. A bias charge determination device for a charge-coupled device according to claim 1, wherein the first charge-coupled device detects a charge approximately at the center of the dynamic range. 4) An input section with a channel width approximately 1/2 of the main charge-coupled device for signals, the first input section being set to inject the charge at the upper limit of the dynamic range in the power section, and the first input section also at the lower limit. The second one is set to inject a charge of
a first input section for detecting a charge approximately at the center of the dynamic range of the main signal charge coupling device by adding the charges transferred from the two input sections;
A bias charge determination device for a charge-coupled device according to claim 1, having a charge-coupled device. 5) The dynamic range of the main charge-coupled device for signals can be increased by having an input section with a channel width approximately 1/2 that of the main charge-coupled device for signals, and setting it to inject the charge at the upper limit of the dynamic range in the input section. 2. A bias charge determination device for a charge-coupled device according to claim 1, wherein the first charge-coupled device detects a charge approximately at the center of the charge-coupled device.