JPS60119190A - Processing circuit of video signal - Google Patents

Abstract

PURPOSE:To correct the time delay between a luminance signal and a chrominance signal automatically and precisely by providing the titled circuit with individual transmission systems transmitting the luminance signal and the chrominance signal respectively, the 1st and 2nd differentiation means differentiating the luminance signal and the chrominance signal and variable delay means determining a delay time on the basis of the 1st and 2nd differentiation means. CONSTITUTION:In the figure, tau indicates the delay time of the chrominance signal to the luminance signal and psi(tau) indicates DC potential corresponding to their correlation. In case of psi7(tau)<psi12(tau), the output of a differential amplifier 13 is turned to a negative value and is acted so that the oscillation frequency of a VCO14 is reduced and the delay time of CCD-DL (a CCD delay line) 3 is extended. In case of psi7(tau)>psi12(tau), the output of the differential amplifier 13 is turned to a positive value and acted so that the oscillation frequency of the VCO14 is increased and the delay time of CCD-DL3 is shortened. Namely, the chrominance signal outputted from a terminal 24 is always delayed by tsec from the luminance signal outputted from the CCD-DL3 in a control loop. Thus, the time delay between the luminance signal and the color signal is corrected by delaying the output of the CCD-DL3 by tsec in a DL15.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a video signal processing circuit, and more particularly to a circuit for correcting a time difference between a luminance signal and a chrominance signal transmitted through different transmission systems.

<Description of Prior Art> Conventionally, when recording a video signal, the video signal is not directly modulated, but is separated into a luminance signal and a chrominance signal, and an appropriate band and modulation method are selected for each. A common method is to multiplex the signals again. In this case, since these recording signal processing and reproduction signal processing are performed in different transmission systems, a slight time lag occurs between the luminance signal and color signal due to differences in frequency bands and signal processing circuits. This time lag was such that on the reproduced color screen, the colors did not overlap well on the black and white screen, and were shifted in the horizontal direction.

In order to correct such color shift, a technique has been used in the past in a recording/reproduction device in which a variable delay circuit is provided in a luminance signal or chrominance signal transmission system. By the way, as a method for determining the delay time of this variable delay circuit, the following methods have been proposed and implemented in the past.

The first method is to determine the delay time in advance. For example, a method is used in which a COD delay line (hereinafter referred to as C0D-DL) using a variable clock is used as the variable delay circuit, and the clock is generated by a voltage controlled oscillator (VCO). In this case, the control voltage of vCO is adjusted in advance to align the luminance signal and color signal in time. However, with this method, it is difficult to adjust the fllJ ml voltage. This is due to variations in the amount of time delay during transmission depending on each product.

Also, fluctuations in the level of luminance signals and color signals.

Also, the time delay meter in each transmission system fluctuates due to changes in temperature, etc., which is undesirable.

Therefore, the second method is to superimpose a pilot signal on each of the luminance signal and color signal in advance, and detect the time difference between these signals after passing through the transmission system1. There is a way to determine the delay time. For example, the above-mentioned C0D-DL clock generation vC
The control voltage of O may be determined based on this detection output, and the feedback system may be used. However, in this method, the luminance signal and the chrominance signal are multiplied by M reference pilot signals in advance, which induces various adverse effects on each signal processing system. Further, an extremely large number of circuits are required to be added, and the circuit configuration becomes complicated. Furthermore, if a recording/reproducing apparatus superimposes such a pilot signal before recording, it will not be compatible with other apparatuses, and will also cause negative effects such as "loss talk" on the reproducing apparatus.

<Object of the Invention> In view of the above-mentioned drawbacks, the present invention automatically adjusts the time difference between a luminance signal and a chrominance signal transmitted through different transmission systems without superimposing a pilot signal or the like on the luminance signal or chrominance signal. It is an object of the present invention to provide a signal processing circuit that can perform accurate correction.

<Explanation based on examples> The present invention will be explained in detail below using examples.

FIG. 1 is a diagram showing a processing circuit as an embodiment of the present invention. In FIG. 1, 21 is a luminance signal input terminal, 22
is a color signal (for example, a monochromatic signal).

23 is an output terminal for a luminance signal, and 24 is an output terminal for a color signal. ], /
1 and 9 are branch circuits for extracting changes in the signal, respectively;
2, 5.10 are differentiating circuits 1, 4. , to obtain the absolute value of the output of 9, use a square circuit to square the output,
Variable CCD-D L for controlling the delay time of the 3-digit luminance signal, 6. IJr/′i, a multiplier for calculating the correlation between the luminance signal and the color signal, 7.12, a multiplier for each
i6. Integrating circuit that integrates the output signal of II, 14 is CC
The VCO 18 for generating the clock for driving D is a fixed DL that delays the luminance signal by 7t (see), which will be described later.]
5 is a fixed DL for delaying the luminance signal by t (sec). Further, FIG. 2 is a diagram showing the relationship between the time difference between the luminance signal and the color flash, and the correlation.

The operation will be explained below using FIGS. 1 and 2. The luminance signal inputted from the terminal 21 is supplied to the differentiating circuit 4 via the C0D-DL3, and after being differentiated, the differential output is squared by the squaring circuit 5. On the other hand, the color signal inputted from the inverter 22 is supplied to the differentiating circuit 1, and after being differentiated, the differential output is squared by the squarer circuit 2. And 7 square circuit 2.
The output signals of 5 are respectively sent to the multiplier 6. provided.

After being multiplied by the multiplier 6, this output signal is sent to the integrator circuit 7.
By integrating the luminance signal and the color signal, the DC signal is converted into a DC 1 level corresponding to the mutual correlation between the luminance signal and the color signal.

On the other hand, the brightness signal output from C0D-DL3 is
) The signal delayed by 2 t (sec) at L 8 is differentiated by a differentiating circuit 9, and this differentiated output is squared by a squaring circuit 10. The output of this square circuit 10 is the square rrI mentioned above.
After being multiplied by the output of the l path 2 by the multiplier 11, this output signal is integrated by the integrating circuit 2. This will change the brightness signal to 2
A DC potential corresponding to the mutual correlation between the delayed 48 months and the color signal is obtained.

In Fig. 2, τ indicates the delay time for one color (J ~ to the bright 11'C signal of the M number, and ψ(τ) indicates i'Fi' and current potential according to their correlation. .Now COD-1,) T.
If the phase of the color signal output from terminal 24 is ahead of the luminance signal output from terminal 3, then the output ψ7(τ) of integrating circuit 7 has a coordinate on the negative side in FIG. , if lagging is on the positive side.

Now, for example, if the color signal output from terminal 24 is ahead of the luminance signal output from C0D-DL3 by τ0, ψ7(τ) will be < V2 as shown in Figure 2. . On the other hand, at this time, a color signal τ is outputted from the terminal 24 in contrast to a luminance signal outputted from the DL8. +2, so the output ψ,2(τ) of the integrating circuit 12 becomes V, as shown by point aK in the second figure. Further, the color signal outputted by four AM subtypes is τ with respect to the luminance signal outputted from the CCD-DL3. If +2 is behind, ψ7(τ) is the second
As shown at point f in the figure, < V3. At this time, the color signal outputted from the terminal 24 is τ with respect to the luminance signal outputted from the DL8. Since it is delayed, ψ, 2(τ) is the second figure point e
As shown in , < V.

As is clear from FIG.
If the delay is more than ee), ψ7(τ)≦912(τ
) and otherwise ψ7(τ)〉ψ12(τ
). Also, when this delay is exactly t (sec), ψ? (
τ) and ψ, 2(τ) are equal.

Now, when ψ7(τ) <ψ, 2(τ), the output of the differential amplifier 13 operates to lower the negative oscillation frequency of the LVCO 14 and to lengthen the delay time of the CCD-DL 3. This control loop therefore acts to delay the luminance signal. On the other hand, now ψ7(τ)〉ψ1. When (τ), differential amplifier 1
The output of VCO 3 is positive and operates to increase the oscillation frequency of VCO 4 and shorten the delay time of C0D-DL3. This control loop thus serves to advance the luminance signal.

In other words, the control loop described above is such that the color signal outputted from the terminal 24 is always the luminance signal outputted from the CCD-DL3.
It operates so that it is delayed by t [5ec]. Therefore, the output of CCD-DL3 is t (see) at DLI5.
By delaying them, the time difference between the luminance signal output from the terminal 23 and the color signal output from the terminal 24 is corrected.

According to the configuration as described above, it is possible to automatically correct the time difference between the luminance signal and the color signal transmitted through different transmission systems. In addition, in the above configuration, the pilot signal etc. are not superimposed on the luminance signal or the chrominance signal, so the signal processing part (not shown) is no different from normal signal processing such as "I0" and will not be adversely affected. . Furthermore, since feedback control is performed even when the temperature etc. change, time lag can be corrected accurately without being influenced by these factors.

FIG. 3, FIG. 4, and FIG. 5 are diagrams showing processing circuits as other embodiments of the present invention, respectively. In each figure, the same reference numerals refer to the same components as those in the processing circuit of FIG. 1, and the explanation thereof will be omitted.

In FIG. 3, DT, 8' is a delay line that delays the color (M) input to the terminal 22 by 2 t (see), 9'
is a differentiating circuit for differentiating the output of DI, 8', and 10' is a squaring circuit for squaring the output of the differentiating circuit 9'. In the circuit shown in Figure 3, as is clear from the explanation in Figure 1,
terminal 22 for the luminance signal output from CD-DL3.
It seems that the input color signal is always advanced by t (see). lI zl will be done. Therefore, the color signal input from the terminal 22 is sent to DI, t(see
:Delayed output from terminal 24 and C0D-DL
By outputting the luminance signal output from terminal 3 from terminal 23, the color signal output from terminal 24 and the terminal 2
This eliminates the time lag in the luminance signals output from 3.

According to the constituent liquid as described above, in addition to the same effect as the signal processing circuit shown in FIG. 1, it is possible to narrow the bandwidth of the signal delayed by DL8' and DL15'. This is because the bandwidth of the chrominance signal is generally narrower than the bandwidth of the luminance signal. Therefore, in terms of circuit design, there is no need to worry about band limitations before and after DL.

The processing circuit shown in FIG. 4 is the throughput middle square circuit 2 of FIG.
, 5 and 10 are omitted, and detection circuits 19 and 20 are provided in place of the integrating circuits 7 and 10. According to this configuration, compared to the circuit shown in FIG. The j-path configuration is simple, but the response is slightly inferior1. The processing circuit shown in FIG.
DL15) is omitted, and only one integrating circuit 7 is provided to obtain a DC voltage according to the correlation. 16 is a sample hold circuit (S/H), 13' is a differential amplifier, 17 is R
S flip-flop (R8FF),] s is an integrating circuit.

The operation will be explained below. When the luminance signal and color signal start to be input to the terminals 21 and 22, respectively, R8l1"F17 is set, and the output of the integrating circuit 18 increases. Along with this, the oscillation frequency of ■C014 also increases. On the other hand, the differential amplifier 13' compares the output of S/)I]6 and the output of the integrating circuit 7.

Now, if the luminance signal output from the CCDDL3 is delayed with respect to the color signal input to the terminal 22 at the start of the above-mentioned input, the zumble hold operation will be performed every predetermined period. The output of the S/H 16 becomes as low as the output of the integrating circuit 7 at the start of input. Then VCO1
4 increases, the luminance signal advances, and when the timings of the luminance signal and color signal match, the output of the integrating circuit 7 and the output of the S/) T16 become equal. When the luminance signal advances even slightly than the chrominance signal, the output of the S/H 16 becomes higher than the output of the integrating circuit 7, the output of the differential amplifier 13' becomes positive, R8FF17 is reset, and from this moment on the integrating circuit 1
8's output decreases.

When the output pressure of the integrating circuit 18 decreases, the oscillation frequency of the VCQ 14 decreases and the luminance signal begins to lag. When the luminance signal lags behind the color signal, R8FF17 is set again, the oscillation frequency of the VCO 14 increases, and the luminance signal starts to advance again. By repeating this, COD
D1. , 3 (outputted from the terminal 23) coincides in timing with the color signal outputted from the terminal 24.

At this time, the higher the S/H 16 is, the better, so it is desirable to make the comparison in the differential amplifier 13 as high as possible. Further, the larger the time constant of the ¥*minute circuit 18, the higher the stability of the control loop, and the smaller the time constant, the better the response.

According to the processing circuit configured as described above, in addition to the same effect as the processing circuit of each of the previous embodiments, since there is no fixed DL in the luminance signal transmission system and the color signal transmission system, deterioration of the video signal can be prevented. can. Furthermore, the Frl path can be easily integrated into an IC.

In the above-mentioned embodiment, all the variable delay means are provided in the luminance signal transmission system, but it goes without saying that the same effect can be obtained even if the variable delay means is provided in the color signal transmission system. Nor.

<Description of Effects> As explained above using the embodiments, according to the present invention, since no pilot signal is used, the time of the luminance signal and color signal transmitted through different transmission systems can be adjusted without adversely affecting the video signal. A signal processing circuit that can automatically correct deviations can be obtained. Further, the signal processing circuit of the present invention can always operate stably without being affected by temperature, video signal level, etc.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a signal processing circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing the relationship between the time difference and correlation between a luminance signal and a color signal, FIG. FIG. 5 is a diagram showing a signal processing circuit as another embodiment of the present invention. Differentiation circuit 3 is a variable delay means CCD delay line 4 Differential circuits 2.5.10 and 2.5.10 respectively have square circuits 6.11 have multipliers 7. 12, an integrating circuit 8, a fixed delay line 9, a differentiating circuit 13, a differential amplifier 14, and a voltage control oscillator 15, fi! , 1 constant delay line 16, sample hold circuit 17, 1 S flip-flop 18, integrating circuit 19, and 20 are respectively detection 1" LIl paths.

Claims (1)

[Claims] (1) Separate transmission systems for respectively transmitting a luminance signal and a chrominance signal, a first differentiating means for differentiating the luminance signal, and a second differentiating means for differentiating the chrominance signal. Part 1. a variable delay means provided in the luminance signal or color signal transmission system, the delay time of which is determined based on the output of the second differentiator.