JPS60116545U - interface control device - Google Patents
interface control deviceInfo
- Publication number
- JPS60116545U JPS60116545U JP472384U JP472384U JPS60116545U JP S60116545 U JPS60116545 U JP S60116545U JP 472384 U JP472384 U JP 472384U JP 472384 U JP472384 U JP 472384U JP S60116545 U JPS60116545 U JP S60116545U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- response
- supply
- interrupt
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の一実施例を示すブロック図、第2図は
上記一実施例の動作を説明するための流れ図である。
1・・・・・・共通制御回路、2・・・・・・割込み検
出回路、3・・・・・・ステータス回路、4・・・・・
・データ出力回路、5・・・・・・インタフェース回路
、■RO・・・・・・割込み要求信号、IRl・・・・
・・割込み発生信号、IR2・・・・・・外部割込み信
号、DO・・・・・・入出力データ、Dl・・・・・・
出力データ、SO・・・・・・ステータス情報、Sl・
・・・・・状態入力信号、CO・・・・・・制御回路、
C1・・・・・・検出 □−′制御信号、C2・・
・・・・状態入力制御信号、C3・・・・・・データ出
力制御信号。FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart for explaining the operation of the above embodiment. 1...Common control circuit, 2...Interrupt detection circuit, 3...Status circuit, 4...
・Data output circuit, 5...Interface circuit, ■RO...Interrupt request signal, IRl...
...Interrupt generation signal, IR2...External interrupt signal, DO...Input/output data, Dl...
Output data, SO...Status information, Sl.
...Status input signal, CO...Control circuit,
C1...Detection □-' control signal, C2...
. . . Status input control signal, C3 . . . Data output control signal.
Claims (1)
込み信号を保持し前記堡持した信号と異った外部割込み
信号の供給に応答して割込み発生信号を発生する割込み
検出手段と、 第2の信号の供給に応答して外部から供給される状態入
力信号を保持する状態入力信号保持手段と、 第3の信号の供給に応答して供給されるデータを保持し
外部へ送出するデータ保持送出手段と、中央処理装置か
ら供給される初期設定命冷に応答して初期設定を行って
前記第1の信号を発生し前記割込み発生信号の供給に応
答して前記第1の信号と第2の信号と前記中央処理装置
へ供給する、 割込み要求信号とを発生し前記中央処
理装置からのステータス入力命令に応答して前記保持さ
れた状態入力信号を前記中央処理装置に供給し前記中央
処理装置からの外部割込み処理終了出力命令とデータと
の供給に応答して第3の信号を発生し前記データを前記
データ保持手段に供給する一つの信号発生供給手段とを
含むことを特徴とするインタフェース制御装置。[Claims for Utility Model Registration] In response to the supply of the first signal, an external interrupt signal supplied from the outside is held, and in response to the supply of an external interrupt signal different from the held signal, an interrupt generation signal is generated. interrupt detection means for generating an interrupt; status input signal holding means for retaining a status input signal supplied from the outside in response to the supply of the second signal; and data supplied in response to the supply of the third signal. a data holding/sending means for holding and transmitting the data to the outside; and a data holding/sending means for performing initial setting in response to an initial setting command supplied from the central processing unit, generating the first signal, and responding to supply of the interrupt generation signal. generates the first signal, the second signal, and an interrupt request signal to the central processing unit, and transmits the held status input signal to the central processing unit in response to a status input command from the central processing unit. one signal generation and supply means that is supplied to a processing device, generates a third signal in response to the supply of an external interrupt processing end output command and data from the central processing unit, and supplies the data to the data holding means; An interface control device comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP472384U JPS60116545U (en) | 1984-01-18 | 1984-01-18 | interface control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP472384U JPS60116545U (en) | 1984-01-18 | 1984-01-18 | interface control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60116545U true JPS60116545U (en) | 1985-08-07 |
Family
ID=30480565
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP472384U Pending JPS60116545U (en) | 1984-01-18 | 1984-01-18 | interface control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60116545U (en) |
-
1984
- 1984-01-18 JP JP472384U patent/JPS60116545U/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS60116545U (en) | interface control device | |
JPS6076444U (en) | Printer output control device | |
JPS6020655U (en) | Abnormality monitoring device for asynchronous bus-coupled computer system | |
JPS59100337U (en) | DMA control circuit | |
JPS59142832U (en) | Output device control device | |
JPS6142649U (en) | data transfer device | |
JPS58176231U (en) | Operation control device | |
JPH01173787U (en) | ||
JPS6122639U (en) | Line printer paper feed control device | |
JPS58113139U (en) | Key switch response circuit | |
JPS60100806U (en) | Information processing device for process monitoring | |
JPH0191959U (en) | ||
JPS61133844U (en) | ||
JPH0168546U (en) | ||
JPS5881654U (en) | arithmetic processing unit | |
JPS61138059U (en) | ||
JPS5891786U (en) | Copy machine character display device | |
JPS6389152U (en) | ||
JPH04282739A (en) | Interface circuit | |
JPH023853A (en) | Interface method for cpu | |
JPS60194800U (en) | memory card | |
JPH01125637U (en) | ||
JPS60207946A (en) | Data transfer control system | |
JPS5851359U (en) | Output circuit | |
JPS6047063U (en) | input/output control device |