JPS60112303A - Protecting circuit of output transistor - Google Patents

Abstract

PURPOSE:To obtain a protecting circuit of an output transistor by producing a set signal when an output fault of the output transistor is detected to cut off the bias of the output transistor and then producing a reset signal after detecting the release of an output fault. CONSTITUTION:When an output terminal 19 has a short circuit to an earth or a Vcc power supply and the output current of a power amplifier circuit increases, a current amount detecting circuit 20 detects the increase of the output current and delivers a set signal S. Then a bias cut-off control signal V is delivered from a bias control circuit 24 to cut off the bias current of an output transistor. Thus an output stop state is obtained. When the terminal 19 is released from a short circuit state, the output potential of the power amplifier circuit is reset to its original state by a potential setting circuit 21. An output potential detecting circuit 22 detects the reset of the output potential and delivers a reset signal R. Then a bias current is supplied to the output transistor to set again this transistor to an output working state.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This generator F3A protects the output transistor used in, for example, a power amplifier from an abnormal output state due to the short circuit when the output terminal of the output transistor is short-circuited. This article relates to protection circuits for transistors that fail.

[Technical background of the invention and its problems]

As is well known, for example, in a power amplifier, the output transistor is A protection circuit is provided.

FIG. 1 shows the simplest power amplifier. That is, this power amplifier has a drive transistor Qt
and a drive circuit 11 consisting of resistors R1 and R2. transistor. Current mirror circuit 1 consisting of 21Q31 resistor R4
2. It is composed of an output circuit 13 consisting of an output transistor Q4 and a resistor R3, and a protection circuit 14 consisting of a switching transistor Q5. In this power amplifier, when a signal is supplied to the input terminal IN, the output transistor Q4 is output from the drive circuit 11 in response to the signal.
This output transistor Q4 outputs a bias current to
to drive. The emitter output of this output transistor Q4 is output to various loads connected to the output terminal OUT.

Here, for example, if the output terminal OUT is short-circuited to ground, the load on the output transistor Q4 becomes heavy, so that an overcurrent tends to flow through the output transistor Q4. Then, since the base potential of the output transistor Q4 rises, the switching transistor Q of the protection circuit 14 is turned on, and as a result, the drive circuit 11
The pace current is no longer supplied to the drive transistor Ql, and as a result, the output transistor Q4 is no longer driven.

By the way, the protection circuit 14 has an output transistor Q4.
When the output transistor Q4 is no longer driven as described above, the base potential of the output transistor Q4 decreases, so that the switching transistor Q5 is turned off. Then, the base current to Ql is again supplied to the drive circuit 11, so
A bias current is output from the drive circuit 1 to the output transistor Q4, and the output transistor Q4 is set to the output operation state. In this way, the protection circuit 14 controls the output transistor Q4 to repeat the output operation state and output stop state while the output terminal OUT is short-circuited, and reduces the average output level of the output transistor Q4. This protects the output transistor Q4.

However, in the conventional protection circuit as described above, the output transistor is controlled so that the output operation state and output stop state are returned in green. ) must be configured to repeat the above steps. This abnormality detection level setting is based on the ASO of the output transistor.
This is extremely difficult because the area changes depending on surrounding conditions. For this reason, if the abnormality detection level of the protection circuit is set so that the average output level of the output transistor becomes sufficiently low during a short circuit, a problem will occur in which the protection circuit operates during normal operation.

In addition, due to the above-mentioned problems, some switching circuits such as thyristors (SCRs), which remain on once turned on, are used as switching means for the above-mentioned protection circuits. Even if the output terminal of the output transistor is released from the short-circuited state, the output transistor cannot be returned to the output operating state unless the power is turned off, which is extremely inconvenient in use.

[Purpose of the invention]

This invention was made to improve the above-mentioned problem, and it detects an output abnormality of the output transistor, immediately stops the output operation of the output transistor, and when the output abnormality is removed, the output transistor stops operating. It is an object of the present invention to provide an extremely good protection circuit for an output transistor that can restore the original output operating state.

[Summary of the invention]

That is, the output transistor protection circuit according to the present invention includes an abnormality detection means that generates a set signal when an output abnormality of the output transistor is detected by monitoring the output current and output voltage of the output transistor; Output potential setting means for setting an output potential when the transistor is in a non-operating state; and detecting that the output abnormality of the output transistor has been released by monitoring the output potential by the output potential setting means when the output transistor is in the non-operating state. abnormality release detection means for generating a reset signal in response to the generation of the set signal; and bias control means for interrupting the bias supplied to the output transistor in response to generation of the set signal and canceling the blocking of the bias in response to generation of the reset signal. It is characterized by comprising the following.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described in detail with reference to FIGS. 2 and 3.

Figure 2 shows its basic configuration, with reference numeral 15.1 in the figure.
6 is an input terminal, of which 15 input terminals are connected to the signal source 17 via a coupling capacitor C1, and the input terminal 16 is connected to a resistor R8 and a coupling capacitor C2.
connected to ground via. This input terminal 15.16
has its output terminal connected to the inverting input terminal (-) via the resistor Rf, and is also connected to the load resistor R1 via the output terminal 19 and the coupling capacitor C3. The differential amplifier 18 with the double-bit resistors R8 and J constitutes a power amplification circuit, and amplifies the output signal of the signal source 17 with a gain determined by the resistors R, , J. It outputs to the load resistor R1.

At the output terminal of the differential amplifier 18, a current amount detection circuit 20. A high resistance R41R, a different potential setting circuit 21, and an output potential detection circuit 22 are connected, respectively.

First, the current amount detection circuit 2θ monitors the output current amount of the power amplifier circuit, and when the output current amount increases beyond the ASO region of the output transistor, the set signal S
This outputs the following.

Further, the output potential detection circuit 22 monitors the output potential of the power amplification circuit produced by the potential setting circuit 21, and outputs a reset signal R when this potential is at a normal level.

1. The set signal S and reset signal R outputted from the current amount detection circuit 20 and the output potential detection circuit 22 are supplied to the bias control circuit 24 via a set/reset circuit 23 formed of a switching transistor Q6, respectively. Finally, the bias control circuit 24 is designed so that the reset signal R is not supplied when the set signal S is output. And this bias control circuit 24
outputs the bias cut-off control signal ■ to the control input terminal of the differential amplifier 18 to cut off the bias current of the output transistor when the set signal S is supplied, and when the reset signal R is supplied. This is to stop the output of the bias cutoff control signal V.

Finally, the protection circuit configured as described above operates as follows. That is, when the output terminal 19 is short-circuited to ground or the VCE power supply and the output current of the power amplifier circuit increases, the current amount detection circuit 20 detects this and outputs the set signal S, and the bias voltage is increased. The bias cutoff control signal V is output from the δ control circuit 24.

Therefore, the differential amplifier 18 of the power amplification circuit cuts off the bias current of the output transistor and sets this output transistor to an output stop state.

When the output terminal 19 is released from the short-circuited state, the potential setting circuit 21 returns the output potential of the power amplifier circuit to its original state, so the output potential detection circuit 22 detects this and outputs a reset signal R. However, the output of the bias control signal V to the bias control circuit 24 is stopped. Therefore, the differential amplifier 18 supplies a bias current to the output transistor to return the output transistor to the output operation state again.

Here, regarding the power amplifier circuit equipped with the above-mentioned protection circuit, a specific circuit suitable for integration is shown in FIG. 3, and will be further described in detail. However, in FIG. 3, the same parts as in FIG. 2 are designated by the same reference numerals, and only the main parts will be described.

That is, the differential amplifier 18 includes transistors Q7 to
A differential amplifier circuit 181 consisting of Qtt+resistors R6 to R9,
Drive transistor Q12゜Q131 diode Di
r D2 + a drive circuit 182 consisting of a resistor RIO, an output circuit 183 consisting of a complementary circuit of an output transistor Q 141Q ts, and a transistor Qrs r
Ql? +Resistance Rtt * R12゜Diode D
3 r D 4 bias current supply circuit 184
Consists of. Then, the output terminal a of the output circuit 183 is
is a current amount detection circuit 20. which constitutes the protection circuit. Each connection point b- of the potential setting circuit 2 and the output potential detection circuit 22
connected to d.

First, the current amount detection circuit 20 is connected to the output circuit 183.
transistors Q+s each having an emitter area of 17N for the output transistors Q14 r Qts.
+ Q19, a first current mirror circuit 202 consisting of a transistor Qzo''Q2g, and a second current mirror circuit 203 consisting of a transistor Q23 and a diode D5.

In this current amount detection circuit 20, the complementary circuit 201 detects a current of 17H flowing through the output transistor Q14 + Qls, and depending on the detected current, the transistors Q21 + Q22 of the first current mirror circuit 202 are detected. , each collector current is outputted to the set/reset circuit 23, respectively.

Next, the output potential detection circuit 22 includes a transistor Q2.
4 + Q25, complementary circuit 22,
Operating range setting circuit 222 of the complementary circuit 221 consisting of resistors R13 to R15 and transistor Q2
6, and a current mirror circuit 223 consisting of Q27. This output potential detection circuit 22 detects the collector current of the transistor Q27 and
25 collector currents are output to the set/reset circuit 23, respectively.

This set/reset circuit 23 includes a transistor Q2g
+Q29 and resistor R16, the output current of the transistor Q21 of the current amount detection circuit 20 and the output current of the output potential detection circuit 22 are both supplied to the pace of the transistor Q2g, and the current amount detection circuit 2 is still connected to the current amount detection circuit 2.
The output current of the transistor Q22 of zero type is supplied to the collector of the transistor Q29. The collector of this transistor Q29 is connected to the input terminal e of the bias control circuit 24.

This bias control circuit 24 includes a transistor Qso +
SCR circuit 2 consisting of Q31 and resistors R17 to RI9
41. A switching transistor Q that controls switching of the bias supply circuit 184 of the differential amplifier 18 between an operating state and a non-operating state according to the output of the SCR circuit 241.
It is composed of a bias switching circuit 242 consisting of 32 parts.

The operation of the above configuration will be described below.

Now, in the operating state of the differential amplifier 18, the output terminal 1
9 is shorted to ground. Then, an overcurrent T,1 attempts to flow through the output transistor Q+4. On the other hand, the current amount detection circuit 20 monitors the current I2, which is 1/N of the current 11, using the transistor Q18.
Transistor Q21 of first current mirror circuit 202
゜From Q22, currents I3 and 14 equivalent to the above current I2 are applied to the transistor Q of the set/reset circuit 23, respectively.
and the collector of transistor Q29.

Here, the set/reset circuit 23 controls the current I
2 is the corresponding value when the current 11 becomes an overcurrent, and if the transistor Q2B is set to be in the on state, the transistor Q2g will be in the on state and the transistor Q29 will be in the off state. Current I4
is output to the bias control circuit 24 as a set signal. Then, the bias control circuit 24 sets the SCR circuit 241 to the -H on state and also turns on the switching transistor Q32 of the bias switching circuit 242, thereby increasing the bias current supply circuit 2 of the differential amplifier 28.
The operation of 84 is stopped. Therefore, the differential amplifier 2
8, the bias current is no longer supplied to all circuits, so the output transistor Q14 is in an output stopped state. This state is maintained until the SCR circuit 241 is turned off.

Next, if the output terminal 19 is opened from the short end, the potential at the connection point a will be changed to the resistors R4 and R of the potential setting circuit 21.
, begins to move to the potential set by . Finally, if the resistors R4+R5 are set to R4=R, the potential at the connection point a starts to move toward Vcc/2.

Such potential changes at the connection point a are monitored by the output potential detection circuit 22. Here, this output potential detection circuit 22 will be described. First, in order to simplify the explanation, the resistors R13 to R of the operating range setting circuit 222 will be described.
15 is R13=R14='Rts. In this case, each potential of the connection points f and g in the figure is -vco1V. .

becomes. Therefore, in the transistor Q24 of the complementary circuit 221, the potential at the connection point a, that is, the potential at the connection point d, is Vd1, and if the pace-emitter voltage in the ON state of this transistor Q24 is V+H24, then vd≦−Vcc VIl124 − ( 1) When the transistor Qzs is in the on state, the voltage between the pace and the emitter in the on state is V, then E2S Vd≧−■cc+vB]! ! 25...(2), it is in the on state. (In general, the above transistors Q24 + Q25 each have a voltage of 15 Vd≦R13R14+R15"CC-■mEz4・"(
3) RI4 +R15 Vd≧R13+R14+Ris ”cc + VBZ2
When 5°-(4) is satisfied, it is turned on. ) On the other hand, the potential Va (= Vd) at the connection point a is 1Vee+VB]C25≦Va≦3 ”e e −■RN
24''' (5), the transistors Q241Q25 are turned off.

In other words, this output potential detection circuit 22 operates at the output terminal 1.
9 is short-circuited to the ground, the potential Vd of the connection point d becomes the ground potential, so the transistor Qz< is turned on and the transistor Q2 of the current mirror circuit 223
7, the current I5 is output. Furthermore, this current I
5 is supplied to the pace of the transistor Qzs of the set/reset circuit 23, but at this time, the transistor Q211
is the current I3 already output from the current amount detection circuit 20
is set to the on state by This current I3 is
When the output transistor Q14 of the differential amplifier 18 enters the output stop state, no output is produced.

Then, when the short circuit of the output terminal 19 is opened, the potential va at the connection point a starts moving toward the Vcc/2 potential as described above and exceeds the potential of (a Vcc-vBE□4). Then, the transistor Q24 is turned off, so the current 15 is no longer output. Therefore, the set/reset circuit 23 has the transistor Q2
8 is turned off, and transistor Q29 is turned on.

At this time, the bias control circuit 24 controls the transistor Q
31 is brought to ground potential, the SCR circuit 24 is reset and turned off, thereby stopping the output of the bias cutoff control signal V and setting the switching transformer Qaz to the off state. become. Therefore, the bias current supply circuit 184 returns to the operating state, so that the differential amplifier 18 returns to the output operating state. That is, if the resistors R13 to R15 of the operating range setting circuit 222 are set so that the output current I5 of the output potential detection circuit 22 is outputted to the output transistor Q+4 + Qts outside the range corresponding to the ASO region. , the output transistor Q14 + Q+s can be completely protected.

The above operation is the same even when the output terminal 19 is short-circuited to the VCC power supply side, so the explanation will be omitted here. Let's discuss the case where a cord with a high resistance is shorted to ground.

That is, when the wire is short-circuited as described above, the potential va at the connection point a will not be equal to or lower than the potential at the wire (VCC - BF, □4) due to the resistance of the wire.

In this case, in the above protection circuit, the above output transistor Q
When an overcurrent of 1:1 flows through +4, a current of 13.14 is output from the current amount detection circuit 20 and the bias control circuit 2
The SCR circuit 24 of No. 4 is turned on, thereby stopping the operation of the differential amplifier 18. As a result, the potential at the connection point a becomes the ground potential, so that the transistor Q24 in the output potential detection circuit 22 turns on and outputs the current I5. Then, the transistor 02g of the set/reset circuit 23 turns on, which turns the transistor Q29 off.
The SCR circuit 241 is not reset and remains on. In this way, even if the output terminal 19 is short-circuited by the wire as described above, the protection circuit operates well.

Therefore, if a protection circuit like the one described above is configured in the power amplifier circuit, an abnormal output of the output transistor can be detected and the
Immediately, the output operation of the output transistor is stopped, and when the output abnormality is removed, the output transistor can be returned to its original output operation state.

Note that the output potential detection circuit 22 in the above embodiment has a fourth
It may be configured as shown in FIGS. (a) to (c). That is, the output potential detection circuit shown in FIG. 4(a) uses the potential detection transistors Q24 + Q so as not to affect the output signal during the normal operation of the power amplifier circuit.
Transistors Q33 P Q34 are interposed in the front stage of 25, and the high input impedance type is connected.

However, in the output potential detection circuit shown in FIG. 4(b), when the output terminal 19 is short-circuited to the VCC power supply side, a potential higher than the reverse breakdown voltage is generated between the base and emitter of the potential detection transistors Q24 + Q21. In order to prevent these transistors Q24 + Q25 from breaking down and causing malfunction, a diode D6 is installed in front of the potential detection transistors Q24 + Q25.
．． This is with D7 interposed.

Furthermore, the output potential detection circuit shown in FIG. 4(c) has improved temperature characteristics of the threshold voltage depending on each operating point of the potential detection transistors Q24 + Q25. That is, if there are no diodes D 8 + D 9, the conditions for transistors Q24 + Q25 to be on are as follows:
Since it is given by the above equations (3) and (4), the change due to the temperature characteristics of the pace-emitter voltage VB11!24 + vBE□5 in each transistor Q24 + Q25 will directly affect the threshold value. . However, when the diode D 8+ D g is interposed, the above condition is the forward voltage of the diode.

Q24 vB8. Assuming that Q25 and VBIi are approximately equal, it is given by: Therefore, the change due to the temperature characteristics can substantially improve the temperature characteristics of the threshold value.

Note that the high resistance R41R5 of the potential setting circuit 21 needs to be selected to have a sufficiently large value as a load on the power amplifier circuit, that is, a value that can be ignored during normal operation.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to detect an output abnormality of an output transistor, immediately stop the output operation of the output transistor, and restore the output transistor to its original state when the output abnormality is removed. A good output transistor protection circuit can be provided.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a protection circuit for an output transistor used in a conventional power amplifier, and FIGS. 2 and 3 each show an embodiment of the output transistor protection circuit according to the present invention. Fig. 2 is a circuit diagram showing a basic circuit, Fig. 3 is a circuit diagram showing a protection circuit suitable for an integrated circuit constructed based on the above basic circuit, and Figs. 4 (a) to (c) are respectively related to this invention. FIG. 7 is a circuit diagram showing another embodiment. 15.16...Input terminal, 17...Signal source, 18.
...Differential amplifier, 18th...Differential amplifier circuit, 182.
...Drive circuit, 183...Output circuit, 184...Bias current supply circuit, 19...Output terminal, 20...
Current amount detection circuit, 21...Potential setting circuit, 22...
Output potential detection circuit, 23...set/reset circuit 2
4...Bias control circuit, S...set signal, R...
...Reset signal, ■...Bias cutoff control signal.

Claims (1)

[Claims] Abnormality detection means for generating a set signal when detecting an output abnormality of the output transistor by monitoring the output current and output voltage of the output transistor; and output potential setting means for setting the output potential of the output transistor in a non-operating state. and abnormality release detection means for detecting that the output abnormality of the output transistor has been released by monitoring the output potential by the output potential setting means when the output transistor is in a non-operating state and generating a reset signal;
An output transistor comprising: bias control means for cutting off the bias supplied to the output transistor in response to the generation of the set signal and releasing the blocking of the bias in response to the generation of the reset signal. protection circuit.