JPS6010819A - Adaptive type echo cancellor - Google Patents

Adaptive type echo cancellor

Info

Publication number
JPS6010819A
JPS6010819A JP11695683A JP11695683A JPS6010819A JP S6010819 A JPS6010819 A JP S6010819A JP 11695683 A JP11695683 A JP 11695683A JP 11695683 A JP11695683 A JP 11695683A JP S6010819 A JPS6010819 A JP S6010819A
Authority
JP
Japan
Prior art keywords
echo
signal
time
response
estimate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11695683A
Other languages
Japanese (ja)
Other versions
JPS6343016B2 (en
Inventor
Nobuaki Kitamura
北村 暢明
Takashi Usami
宇佐見 尚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11695683A priority Critical patent/JPS6010819A/en
Publication of JPS6010819A publication Critical patent/JPS6010819A/en
Publication of JPS6343016B2 publication Critical patent/JPS6343016B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/231Echo cancellers using readout of a memory to provide the echo replica
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/20Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/237Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using two adaptive filters, e.g. for near end and for end echo cancelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To relax as required a requested internal processing speed by providing a prescribed delay to an estimate operation of an echo line response at next time from the response of estimate echo line at a time by means of the study identification method so as to apply adaptive correcting processing. CONSTITUTION:An input signal is coded by an A/D converter 41 and stored in a register 42 as an input signal time series (xj). A prescribed operation is applied to an output x'j of the register 42 at a time jT ((j) is an integral number and T is a sample period) and an estimate echo response h'j from an echo response (h) register 43 at a convolution circuit 45, an estimated echo signal by D/A-converting 49 the output and the difference between said signal and an actual echo signal Y is operated by a subtractor 50. A specific formula is operated by operating circuits 44, 47 and a correction circuit 46 from a signal as result of A/D conversion 48 of a residual difference output of the subtractor 50 and a signal giving delays 51, 52 to the signal x'j so as to obtain an estimate echo line response h'j+1 at the next time (j+1)T.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、学習同定法を用いた適応形反響打消装置に係
シ1、特に推定反響路応答の適応修正演算方式に関する
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an adaptive echo cancellation device using a learning identification method, and more particularly to an adaptive correction calculation method for an estimated echo path response.

〔技術の背景〕[Technology background]

一般に、長距離電話回線等においては、2線。 Generally, long-distance telephone lines have two wires.

4線切換部において相手局から伝送されてきた信号の一
部が漏洩して相手局に返送されることを防止するために
、第1図に示されるように4線側回路に反響打消装置が
挿入されている。このような反響打消装置としては、設
置局から加入者側を見た反響路を経て反響が戻ってくる
絶対遅延量と反響路の伝達特性によって決まるイン・ぐ
ルス応答を学習同定法によシ推定するようにした適応形
反響打消装置が用いられる。このような適応形反響打消
装置の概略的構成が第2図に示される。
In order to prevent part of the signal transmitted from the partner station from leaking at the 4-wire switching unit and being sent back to the partner station, an echo canceling device is installed in the 4-wire side circuit as shown in Figure 1. It has been inserted. Such an echo canceling device is designed using a learning identification method to determine the in-wave response, which is determined by the absolute amount of delay for the echo to return via the echo path seen from the installed station to the subscriber side, and the transfer characteristics of the echo path. An adaptive echo cancellation device is used to estimate the amount of noise. A schematic configuration of such an adaptive echo canceling device is shown in FIG.

〔従来技術と問題点〕[Conventional technology and problems]

従来技術の適応形反響打消装置においては、反響路のイ
ンパルス応答りの推定値を学習同定法によシ適応修正す
るための演算アルゴリズムとして、を用いてる。これを
実行するための回路構成が第3図に示される。第3図に
おいて、1は相手局送信部、2は相手局受信部、3は反
響経路、4は適応形反響打消装置である。
In the adaptive echo canceling device of the prior art, the following is used as a calculation algorithm for adaptively correcting the estimated value of the impulse response of the echo path by the learning identification method. A circuit configuration for implementing this is shown in FIG. In FIG. 3, reference numeral 1 denotes a transmitting section of the opposite station, 2 a receiving section of the opposite station, 3 an echo path, and 4 an adaptive echo canceling device.

第3図の反響打消装置4においては、1サンプル周期以
内に 晧、=貼孔 なる一連の処理を完了させる必要があシ、高速処理が要
求される。
In the echo canceling device 4 shown in FIG. 3, it is necessary to complete a series of processes for filling holes within one sample period, and high-speed processing is required.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、前記の問題点にがんがみ、適応形反響
打消装置において、適応修正演算方式を改良することに
よシ、要求される内部処理速度を必要に応じて緩和でき
るようにすることKある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to improve the adaptive correction calculation method in an adaptive echo canceling device so that the required internal processing speed can be reduced as necessary. There's K things to do.

〔発明の構成〕[Structure of the invention]

前記の目的を達成するために、本発明′VCおいては、
学習同定法により反響路応答りを推定して入力信号時系
列Xから予想される反響信号をめて実際の反響信号から
減算するようにした適応形反響打消装置において、Tを
サンプル周期、jを整数とし、時刻JTにおける推定反
響路応答9jから、α:修正係数(0〈α〈2)、 ej:時刻JTにおける打消残差信号、xj:時刻JT
における入力信号時系列、m:自然数、 なる演算によって次の時刻(j+1)Tにおける推定反
響路応答Gj+1 を得ることを特徴とした適応形反響
打消装置が提供される。
In order to achieve the above object, in the present invention'VC,
In an adaptive echo canceling device that estimates the echo path response using a learning identification method and subtracts the expected echo signal from the input signal time series X from the actual echo signal, T is the sampling period and j is As an integer, from the estimated echo path response 9j at time JT, α: correction coefficient (0<α<2), ej: cancellation residual signal at time JT, xj: time JT
An adaptive echo canceling device is provided, characterized in that an estimated echo path response Gj+1 at the next time (j+1)T is obtained by the calculation of an input signal time series, m: a natural number.

〔発明の実施例〕[Embodiments of the invention]

本発明の詳細な説明する前に、比較のために 1前述の
第1図に示される従来技術の適応形反響打消装置につい
て説明する。第3図の装置の動作タイムチャートが第5
図(、)に示される。第3図の反響打消装置4において
は、入力信号がN勺変換器41において符号化され、入
力信号時系列xjとして;レジスタ42に格納される。
Before describing the present invention in detail, the prior art adaptive echo canceling device shown in FIG. 1 mentioned above will be described for comparison. The operation time chart of the device in Figure 3 is shown in Figure 5.
Shown in Figure (,). In the echo canceling device 4 of FIG. 3, an input signal is encoded in an N-code converter 41 and stored in a register 42 as an input signal time series xj.

時刻JTにおける;レジスタ42の出力;jおよびもレ
ジスタ43の出会 へ 力hjはたたみ込み回路45においてy j=’Zxj
−I Jの計算が行われ(■)、推定反響出力yjから
D/A変換器49によシアナログ出力yが得られる(■
)。
At time JT, the output of register 42;
- I J is calculated (■), and the D/A converter 49 obtains the analog output y from the estimated echo output yj (■
).

アナログ減算回路50において実際の反響出力yから推
定値yが減算され残差信号9=y−yが得られる(■)
。この残余信号eはン巾変換器48においてディジタル
出力ejに変換される(■)。
The estimated value y is subtracted from the actual reverberation output y in the analog subtraction circuit 50, and a residual signal 9=y−y is obtained (■)
. This residual signal e is converted into a digital output ej by a width converter 48 (■).

一方、演算回路44においては+xj+2が計算され、
演算回路47においてΔj=αej/1xj12が得ら
れへ る(■)。hレジスタ修正回路46においては、第3図
の従来技術の反響打消装置においては、前記の一連の直
列処理を1サンプル周期T(例えば125μB)の間に
行う必要があシ、高価な高速演算回路、高速に勺変換器
、高速D/A変換器が必要である。
On the other hand, +xj+2 is calculated in the arithmetic circuit 44,
The arithmetic circuit 47 obtains Δj=αej/1xj12 (■). In the prior art echo canceling device shown in FIG. 3, the h register correction circuit 46 requires an expensive high-speed arithmetic circuit because the series of serial processing described above must be performed during one sample period T (for example, 125 μB). , a high-speed converter and a high-speed D/A converter are required.

本発明の一実施例としての適応形反響打消装置が第4図
に示される。第4図の対応する部分には第3図と同一の
参照番号が用いられている。蕗4図の反響打消装置にお
いては、前記の第3図の装置において1サンプル周期内
に全部終了させる必要があった一連の処理が、パイプラ
イン化によシ、それぞれの処理をいずれも1サンプル周
期内に終了すればよい。なお、遅延回路51.52は、
データのサンプリング位置のずれを防止するものである
An adaptive echo cancellation system according to one embodiment of the present invention is shown in FIG. Corresponding parts in FIG. 4 have the same reference numerals as in FIG. 3. In the echo canceling device shown in Fig. 4, the series of processes that needed to be completed within one sample period in the device shown in Fig. It is sufficient to finish within the period. Note that the delay circuits 51 and 52 are
This prevents the data sampling position from shifting.

第4図の装置における各部の動作タイムチャートが第5
図の(b)〜0)に示される。第5図の(、)において
1サンプル周期以内に全部を終了させる必要があった一
連の処理■〜■は、本実施例においては、パイプライン
化することによって■〜■各々の処理がいずれもT以内
に終了すればよくなるため、処理速度は大幅に緩和され
る。時刻jにおける入力;jは■、[相]、@、@、@
、(1)の処理を経て時刻j+4において8j+6を発
生する。従って時刻jにおいては、 なる演算によって推定反響路応答を修正する。上式は本
来の修正式 小 に比べ、時刻jにおいてm = 5回分だけhに対する
修正回数が少くな9ているだけである。従って回の修正
が行われるから、修正回数の5回の増加は実用上全く問
題とならない。このように本発明によれば、収束条件、
収束演算回数に実用1伺の不利を生ずることなく、内部
処理速度の大幅な緩和が可能となる。
The operation time chart of each part of the device in Figure 4 is shown in Figure 5.
It is shown in (b) to 0) of the figure. In this embodiment, the series of processes ■ to ■ that needed to be completed within one sample period in (,) in FIG. Since the process only needs to be completed within T, the processing speed is significantly reduced. Input at time j; j is ■, [phase], @, @, @
, 8j+6 is generated at time j+4 through the processing of (1). Therefore, at time j, the estimated echo path response is modified by the following calculation. Compared to the original correction formula, the above formula only requires m = 5 fewer modifications to h at time j. Therefore, since the number of corrections is made, an increase of five times in the number of corrections does not pose any practical problem. As described above, according to the present invention, the convergence condition,
It is possible to significantly reduce the internal processing speed without causing a practical disadvantage in the number of convergence operations.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、適応形反響打消装置において、要求さ
れる内部処理速度を大幅に低下させることができ、それ
によシ低価格の低速回路部品を用いることか可能になる
According to the present invention, it is possible to significantly reduce the required internal processing speed in an adaptive echo cancellation system, thereby allowing the use of low cost, slow circuit components.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、適応形反響打消装置の適用例を示す図、 第2図は、適応形反響打消装置の一般的な構成を示す図
、 t43図は、従来技術の適応形反響打消装置の回路図、 第4図は、本発明の一実施例としての適応形反響打消装
置の回路図、 第5図は、第3図および第4図の装置の動作タイムチャ
ートを示す図である。 (符号の説明) 1;送信部、2:受信部、3:反響路、4:反響打消装
置、41 :A、/11m変換器、42:;レジスタ、
43:1ルジスタ、44:演算回路、45: )たたみ
込み回路、46:修正回路、47:演算回路、48 :
 A/D変換器、49 : D/A変換器、50:アナ
ログ減算器、51.52:遅延回路。
Fig. 1 is a diagram showing an example of application of the adaptive echo canceling device, Fig. 2 is a diagram showing a general configuration of the adaptive echo canceling device, and Fig. t43 is a circuit of a conventional adaptive echo canceling device. 4 is a circuit diagram of an adaptive echo canceling device as an embodiment of the present invention, and FIG. 5 is a diagram showing an operation time chart of the device of FIGS. 3 and 4. (Explanation of symbols) 1: Transmitting section, 2: Receiving section, 3: Echo path, 4: Echo canceling device, 41: A, /11m converter, 42:; Register,
43: 1 registor, 44: arithmetic circuit, 45: ) convolution circuit, 46: correction circuit, 47: arithmetic circuit, 48:
A/D converter, 49: D/A converter, 50: Analog subtracter, 51.52: Delay circuit.

Claims (1)

【特許請求の範囲】 学習同定法によシ反響路応答りを推定して入力信号時系
列Xから予想される反響信号をめて実際の反響信号から
減算するようにした適応形反響α:修正係数(0くα〈
2)、 ej:時刻JTにおける打消残差信号、xj:時刻JT
における入力信号時系列、m:自然数、 なる演算によって次の時刻(j+1)Tにおける推定反
響路応答9j+1を得ることを特徴とした適応形反響打
消装置。
[Claims] Adaptive echo α in which the echo path response is estimated by a learning identification method, and the echo signal expected from the input signal time series X is subtracted from the actual echo signal: Modification Coefficient (0kuα〈
2), ej: cancellation residual signal at time JT, xj: time JT
An adaptive echo canceling device characterized in that an estimated echo path response 9j+1 at the next time (j+1)T is obtained by an operation such as an input signal time series, m: a natural number.
JP11695683A 1983-06-30 1983-06-30 Adaptive type echo cancellor Granted JPS6010819A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11695683A JPS6010819A (en) 1983-06-30 1983-06-30 Adaptive type echo cancellor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11695683A JPS6010819A (en) 1983-06-30 1983-06-30 Adaptive type echo cancellor

Publications (2)

Publication Number Publication Date
JPS6010819A true JPS6010819A (en) 1985-01-21
JPS6343016B2 JPS6343016B2 (en) 1988-08-26

Family

ID=14699893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11695683A Granted JPS6010819A (en) 1983-06-30 1983-06-30 Adaptive type echo cancellor

Country Status (1)

Country Link
JP (1) JPS6010819A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112888520B (en) * 2018-10-23 2024-04-19 京瓷株式会社 Cutting insert, cutting tool, and method for manufacturing cut product
JP6855024B1 (en) 2020-10-02 2021-04-07 株式会社タンガロイ Cutting inserts and cutting tools equipped with them

Also Published As

Publication number Publication date
JPS6343016B2 (en) 1988-08-26

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