JPS6010675A - Charge coupled device - Google Patents

Charge coupled device

Info

Publication number
JPS6010675A
JPS6010675A JP11852483A JP11852483A JPS6010675A JP S6010675 A JPS6010675 A JP S6010675A JP 11852483 A JP11852483 A JP 11852483A JP 11852483 A JP11852483 A JP 11852483A JP S6010675 A JPS6010675 A JP S6010675A
Authority
JP
Japan
Prior art keywords
gate
region
charge
reset
coupled device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11852483A
Other languages
Japanese (ja)
Inventor
Atsushi Ozeki
淳 尾関
Masayuki Matsunaga
誠之 松長
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP11852483A priority Critical patent/JPS6010675A/en
Publication of JPS6010675A publication Critical patent/JPS6010675A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76816Output structures

Abstract

PURPOSE:To eliminate the induction noise generated in a floating region by varying the voltage applied to an output gate reversely in synchronization with the variation in the potential of a resetting gate. CONSTITUTION:A charge transfer unit is formed of an n<-> type region 12 on an n-well formed on a p type substrate 10, and transfer electrodes TG1-3, and the variation in the potential of the adjacent floating region FE to the n<-> type region under an output gate OG is detected by an output amplifier 15. The potentials which are displaced by 180 deg. out of phase are applied to the transfer electrodes by 2-phase drive system, the signal charge is transferred to the transfer electrode TG1 of the final stage, and transferred to the floating region FD. A reset gate RS is set to a high level to exhaust the signal charge stored in the region FE to a reset drain region RD. In this case, the gate OG is simultaneously set to low level, thereby preventing the generation of induction noise.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は電荷結合素子をこ係り、特にフローテイングデ
イフ1−ジョン法により信号電荷を検出する電荷結合素
子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a charge-coupled device, and more particularly to a charge-coupled device that detects signal charges by a floating diffusion method.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来の電荷結合素子は、信号電荷を転送する転送電極の
最終段の転送電極TGに隣接して出力ゲートOG、フロ
ーティング領域FD、リセットゲートR31リセットド
レイン領域RDを設け、フローティング領域FDの信号
電荷による電位変化を検出して出力信号を得ている。こ
の電荷結合素子の動作を、第1図第2図を用いて説明す
る。最終転送電・雨TGまで転送された信号電荷7aは
、時刻t1において最終転送電極TGを高レベル5bに
することにより生ずる′電位の井戸5に蓄積される。次
に時刻t2で最終転送電極TGを低レベル5aに変化さ
せると、信号゛電荷7aは、出力ゲー) OGの電位レ
ベル4aを越えてフローティング領域FDに転送され、
フローティング領域FDに蓄積される。この信号電荷7
aによる電位変化を検出した後、時刻t3でリセットゲ
ートR8を高レベル2bにして信号電荷7aをリセット
ドレイン領域RDに排出する。以上の動作を繰り返して
、転送されてくる信号電荷を次々と検出する。
A conventional charge-coupled device has an output gate OG, a floating region FD, a reset gate R31, and a reset drain region RD adjacent to the final stage transfer electrode TG for transferring signal charges, so that the signal charges in the floating region FD are The output signal is obtained by detecting potential changes. The operation of this charge coupled device will be explained using FIG. 1 and FIG. 2. The signal charges 7a transferred to the final transfer electrode TG are accumulated in the potential well 5 generated by setting the final transfer electrode TG to a high level 5b at time t1. Next, when the final transfer electrode TG is changed to the low level 5a at time t2, the signal ``charge 7a'' exceeds the potential level 4a of the output gate OG and is transferred to the floating region FD.
Accumulated in floating area FD. This signal charge 7
After detecting the potential change due to a, the reset gate R8 is set to high level 2b at time t3, and the signal charge 7a is discharged to the reset drain region RD. By repeating the above operations, the transferred signal charges are detected one after another.

ところが従来の電荷結合素子の出力信号には、信号電荷
による電位変化に加えて、リセットゲートR8の電位変
化によるリセット誘電ノイズが金談れるという問題があ
った。すなわち、第2図に示すように時刻t4でリセッ
トゲー+−It sを高レベル2bから低レベル2aに
変化させると、その変化に引きずられて出力信号はレベ
ル3aからレベル3bに変化する。その後時刻t2で最
終転送電極TGが低レベルになると信号電荷7aが転送
され、出力信号のレベルは3cに変化する。このように
信号電荷7aによる変化に加えてリセットゲートR8の
リセット誘導ノイズ分が加わったものとなる。このリセ
ット誘導ノイズ分は取り除く必要があるが、その大きさ
は素子により異なる上に非常に高周波であるため取り除
くことができなかった。
However, the output signal of the conventional charge-coupled device has a problem in that, in addition to the potential change caused by the signal charge, there is reset dielectric noise caused by the potential change of the reset gate R8. That is, as shown in FIG. 2, when the reset gate +-Its is changed from high level 2b to low level 2a at time t4, the output signal changes from level 3a to level 3b due to the change. Thereafter, at time t2, when the final transfer electrode TG becomes low level, the signal charge 7a is transferred, and the level of the output signal changes to 3c. In this way, in addition to the change caused by the signal charge 7a, the reset induced noise of the reset gate R8 is added. Although it is necessary to remove this reset induced noise, it has not been possible to remove it because its magnitude differs depending on the device and its frequency is very high.

〔発明の目的〕[Purpose of the invention]

本発明は上記事情を考慮してなされたもので、リセット
誘導ノイズのない出力信号を得ることができる電荷結合
素子を提供することを目的とする。
The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a charge-coupled device that can obtain an output signal without reset-induced noise.

〔発明の概−安〕[Summary of the invention]

この目的を達成するために本発明による電荷結合素子は
、リセットゲートに同期して逆方向に出力ゲートに印加
する電圧変化させることを特赦と丈る。これによりフロ
ーティング領域に生ずる誘導変化を相殺させて打消す。
To achieve this objective, the charge-coupled device according to the present invention allows the voltage applied to the output gate to be varied in the opposite direction in synchronization with the reset gate. This cancels out induced changes occurring in the floating region.

〔発明の実施しU〕[Practice of the invention]

本発明の一央Mli例による電荷結合素子を第3図に示
ず。′1a荷転送部は、P型基板10上に形成されたn
ウェル11中の「領域12と、絶縁層13中の転送−@
L惨TGI 、 TG2 、 TG3とで構成される。
A charge coupled device according to a central Mli example of the present invention is not shown in FIG. '1a load transfer section is formed on the P-type substrate 10.
“Region 12 in well 11 and transfer in insulating layer 13-@
It consists of L-TGI, TG2, and TG3.

最終段の転送屯、雨TGIに瞬接して出力ゲートOGが
絶(硬層13中に形成される。出力ゲートOG下のn−
領域に隣接して、転送されてきた1d号電荷を蓄積する
n+ +のフローティング領域FD1n領域14、リセ
ットドレイン領域RDが形成されている。n領域14上
 1には、絶縁層13中にリセットゲートR8が形成さ
れている。またフローティング@ bj2 F Dには
出力増幅器15が接続され、フローティング領域FDの
・電位変化を検出している。
At the final stage transfer gate, the output gate OG is disconnected by instantaneous contact with the rain TGI (formed in the hard layer 13. n- below the output gate OG).
Adjacent to the region, an n++ floating region FD1n region 14 that accumulates the transferred No. 1d charge and a reset drain region RD are formed. A reset gate R8 is formed in the insulating layer 13 on the n region 14. Further, an output amplifier 15 is connected to the floating @bj2 FD, and detects potential changes in the floating region FD.

この電荷結合素子の動作を′m4図、第5図を用いて説
明する。転送′ぼ極TGIとTG3に加えられるα位V
φH3と転送電極TG2に加えられる電位VφH2とは
180”位相がずれ、2相祁動方式により信号電荷が転
送される。最終段の転送電極TGIまで転送された信号
電荷7aは、時刻1.において転送電極TGIを高レベ
ル5bにすることにより生ずる電位の井戸5に#積され
る。次に時刻t、で転送電極TGIを低レベル5aにす
ることにより、信号′!!、荷7aを出力ゲートOGの
電位レベル4aを越えてフローティング領域FDに転送
するが、その前にフローティング領域FDを空にしてお
くため、時刻t。
The operation of this charge-coupled device will be explained with reference to Figures 4 and 5. α-position V added to transfer'bocal pole TGI and TG3
φH3 and the potential VφH2 applied to the transfer electrode TG2 are out of phase by 180'', and the signal charge is transferred by the two-phase purging method.The signal charge 7a transferred to the final stage transfer electrode TGI is at time 1. The potential generated by setting the transfer electrode TGI to a high level 5b is multiplied in the well 5.Next, by setting the transfer electrode TGI to a low level 5a at time t, the signal '!!, load 7a is applied to the output gate. OG exceeds the potential level 4a and is transferred to the floating area FD, but in order to empty the floating area FD before that, at time t.

から時刻t、の間リセットゲートR8を高レベル2bに
して、すでに蓄積されている信号電荷をリセットドレイ
ン領域RDに排出する。このとき同時に出力ゲートOG
を逆に低レベル4bにする。信号′、6荷の排出終了後
、時刻t4でリセットゲートR8を低レベル2aにもど
す。出力ゲー1−OGも同時に高レベル4aにもどされ
る。
From time t to time t, the reset gate R8 is set to high level 2b, and the already accumulated signal charge is discharged to the reset drain region RD. At this time, the output gate OG
On the contrary, set it to low level 4b. After the discharge of the signal '6, the reset gate R8 is returned to the low level 2a at time t4. The output game 1-OG is also returned to the high level 4a at the same time.

このように動作させることにより、フローティング領域
FDは、隣接するリセットゲーIR8の電位変化により
引きずられるが、同時に隣接する出力ゲートOGの電位
変化にも引きずられることになる。ところが、リセット
ゲー1−R8の電位変化の方向と、出力ゲートOGの・
−位変化の方向とは互いに逆方向であるため、結局相殺
されてフローティイブ領域FDには誘導ノイズが発生ぜ
ず、出力信号Vout は澗号磁荷による′、6位変化
だけを示すことになる。
By operating in this manner, the floating region FD is dragged by a change in the potential of the adjacent reset gate IR8, but at the same time, it is also dragged by a change in the potential of the adjacent output gate OG. However, the direction of the potential change of the reset gate 1-R8 and the direction of the potential change of the output gate OG are
Since the direction of the change in the − position is opposite to the direction of the change, they are eventually canceled out, and no induced noise is generated in the floating region FD, and the output signal Vout shows only the change in the ′ and 6 positions due to the magnetic charge. Become.

なお先の実施例では2相1駆動であったが、3相1嘔動
や4相A’7A動等の多相駆動でもよい。
In the previous embodiment, a two-phase one drive was used, but a multi-phase drive such as a three-phase one motion or a four-phase A'7A motion may be used.

〔発明の効果〕〔Effect of the invention〕

以上の通り本発明によれば、出力ゲートをリセットゲー
トと逆相に変化ざぜるようQこするだけで、リセット誘
導ノイズのないSN比のよい出力信号を得ることができ
る。
As described above, according to the present invention, it is possible to obtain an output signal with a good S/N ratio without reset-induced noise simply by Q-rubbing the output gate so that it changes in phase opposite to that of the reset gate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の電荷結合素子の電位レベルを示す図、第
2図は同電荷結合素子の動作を示すタイムチャート、第
3図は本発明の一実施例による電荷結合素子の断面図、
第4図は同電荷結合素子の電位レベルを示す図、第5図
は同電荷結合素子の動作を示すタイムチャートである。 RD・・リセットドレイン鎖板、R8・・・リセットゲ
ート、1゛D・・フローテインク・線域、OG・・・出
力ゲート、TG、TGI 、TG2.TG3・・転送′
百極。 出願人代理人 猪 股 清 (7) 第1図 第2図 第4図 第5図
FIG. 1 is a diagram showing the potential level of a conventional charge-coupled device, FIG. 2 is a time chart showing the operation of the same charge-coupled device, and FIG. 3 is a cross-sectional view of a charge-coupled device according to an embodiment of the present invention.
FIG. 4 is a diagram showing the potential level of the charge coupled device, and FIG. 5 is a time chart showing the operation of the charge coupled device. RD...Reset drain chain plate, R8...Reset gate, 1゛D...Float ink line area, OG...Output gate, TG, TGI, TG2. TG3...Transfer'
Hundred poles. Applicant's agent Kiyoshi Inomata (7) Figure 1 Figure 2 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】 信号電荷を転送する複数の転送電極と、前記複数の転送
電極の最終段の転送電極に隣接する出力ゲートと、この
出力ゲートに瞬接し、この出力ゲートの電位を越えて流
入する信号電荷を蓄積する浮遊蓄積領域と、この浮遊蓄
積領域に蓄積された信号電荷を検出する検出部と、前記
浮遊拡散領域に隣接し、前記浮遊拡散領域に蓄積された
信号電荷をドレイン領域に排出するリセットゲートキを
備えた電荷結合素子において、 前記出力ゲートに印加する′亀圧は、前記リセットゲー
トに印加する′電圧の変化に同期して、前記リセットゲ
ートに印加する゛電圧の変化と逆方向に変化することを
特徴とする電荷結合素子。
[Scope of Claims] A plurality of transfer electrodes that transfer signal charges, an output gate adjacent to the final stage transfer electrode of the plurality of transfer electrodes, and an output gate that is in momentary contact with the output gate and whose potential exceeds the output gate. a floating accumulation region that accumulates incoming signal charges; a detection section that detects the signal charges accumulated in the floating accumulation region; In a charge-coupled device equipped with a reset gate voltage, the voltage applied to the output gate is synchronized with a change in the voltage applied to the reset gate. A charge-coupled device characterized by changing in the opposite direction.
JP11852483A 1983-06-30 1983-06-30 Charge coupled device Pending JPS6010675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11852483A JPS6010675A (en) 1983-06-30 1983-06-30 Charge coupled device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11852483A JPS6010675A (en) 1983-06-30 1983-06-30 Charge coupled device

Publications (1)

Publication Number Publication Date
JPS6010675A true JPS6010675A (en) 1985-01-19

Family

ID=14738737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11852483A Pending JPS6010675A (en) 1983-06-30 1983-06-30 Charge coupled device

Country Status (1)

Country Link
JP (1) JPS6010675A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220185A (en) * 1991-08-22 1993-06-15 Sony Corporation Ccd shift register
US5239192A (en) * 1991-02-28 1993-08-24 Sony Corporation Horizontal charge transfer register

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239192A (en) * 1991-02-28 1993-08-24 Sony Corporation Horizontal charge transfer register
US5220185A (en) * 1991-08-22 1993-06-15 Sony Corporation Ccd shift register

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