JPS60106072A - Recording system of data - Google Patents

Abstract

PURPOSE:To record data precisely by recording additional record block data including the same data as preformat block data by putting a splice gap of a certain interval, following the preformat block data at the time of recording data and by recording record data continuously. CONSTITUTION:When a counted value of a sector counter 10 matches to a start sector, a control circuit 15 drives a laser driver 21 and records four header frames as an additional record header, followed by a splice gap of two bits. Successively the control circuit 15 records 152 data frames on record data. The control circuit 15 compares generated header address data of a reverse phase with eight bits, following a header frame synchronizing code and header address data of a regular phase, with an exclusive logical sum by bit. When the header address data with a reverse phase become equal to those with a regular phase, the control circuit 15 makes data, with have been recorded just after a block header of a heder frame, reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention is applicable to, for example, recording or reproducing data on an optical disk. A data recording method used for Tisfu-made bean paste.

[Technical background for invention]

In recent years, a large amount of image information has been generated using two-dimensional optical transport, and the image information that has been converted to Kyuden can be recorded on an image recording device, or it can be An optical disc device is used as an image recording device in an image information file device that can reproduce and output the image as a cedar, cable, pigeon copy, or soft copy depending on the need.

Conventionally, in such optical disk devices, an optical disk that stores data in a spiral is used, and an optical head that is moved linearly in the radial direction of the disk by a linear motor records or reproduces the data. The above optical discs have a spiral shape or a single shape.
The 61-circular track is divided into blocks each having a fixed length of β1, and all block address data is recorded in advance at the beginning of each block.

[Problems with senior technology]

However, in the above-mentioned devices, data was recorded following the block address data, so there was a problem in accurately recording and reproducing data.

[Purpose of the invention]

This invention was developed in view of the above circumstances, and its purpose is to provide a complete data recording method that allows data to be recorded accurately.

[Overview of sealing]

This invention records an additional recording block take containing the same data as the 7" re-formatted block data by cutting splice gaps at regular intervals following the data record 11 preformat block data, and records the additional recording block take containing the same data as the 7" reformat block data. Continuing with the data, write the data gr',
It was designed to be recorded.

[Practice of the Invention 911] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

In FIG. 1, the optical disk (disk) l is motor 2.
It is designed to be rotationally driven by. As shown in FIG. 2, the optical disc 1 has a donut-shaped metal film layer such as tellurium or bismuth coated on the surface of a circular substrate made of glass or plastic, for example. A notch tab reference position mark J1 is provided near the center of the A coating layer. It's a moat, the above optical disc J has the base fiP position marks,
Divided into 256 sectors from 0 to 255 with 0 as ζ
Ne: Like f, 4.

On the above-mentioned optical disk 1, a fixed length of information can be stored over a number of blocks, and 300,000 blocks of information are stored on 36,000 tracks on 6 disks.
It is now recorded as e-recording. Note that the optical disc 7
For example, the number of 1 pro '7'/no sectors is 1 in
111 has 40 sectors, and the outside has 20 sectors. In addition, if the block does not end at the sector switching position, a block gap is provided as shown in the 0th block and 1st block shown in 21 ￥1, so that each block always starts from the sector switching position. It looks like this. Is there a block in the 1tFl #7 position of the above block? A block header A consisting of , number, track design, etc. is recorded, for example, when the optical disc 1 is manufactured.

Further, as shown in FIG. 3, the optical disc has an unrecorded track area la, a user access inaccessible area lb, and a user access north area I-Ij from the innermost track.
c consists of L pieces. The above-mentioned F-free recording track area Ja consists of, for example, the innermost 10 tracks, and is provided as a margin area for detection and eccentricity correction of the innermost track. The upper 8i:l user-inaccessible area lc is made up of a block for an access error caused by the optical 9 head 12 mentioned above at the time of access, and is made up of, for example, 200 blocks (hex). Only a block header A is recorded in each block of this user access Komachi area lb.

The above user-accessible area IC has defective block knowledge.
Riyu'@recording area 1d and data block recording area 1
It is composed of e. Above defective block 'It
In the H1it information recording area 1d, defective block management information consisting of the (start) address of a defective block and the number of consecutive defective blocks is recorded. The defective block management information is recorded as shown in Table 1, for example.

Table 1 FIGS. 4(a) and 4(b) show the Ni2 recording format of fixed length blocks recorded along the track grooves on the optical disc 1. The above block is composed of a block header area and a data area. The block header area is composed of 39-byte preamble data indicated by 1B3'', a preheader consisting of 8 frames, and an additional recording header consisting of 4 7 frames. Between the above preheader and additional recording header. One frame is provided with a sedge gap caused by a recording time lag.

The above pre-header is a header that is written in advance before the user records data on the optical disc J, and the additional recording header is recorded after the pre-header of that block and before the encoded data when recording data for this block. It is a header.

Each frame of the above pre-header consists of 39 bytes,
1 byte header frame synchronization code (block synchronization code), 8 bytes each of forward and reverse polarity header address data, and 22 bytes of 1B3 as dummy data.
For example, positive polarity is “101”.
If it is 0J, ]men 4 sail (13 is JOI which is the reverse of that)
0-hi which is OIJ, the address take is 1 byte of the frame in the frame, F% 3) The block of the write is the 2-byte track II7 and 2-byte as dummy take. 900 "Data 17"
It has been completed. The frame numbers in the header are 1 to 12t and are assigned to the number 1 in the kitakami, which separates the 12 frames in the same block header. The above header frame synchronization code is, for example, encoded data in which 8 '0's such as ``B3'' data are modulated in accordance with 2-7 code conversion and modified in part to rolooolooooooooo (IlooJ) are recorded. When the encoded data is turned down, the encoded data is adjusted to B3" and the frame is turned into a 1-byte header frame. The frame with the splice gap is 7'reheaded." The same Jtll code, 8 bytes. forward and reverse header address data, 2 bytes of dummy data, and 6 self-i
-A II; is implanted from a 2-byte splice gap used for j, and 18-byte dummy data of jJi+11←header ilj.

The above data area consists of 152 data frames,
Each data frame is modified by the recording data frame 2-7 modulation and consists of a 1-byte (data) frame synchronization code and 38 bytes of 71-norm cutout data. The above 71-nome same J code is, for example, 'B3
The encoded data “oloooloooooooooooJ” is recorded by modulating the data according to the f2-7 code conversion shown in Table 2 below. It can be divided into data.The above frame period code is the period X at the code separator position when reading
This is to take l+ and also take all the synchronization pieces 1 of the data frame. Furthermore, each frame is given an ECC code (error correction code) for error checking.

2 In other words, the control circuit J5, which will be described later, increments the block data of 4 Kbytes (fil fixed length) from the user using the button, as shown in Figure 5, and increments it with the FCC addition circuit 3. , an ECC code (error correction code) is added to make encoded data of 5776 bytes, this data is cut into 7 frame data of 38 bytes each at the 7 frame cutting exit path 32, and a frame synchronization code is added to this frame data. A circuit 33 adds a frame synchronization code to output 152 frames of 39-byte frame data.

The above frame synchronization code has a modulated code of V″0
0 is a pattern of 7 consecutive “0” like this
For a turn in which 7 consecutive occurrences of "" occur, 1 byte of data is 9F3".

It can be seen from the 2-7 variable table shown in Table 2 that this can occur when either '133'' or 'B3'' (hexadecimal). In this way, the suffix of a code with 7 consecutive 0's is always ``...100000001000J, and the boundary when demodulating from code to data is 20'' is 7.
Discrimination can be made by detecting consecutive patterns.

In other words, resynchronize the delimiter of the first issue
It is now possible to do so. Recorded data 2-7 change n1
In this case, 2-bit, 3-bit, 4-bit variable ÷I
By converting the bit string of J, frame 1i-lJJ
, lJ When comparing the cases where the coat is 133" or "B3", when the coat is 33", a pattern of 7 consecutive 10"s may occur twice in a row, and the same pattern If the code is detected by detecting a pattern of 7 consecutive 0's, then 1 byte of the same Jl'Jj
In the middle of the code, there is a possibility that the same jllI code will be detected in one code.
In the 2-7 code variation shown in Figure 2, 'B3' is the humidity level. As a result of this &i, the frame synchronization code 'B3'k: Every frame!I Kotsu IJ1.l
, 'T(r) (Even if there is a bit shift, it is possible to perform i1J same Jul of frame times, ゛υJ code) 1/-m.

The motor 2 shown in FIG. 1 is a Hall motor whose rotational speed is increased to 1jliijf14f by a speed control section 17, which will be described later. As shown in FIG. 6, a synchronizer 4 on which a signal generation mark 4M is provided for a certain period of time is fixed, and the mark 4M'z light emitting diode and light receiving element Detection T:F; A detector 8 is provided which is connected to a light-emitting diode and a light-receiving λξ element.The output of the detector 7 is amplified.
The 9f square is supplied to the clock pulse input terminal of the CC safety rank 1, and the above-mentioned ρ/output is applied to the reset input terminal of the safety rank 10. ? The output of the 9 light receiving elements is supplied via the amplifier 'JSii 77.

Further, an optical head 12 for performing angulation according to the combination of information is provided below the optical disc J so as to be movable in the radial direction of the optical disc J. This optics
The RAD is a well-known device that includes, for example, a semicircular laser beam oscillator, a collimating lens, a beam splitter, a λ/4 wavelength plate, an objective lens, and a light receiver.

The output of the optical head J2 is supplied to a binarization circuit 13 Kj, and the signal binarized by the binarization circuit 13 is demodulated by a reproduction circuit 14 and supplied to a control circuit 16.

The demodulation circuit 14 receives the signal from the binarization circuit 13.
The zero adjustment of the data is performed by inversely changing the length of the -7 conversion code.For example, as shown in FIG. 7, a shift register 41. shift register 4
1, a resynchronization pattern detection circuit 42 that detects a synchronization pattern, an AND circuit 43 that takes an AND between the output of the resynchronization pattern detection circuit 42 and a frame synchronization code detection mask, and a shift register based on the output of the AND circuit 43. 41, and a data demodulation and frame synchronization circuit 45 that demodulates the output of the code cutout path 44 by inversely converting the mark conversion code according to the output of the AND circuit 43. It is configured. That is, when the resynchronization pattern detection circuit 42 detects a resynchronization pattern in which the demodulated synchronization code includes seven consecutive "0s" as shown in FIG. 8, the circuit 42 generates a resynchronization Bakun detection signal. do. As shown in FIG. 9, this resynchronization pattern detection signal is transmitted for a certain period of time [l!] from the frame same J code position detection timing of the previous frame. j? ? An AND circuit 43 performs an AND with the frame same J code detection mask generated by =, and at the timing when the AND is established, the same code decoding delimiter positions are synchronized. By the way, the frame synchronization code detection mask is normally 1 bit, but if frame synchronization is not achieved and the data is re-extracted, as shown in Figure 10, ■ The bit where the synchronization pattern detection signal should originally be generated is It is designed to have a width of 3 bits before and after the position. By providing this extra width to the mask on the frame synchronization code, even if a bit shift occurs during data demodulation and is demodulated, if it is a shift within the previous &33 bits, the shift can be corrected. can. This is the timing when the resynchronization pattern detection indicates the byte delimiter of the frame synchronization month. Even if the frame synchronization code is encoded between the preceding and succeeding data, within 3 bits after nrτ, the normal This is because such patterns are not included except for resynchronization patterns.In the past, by adding a frame synchronization code to each frame data, it is possible to avoid shifts in the delimiter position or Frame synchronization can be achieved even if the demodulated data is shifted within +3 bits.

The control circuit 15 controls the entire apparatus in response to signals 11 from an external device or a host computer (not shown). For example, the control circuit J6 has a record of φ
When the block number for reproduction is supplied, the track number to be accessed and the starting sector number 'fr are calculated according to the conversion table stored in the memory circuit J6, and speed information is obtained. OThe above memory circuit 1
6, as shown in FIG. 11, the speed information of the optical disk 1 for each 256 track, the number of sectors in one block at this speed, the number of the first block in the 256 tracks divided into the above speeds, and its block. A conversion table is stored that corresponds to the start sector.

For example, when the control circuit 15 is supplied with block number "10" from the host computer, the block number is between θ and 255 tracks depending on the storage contents of the memory circuit 16, and the first block in the track is When the number is "0" and the starting sector is "100", one block of sectors P, [40J] is obtained, and the number of tracks and sectors of the block number "10" are calculated accordingly. In other words, "((target block number - first block number) x number of sectors + starting sector) ÷ 256 + 8 tracks of the first block [The quotient obtained by 1 is the track dash and the remainder is the number of sectors; in this case, the track "1" starting sector "l 44J" is calculated.

The control circuit 16 is set to 1 at the time of the access! The motor 2 is rotated so that the optical disk 1 tracks with respect to the optical head 12 at a constant speed by controlling the speed control unit 17 according to the speed information provided. When the track number is calculated, the circuit 15 converts the track number into a scale number, and operates the linear motor driver until this scale number matches the position ' detected by the output of a position hanger (not shown). No. 8 is set to be a cape. This linear motor driver 18 moves the optical head 12 with a linear motor (!) structure 19 according to the control circuit J5, so that the beam 9 of the optical head 12 illuminates 31 fixed tracks. The above linear motor mechanism 1
Reference numeral 9 moves the optical head 12 in the outer radial direction above the original disk 1. In addition, the tooth control 1 circuit J5 corresponds to the target track with the optical/rad 12, and the start sector and previous sector counter JO.
When the count candy matches, recording and reproducing operations of the optical navel F12 are started.

The control circuit 15 modulates recording data from the host computer in a circuit 20 and supplies the modulated data to a laser driver 21. This laser driver 2) records information by driving a semiconductor laser (not shown) in the optical head 12 in accordance with a supplied modulation signal.

Further, the control circuit 15 detects a defective block by checking the header frame by turning on the timer 22 and the timer 23, and stores the detection result of the defective block in the storage circuit slot. At the end of block detection,
This is stored in the defective block management tA report recording area Jd. Further, the header counter 24 is caused to count the number of seven header frames detected in each of the 15 blocks of the control circuit. The timer 22 operates for 1111 minutes from block header to block header, and the timer 23 defines the reading time of the block header for each block.

Next, the operation in such a configuration will be explained. first,
When manufacturing the optical disc 1, the optical disc 1 is set to the original disc device. Then, the block number for recording the block header from the host computer (not shown) is determined by the control circuit 1.
Suppose that it is supplied to 5. Then, the control circuit 15 uses the conversion table in the storage circuit 16 to calculate the track, start sector, and speed information of the target block. In other words, the control path 15 separates the range of the track containing the target block number in the t-transformed tape /I/ and the continuous layer information, and selects [((target block number) according to the track range data. - First block number) X number of sectors + start sector) ÷ 256 + last 4) Track number of block J" is calculated, and the track number and start sector of the target block are calculated from the result of this calculation. . For this, 1
The hllI1141 circuit 15 performs I-control on the speed control section 17 according to the speed information. Then, the speed controller 17 drives the motor 2 to correspond to the truck.
It is 01 that rotates the optical disc 1 at a rotational speed of
l white + road s s k? By converting the I-Lock number into a scale value and driving the linear motor driver J8 until this scale value matches the position detected by the output of a position detector (not shown). Then, when the count value of the sector counter 10 and the start sector match, the control circuit 15 moves the laser driver 21 to generate the preamble data and eight header frames as the preheader described above. 't-Record. In addition, preheaders for other blocks are also recorded on the optical disc 1 as described above.

In this way, pinch the entire surface of the optical disc 1.
A preheader is recorded in 300,000 blocks. This optical disc l is shipped to a user.

In such a state, check whether the pre-header recorded in each block can be reproduced without errors, and determine that the block with the pre-header that cannot be reproduced correctly is a defective block. The layer information recording area 1d is recorded by Akane. In other words, the host computer (not shown) first records the control circuit 15K.
ll, instructs access to 1 block. Then, the control circuit 16 uses the conversion table of the assignment 1 circuit 16 to calculate the track, ff11M sector, and speed information of the first block. Thereby, the control circuit 15 controls the speed control 1 section 17 according to the speed information. Then, the speed control section 17 drives the motor 2 to rotate the optical disc 1 at a rotation speed corresponding to the track.

In addition, the track number arrival control circuit J5 converts the track number into a scale value, and the linear motor driver until this scale value matches the position detected by the output of the hoist (tif) (not shown). 18 to lLA￥i
By performing JJ, the optical head J2 is moved.

Next, the control circuit 16 controls the laser driver 2 when the seftaka rank 100 count value matches the start sector.
1 to cause the optical head 12 to reproduce the information on the 9th disc l. With this, it is detected whether or not the header 7 frame in the pre-header in the block header of the first block on the original disk 1 has been cut off. Then, header 7 frame synchronization code is followed by 8 bytes of opposite-phase header address data and positive-phase header address 7.
' - data bit by bit by exclusive 1lffIl logical sum, and when the results of the exclusive logical sum are all ``1'', it is determined that the header 7 frame has been read correctly, If even one of the calculation results is rOJ, there is no judgment, and if the header frame is incorrect, it is judged as 1. There is an Ir.

As a result, when detecting a header frame for the first block, if the header frame is not detected even after a predetermined period of time has elapsed, the control circuit 1
Step 5 determines that the optical disc J is defective, notifies the operator to that effect, and ends the process.

Further, when the header frame for the first block is detected and the header frame is correctly read, the control circuit 15 activates the timers 22 and 23. Then, the control circuit 15 counts up the header counter 23, and continues to play back the optical disk J (when another header frame is correctly read according to No. 11, the header counter 23 is counted up again).
Count up 4. In this way, timer 23
When the time-up occurs, the control circuit J5 determines that the first block is a defective block if the count content of the header counter 24 is "4" or less, and stores the block number in the memory circuit 16. If the count is 5 or more, the control circuit J6 determines that the first block is the correct block and determines whether to access the second block. Accordingly, the control circuit 15 is @2
The speed controller 17 is controlled according to the speed information for the block, and the optical disk 1 is rotated at the corresponding rotation speed.

Then, before the timer 22 expires, or the timer 22
When the header frame for the second block is detected, the control circuit 15 activates the timer 22 and the timer 23. Next, the control circuit 15 counts up the header counter 24, and then when another header frame is correctly read by the reproduction signal of the optical disk 1, it counts up the header counter 24 again. In this way, when the timer 23 has expired, the corps control circuit 15 is activated to the second
The block is determined to be a defective block, and its block number is stored in the storage circuit 16. In addition, the header counter 24
If the count content is "5" or more, the control circuit 16 determines that the second block is a correct block and determines whether to access the third block. The speed controller 17 is controlled according to the speed information for the optical disc 1 to rotate the optical disc 1 at the corresponding rotation speed. Also, after the third block has been tracked, the control circuit 15 converts the track number into a scale value, and this scale value matches the position detected by the output of a position detector (not shown). The optical head 12 is moved by moving the linear motor driver 18 up to m. Then, the process returns to checking the end of timer 1. Also, when the header of the second block is detected, the timer 2
When the header frame is not detected even though the block is completed, the second block is determined to be a defective block, and
The block number is stored in the storage circuit 16. Next, the control circuit 15 determines access to the third block,
Speed control section J7 according to the speed information for the third block.
is controlled to rotate the optical disc 1 at a corresponding rotation speed. Also, depending on the track number of the third block, the control circuit 15 determines the track number? The linear motor driver 1 is converted into a scale value, and the linear motor driver 1
8 to JLμ (by moving the optical head 12. Then, after the timer 22-2 is activated, the control circuit 15 returns to checking whether the timer 22 is finished.

Thereafter, the header frame is detected for each block as described above, and when the final block is reached, the control circuit 15 determines whether a defective block has been recorded and drives the linear motor driver 18 to detect the optical head. 12 to access the defective block recording area 1e. about,
The control circuit 16 reads the defective block data from the memory circuit J6, and outputs the address of the defective block and the number of consecutive defective blocks according to this data. Furthermore, the control circuit 15 records the calculated data by driving the laser driver 2) according to the calculated data. As a result, the defective block address and the number of consecutive defective blocks as shown in Table 1 described above are recorded in the defective block management information recording area 1d on the optical disk 1. The main part of the above operation is explained in the flowcharts shown in FIGS. 12(a) and 12(b).

Therefore, when the user sets the source disc 1 to an image information recording and retrieval device (not shown), the control 70
The defective block data in the defective block management information recording area Jd of the optical disk 1 (not shown) is stored. This allows the defective block data to be used as a defective block when recording data on the optical disk 1. By recording data in areas other than the defective blocks, it is possible to prevent data from being recorded in defective blocks.

Next, data recording will be explained. First, the above-mentioned disk 1 is set to the original disk device. Then, the recording data and the recording address (block number) are supplied to the control unit N15 from the host computer 7,1' shown in the figure. Then, the control unit fX! f11s is the δ1 memory circuit 16
The track, start sector, and speed fh-rule of the target block are obtained using the conversion table. That is,
The control circuit 15 converts the range and speed information of the track included on the target block portion in the conversion table, and
According to the range data of that track, perform the calculation of "((target block number - first block number) The track number and starting sector of the daily block are calculated. Accordingly, the control circuit 15 controls the speed control section 17 according to the speed information. Then, the speed control section 17 drives the motor 2 to rotate the nine disks 1 in a rotational heave corresponding to the track. Also, according to the track number above,
The control circuit 15 converts the track number into a scale value, and drives the linear motor driver 18 until this scale value matches the position detected by the output of the R detector (not shown). Move the optical head J2 &'J
Tighten. Then, the control circuit 15 sets the sector count to 10.
When the count value matches the above start sector, the laser driver 2 is driven to record four header frames as an additional recording header (additional recording address data) following the 2-byte tin slice gap, and the recording is completed. Then, when the 8th frame of the file header becomes the 19th byte, the 18th byte from 2 bytes (tin slice gap) after the end position of the preheader is recorded.
Byte dummy data ('00'') is recorded.

Continuing ``[Four frames (39 bytes each) are recorded.Next, 1527 frames of data frames consisting of 11 codes per 1-byte frame and 38-byte fixed length data are recorded.In other words, it'l
l The control circuit 16 adds increment and FCC to the 4-byte recorded data by interleaving 4 bytes, ECC addition circuit 3], converts it to 5776-byte encoded data,
This data is also made into frames of 38 bytes each by the frame extraction circuit 32, and a 1-byte frame 1i5j Nl code Yr is added to this frame by the frame same code neck circuit 33, and the frame data of each 39 bytes is divided into 152 byte frames.
Output one frame. This output is supplied to a laser driver 21 via a variable MJA4 circuit 20. This results in
The laser driver 21 records data on the additional recording header on the optical disk 1 by driving a semiconductor laser (not shown) in the optical head 12 in accordance with the supplied data.

Further, other data is similarly recorded in predetermined blocks.

Next, I will explain about the keratinization of data. First, the above-mentioned disk 1 is set to the original disk device. Then, the corner raw block number is supplied to the control path J5 from the host computer (not shown).Then, the control circuit 15
The track, start sector, and speed information of the target block are calculated using the 16 conversion tables. In the meantime, the control circuit 15 quickly determines the IUI and information of the track containing the target block number in the conversion table, and selects "(") according to the data of the track. (Target block number - first block number) × tens of sectors (starting sector) ÷ 256 + first block track check b), and use this calculation result to calculate the track number and start sector of the target block. is calculated. Accordingly, the ll1lr4 circuit 15 controls the speed control section 17 according to the speed can axis. Then, the speed control section J7 drives the motor 2 to rotate the two disks 1tl through the rotation corresponding to the track. - The control circuit 15 according to the above track case number.
converts the track number to a school value Ic, and drives the linear morph driver J8 until this scale value and the position L detected by the output of a position detector (not shown) match. to move. Next, the control circuit 16 drives the laser driver 21 to start reading data on the optical disc J when the Karantoi mountain and the upper d'arm sector of the Seftaka rank 10 are -1. As a result, the detected signal is binarized by the binarization circuit 13 and provided to the output Wj circuit 14. This demodulation circuit 14
converts the supplied binary code (i:j4:i) into a 2-7 code and outputs it as %15. As a result, the control circuit 16 compares the 8-byte header address data of the opposite phase and the header address data of the positive phase reproduced following the header frame same code bit by bit by exclusive OR. If all the exclusive OR calculation results are rlJ and the frame number of the header frame is 1'-1 to 12, it is determined that the header frame has been read correctly. In this case, the number of header 7 frames to be decoded may be one or more. Next, the control circuit 15 checks whether the address data and the address data of the block to be reproduced match or not, and causes the matching platform to reproduce the data recorded next to the block header of the header frame.

Then, the read signal is also binarized by the binarization circuit J3 and supplied to the demodulator-II4SJ4. Then, the supplied binary signal (demodulated signal) is supplied to the restart loop pattern detection circuit 42 and code extraction circuit 44 via the shift register 4 metal. Accordingly, the resynchronization pattern detection circuit 42 inputs the resynchronization pattern detection month to the AND circuit 43 when 7 bits of 10" are continuously supplied. At this time, based on the previous frame (P first 7 In the case of frame data, a frame synchronization code detection mask signal (based on the synchronization timing of the header 7 frame) is supplied, then the AND circuit 4
3 is established, and the timing from ANDlPJ path 43 is
The signal is supplied to a code extraction circuit I4 and a data demodulation and frame resynchronization circuit 45. As a result, the code extraction circuit 4
A timing signal from the 4-digit AND circuit 43 is used to cut out the IP1 stone number from the shift register 41 and convert it into data.
Frame resynchronization: The circuit 45 also performs data demodulation (based on timing signals) and frame resynchronization. In this way,
152 frame data are sequentially restored and supplied to the control circuit 15. Also, the frame synchronization pattern detection signal and the frame synchronization code detection mask do not make a single stitch, and the timing @ signal cannot be output. In this case, the frame synchronization code detection mask t^IJ is widened to 7 bits as described above. The above operation f
It has become repetitive. This ensures that even if a bit shift occurs, re-picking can be done.
Furthermore, data in other blocks are also reproduced in the same manner as described above.

In the above embodiment, an optical disk is used as the recording medium, but the present invention is not limited to this, and a magnetic tape such as a 70-bit disk may also be used.

〔Effect of the invention〕

As described in detail above, according to this starting point J, it is possible to provide a data recording method in which data can be recorded accurately.

[Brief explanation of drawings]

The drawings are the ninth to explain one embodiment of the present invention, and FIG. 1 is a schematic configuration diagram of an optical disk device, and FIG.
Figure g3 is a plan view showing the configuration of the optical disc, Figure 4 is a diagram showing an example of the block format, Figure 5 is a diagram showing the configuration of the main parts of the control circuit, and Figure 6 is the relationship between the nine discs and the detector. Figure 7 is a diagram showing the configuration of the main part of the transfer circuit, Figure 8 is a diagram to explain the resynchronization pattern detection signal, Figures 9 and 10 are frame synchronization codes. 11 is a diagram showing a storage example of converted data, and FIG. 12 is a flowchart for explaining defective block notation. No...Original disk (review: 1 recording medium, 12...optical head, 13...binarization circuit, 14...1 variable circuit,
15...Control circuit, 17...Speed control section,)8...
・Linear motor driver, 19...Linear motor #!
Structure, 2Q0. -, change i; 3 circuits, 2 no.. laser driver, 3 no.. interleave, FCC addition circuit, 32
. . . Frame extraction circuit, 33 . . . Frame synchronization code addition circuit, 4 No. . . Shift register, 42 .
. . . code extraction circuit, 45 . . . data diagnosis, frame resynchronization circuit. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 □ Figure m4 (a) Tsutomu Figure 5 Figure 6 Figure 7 Figure 8 Figure 10 Figure 12 (a) Figure 12 Commissioner of the Patent Office Kazuo Sugi 1. Indication of the case Patent application No. 58-213514 No. 3, Relationship with the Nagisa case to be amended Patent applicant (307) Tokyo Shibaura Electric Co., Ltd. 4, Agent 6, Full text of the specification to be amended 7, Description of the contents of the amendment engraving (no changes in content)

Claims (4)

[Claims] (1) For those who divide the tracks on the record into blocks and pre-record the pre-format block data in each block, in the case of data recording, the data recording paste and the pre-format block data are pre-recorded in each block. Following the data, additional recording block data containing the same data as the formatted block data is recorded with respect to splice blocks at regular intervals, and this j
A data recording method in which all of the recording data #I-+ is recorded following the PPI3 recording block data, and the data is recorded as f%. (2) The additional recording block data is at 1 of 1il-
The data record according to the first ode of NuIII of the patent claim, characterized in that it consists of a plurality of V frames 1/-, each of which has the same number of frames, and each frame has the same code. Method. (3) Frame 1/- in the above format block data and additional recording block data
2. A data recording method according to claim 2, characterized in that the intervals are constant and each frame contains data indicating the order of the array J1. (4) At the ridge of the splice cap of additional recording block data, there is a fi for phase pull-in during data block playback.
1. A data recording method according to claim 1, characterized in that dummy data that is used is recorded.