JPS601040U - current switch circuit - Google Patents
current switch circuitInfo
- Publication number
- JPS601040U JPS601040U JP9314983U JP9314983U JPS601040U JP S601040 U JPS601040 U JP S601040U JP 9314983 U JP9314983 U JP 9314983U JP 9314983 U JP9314983 U JP 9314983U JP S601040 U JPS601040 U JP S601040U
- Authority
- JP
- Japan
- Prior art keywords
- switch circuit
- current switch
- load
- current
- switch means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の電流スイッチ回路の回路図、第２図は従
来のスイッチングトランジスタの動作を説明するための
波形図、第３図は本考案による電流スイッチ回路、第４
図は本考案によるスイッチングトランジスタを説明する
ための波形図であり、同図に於いて１は第１の電流源、
２は第２の電流源、３はトランジスタ（ＰＮＰ形）、４
はトランジスタ（ＮＰＮ形）、５は負荷、６は信号入力
端子、７は第１のトランジスタ（ＮＰＮ形）、８は７と
同種の第２のトランジスタ（ＮＰＮ形）、９．１０は信
号入力端子、ｉ□は第１の電流源に流れる電流、１２は
第２の電流源に流れる電流、ｉ３はバイパス回路に流れ
る電流、Ａは入力信号波形（イネーブル信号）、Ｂおよ
びＣは第１および第２のトランジスタの動作波形、ａ、
ｂ、 ｃはトランジスタの立ち上り時点、ｄ、
ｅ、 ｆはトランジスタの立ち下り時点、Ｄは本考
案による負荷５に流れる電流波形ををそれぞれ示す。FIG. 1 is a circuit diagram of a conventional current switch circuit, FIG. 2 is a waveform diagram for explaining the operation of a conventional switching transistor, FIG. 3 is a current switch circuit according to the present invention, and FIG.
The figure is a waveform diagram for explaining the switching transistor according to the present invention, in which 1 is the first current source;
2 is a second current source, 3 is a transistor (PNP type), 4
is a transistor (NPN type), 5 is a load, 6 is a signal input terminal, 7 is a first transistor (NPN type), 8 is a second transistor (NPN type) of the same type as 7, 9.10 is a signal input terminal , i□ is the current flowing in the first current source, 12 is the current flowing in the second current source, i3 is the current flowing in the bypass circuit, A is the input signal waveform (enable signal), B and C are the first and second current sources. Operation waveform of transistor No. 2, a,
b, c are the rising times of the transistor, d,
e and f indicate the falling point of the transistor, and D indicates the current waveform flowing through the load 5 according to the present invention, respectively.
Claims (1)
と、前記負荷に流れる電流を接・断する第１のスイッチ
手段と、前記負荷に流れる電流をバイパスするバイパス
回路を接・断する第２のスイッチ手段と、前記第１のス
イッチ手段と第２のスイッチ手段とを互いに逆相の信号
により駆動する手段とを備えることを特徴とする電流ス
イッチ回路。A first and second current source connected in series through a load, a first switch means for connecting/disconnecting the current flowing to the load, and a bypass circuit for bypassing the current flowing to the load. and means for driving the first switch means and the second switch means with signals having phases opposite to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9314983U JPS601040U (en) | 1983-06-16 | 1983-06-16 | current switch circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9314983U JPS601040U (en) | 1983-06-16 | 1983-06-16 | current switch circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS601040U true JPS601040U (en) | 1985-01-07 |
Family
ID=30223804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9314983U Pending JPS601040U (en) | 1983-06-16 | 1983-06-16 | current switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS601040U (en) |
-
1983
- 1983-06-16 JP JP9314983U patent/JPS601040U/en active Pending
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