JPS6010370A - バツフア記憶装置における置き換え制御方式 - Google Patents
バツフア記憶装置における置き換え制御方式Info
- Publication number
- JPS6010370A JPS6010370A JP58118779A JP11877983A JPS6010370A JP S6010370 A JPS6010370 A JP S6010370A JP 58118779 A JP58118779 A JP 58118779A JP 11877983 A JP11877983 A JP 11877983A JP S6010370 A JPS6010370 A JP S6010370A
- Authority
- JP
- Japan
- Prior art keywords
- block
- replacement
- blocks
- control circuit
- pits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/12—Replacement control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58118779A JPS6010370A (ja) | 1983-06-30 | 1983-06-30 | バツフア記憶装置における置き換え制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58118779A JPS6010370A (ja) | 1983-06-30 | 1983-06-30 | バツフア記憶装置における置き換え制御方式 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61313524A Division JPS62162153A (ja) | 1986-12-27 | 1986-12-27 | バツフア記憶装置における置き換え制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6010370A true JPS6010370A (ja) | 1985-01-19 |
| JPS6342301B2 JPS6342301B2 (enrdf_load_stackoverflow) | 1988-08-23 |
Family
ID=14744866
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58118779A Granted JPS6010370A (ja) | 1983-06-30 | 1983-06-30 | バツフア記憶装置における置き換え制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6010370A (enrdf_load_stackoverflow) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5693167A (en) * | 1979-12-26 | 1981-07-28 | Fujitsu Ltd | Memory replacement control system |
| JPS5696337A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Resource control system |
-
1983
- 1983-06-30 JP JP58118779A patent/JPS6010370A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5693167A (en) * | 1979-12-26 | 1981-07-28 | Fujitsu Ltd | Memory replacement control system |
| JPS5696337A (en) * | 1979-12-28 | 1981-08-04 | Fujitsu Ltd | Resource control system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6342301B2 (enrdf_load_stackoverflow) | 1988-08-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4905141A (en) | Partitioned cache memory with partition look-aside table (PLAT) for early partition assignment identification | |
| US5274790A (en) | Cache memory apparatus having a plurality of accessibility ports | |
| US5493660A (en) | Software assisted hardware TLB miss handler | |
| CN101470670B (zh) | 具有扇区功能的高速缓冲存储器 | |
| US5604879A (en) | Single array address translator with segment and page invalidate ability and method of operation | |
| US20070050594A1 (en) | TLB lock indicator | |
| JPH0315211B2 (enrdf_load_stackoverflow) | ||
| JPS6236267B2 (enrdf_load_stackoverflow) | ||
| US20080040549A1 (en) | Direct Deposit Using Locking Cache | |
| US4087794A (en) | Multi-level storage hierarchy emulation monitor | |
| US5675763A (en) | Cache memory system and method for selectively removing stale aliased entries | |
| JPH04233643A (ja) | バッファメモリ用制御装置 | |
| US5218687A (en) | Method and apparatus for fast memory access in a computer system | |
| EP0284751B1 (en) | Cache memory | |
| JP2004030000A (ja) | 共有キャッシュメモリのヒット判定制御方法及び共有キャッシュメモリのヒット判定制御方式 | |
| CN101645034A (zh) | 用于检测数据存取违例的方法和装置 | |
| US20050027960A1 (en) | Translation look-aside buffer sharing among logical partitions | |
| US6810473B2 (en) | Replacement algorithm for a replicated fully associative translation look-aside buffer | |
| US5295253A (en) | Cache memory utilizing a two-phase synchronization signal for controlling saturation conditions of the cache | |
| CN102023845B (zh) | 一种基于状态机的Cache并发访问管理方法 | |
| JP4047281B2 (ja) | キャッシュメモリをメインメモリに同期させる方法 | |
| US6757785B2 (en) | Method and system for improving cache performance in a multiprocessor computer | |
| US6598050B1 (en) | Apparatus and method for limited data sharing in a multi-tasking system | |
| US6931493B2 (en) | Implementation of an LRU and MRU algorithm in a partitioned cache | |
| JP4254954B2 (ja) | データ処理装置 |