JPS60101838U

JPS60101838U - High precision DA converter

Info

Publication number: JPS60101838U
Application number: JP19594883U
Authority: JP
Inventors: 忠亮佐藤
Original assignee: 株式会社アドバンテスト
Priority date: 1983-12-19
Filing date: 1983-12-19
Publication date: 1985-07-11

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来から有る補正回路付ＤＡ変換器を説明する
ためのブロック図、第２図はその動作を説明するための
グラフ、第３図はこの考案の一実施例を示すブロック図
、第４図はこの考案に用いることができるＤＡ変換器の
一例を示す接続図である。１０１Ａ：上位ビット用ＤＡ変換器、１０ｊ）Ｂ：下位
ビット用ＤＡ変換器、１０４：電流−電圧変換回路、１
０７：補正データ、１０９：メモリ、３０１：マイクロ
コンピュータ、３０２：ドライバ、３０３Ａ〜３０３Ｅ
：ラッチ回路、３０４．３０５：利得調整手段。 −−７２図　　Ａ６ −　　　　　　　　　−−−Ｉ　　　Ａｌ１４ノ°　ド
ーＦ１丁刊 −−第３−６図、１０１、　　　−−□−−ＪFIG. 1 is a block diagram for explaining a conventional DA converter with a correction circuit, FIG. 2 is a graph for explaining its operation, and FIG. 3 is a block diagram for explaining an embodiment of this invention. FIG. 4 is a connection diagram showing an example of a DA converter that can be used in this invention. 101A: DA converter for upper bits, 10j) B: DA converter for lower bits, 104: Current-voltage conversion circuit, 1
07: Correction data, 109: Memory, 301: Microcomputer, 302: Driver, 303A to 303E
: Latch circuit, 304.305: Gain adjustment means. --72 Figure A6 - ---I Al14 No. Do F1 edition--Figure 3-6, 101, --□--J

Claims

[Claims for Utility Model Registration] A: DA conversion for upper focus where the upper bits of the digital signal to be converted to an analog signal are given B"7'to"
y'(:!Ef#t, @f(';9tv@Jil. A DA converter for lower bits to which the lower bits are given,
'C means for measuring a conversion error value to D which the converter has for the upper bit; D a memory for storing this DA conversion error data at an address corresponding to the digital signal where this error occurs;
'E A correction DA converter that converts the error data read from this memory into DA and corrects the conversion output of the bA converter for the upper bits; F A converter for the lower bits and a correction DA converter A high-precision DA converter comprising: a conversion gain adjustment means for changing and setting the DA conversion gain of the DA converter;