JPS599965A - Electrode for semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain the ohmic electrode having favorable adhesion and low contact resistance, and is suitable also for shallow junction by a method wherein a Ti layer, a Zn layer, a Ti layer, and an Ag layer are formed in order on a P type III-V group compound semiconductor layer. CONSTITUTION:A P type AlGaAs layer 3 is formed according to liquid phase epitaxial growth on an N type GaAs substrate 1, and at this time, the P type GaAs layer 2 is formed. The P type layer 3 is etched selectively to expose the P type GaAs layer 2, the Ti layer 7a of 0.05-0.1mum thickness, the Zn layer 7b of 0.01-0.05mum thickness, the Ti layer 7c of 0.05-0.1mum thickness, and the Ag layer 7d of 0.2mum thickness or more are stacked according to vacuum evaporation, and photo etching is performed to leave the evaporation layers 7a-7d at the necessary part. Then the heat treatment is performed at 430-470 deg.C in inactive gas to complete the P side electrode 7. According to this construction, junction leakage is not generated completely even when junction is formed shallowly at about 0.3mum, and the ohmic contact electrode having tensile strength of 50kg or more, and having low resistance can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electrode structure Jh that makes ohmic contact with a p-type m-v group compound semiconductor and a method for manufacturing the same.

Conventionally, silver-zinc (Ag-Zn) alloys or gold-zinc (Au-Zn) alloys have been used as ohmic contact electrode materials for p-type ■-v group compound semiconductors. An example will be explained in which a gallium arsenide (GaAs) solar cell is manufactured using these electrode materials. FIG. 1 is a schematic cross-sectional view showing the structure of a solar cell formed using the above-mentioned conventional electrode material, in which a Kp-type GaAs layer (2
) is formed, and a pn junction J necessary for photovoltaic power generation is formed between them. On top of the p-type GaAs layer (2), p-type aluminum, gallium, and
An arsenic (AtGaAs) layer (3) is formed, and an antireflection film (4) is formed thereon. A p-side electrode (5) is placed above the central part of the p-type GaAs layer (2).
is formed, which is an Ag-Zn alloy or Au-
The above p-type GaAs layer (
2) Spread grass on a part (center), then apply K 40
An ohmic contact electrode is obtained by heat treatment at a suitable temperature of about 0 to 500'C. Note that (6) is the n-side electrode.

GaAs solar cells having such a structure have excellent temperature characteristics and excellent radiation resistance, and are recently expected to be used as power sources for artificial satellites. However, the p-side electrode of the conventional structure often suffers from peeling2, making it unsuitable as an electrode for solar cells for artificial satellites, which require extremely high commercial reliability. (In order to maintain high radiation resistance, the buried depth of the pl-GaAs layer (2), that is, the depth of the junction J, must be extremely shallow, such as 1 μm or less. However, in the conventional method described above, When forming the p-side ohmic contact electrode (5) using an electrode material of There was a drawback that

On the other hand, in silicon solar cells, titanium-ffj4 (Ti
-Ag) electrode is used, and even though the junction depth is extremely shallow, junction leakage occurs even though the junction depth is extremely shallow.Also, the adhesion of this Ti-Ag electrode is extremely good, and no flaking occurs. do not have. However, when this Ti-Ag electrode is used as a p-side east electrode material of a GaAs thick Is battery, the contact resistance of the Ti-Ag electrode to the p-type GaAs layer is high, and good ohmic contact cannot be obtained.

Therefore, there is a drawback that the fill factor decreases and the output of the solar cell decreases.

This invention has been made in view of the above points, and is a p-type 1[-
It is an object of the present invention to provide an ohmic contact electrode for a V-group compound semiconductor and a method for manufacturing the same.

FIG. 2 is a schematic sectional view showing the structure of an embodiment of the present invention. On the n-type GaAs substrate (1), for example, At, G
a, p-type At using a growth melt containing As and Zn
A GaA 8 layer (3) is grown liquid phase epitaxially. At this time, Zn, which is a group III element, diffuses to form a p-type GaAs layer (2), and a junction J is completed.

Next, the p-type AtGaAs layer (
3) is selectively removed using a photoetching technique to expose the surface of the p-type GaAs layer (2). Next, this is loaded into a vacuum evaporation device, for example, and after the inside of the device is sufficiently evacuated, a first Ti layer (
7a) is vacuum deposited. Next, on top of that, 0.01 ~
Vacuum depositing a Zn layer (7b) with a thickness of 0.05 μm;
Furthermore, a second Tie ('7c) with a thickness of KO,05~0.1/jm is further vacuum-deposited thereon, and finally, an Ag layer (7d) with a thickness of 0.2 μm or more is vacuum-deposited thereon. . After that, using photoetching technology, the vapor deposited layer (7
a) to (7d) are left, and then heat treated at a temperature of 4.30 to 550°C in an inert or reducing atmosphere to form p
The side electrode (7) is completed. Anti-reflection film (4) and n
The g11j electrode (6) is formed in a conventional manner.

In the GaAs solar cell formed in this way, shown in Figure 2, no junction leakage occurred at all, even though the depth of the junction J was extremely shallow, approximately 0.3 μI'll. . Indeed, the adhesion of the p-side electrode (7) is extremely good, and when the electrode was subjected to a tensile strength test, all of the 50 samples showed extremely high values of 50 kg or more. Furthermore, this p-side electrode (7) is a p-type Ga
Specific contact resistance value of As layer (2) with respect to K is ]Omin/cm
6i + ゛J, 'i-Ag electrode p
Specific contact resistance value of 10-1Ω/Cm for type GaAe
It is extremely low compared to ” and is excellent as an ohmic contact electrode.

The solar constant of GaAs with the p-side electrode according to this invention is 1
It has extremely excellent properties of 8% or more, and together with the excellent electrode adhesion mentioned above, it can be seen that it is suitable for solar cells for artificial satellites.

In the above embodiment, the first T1 layer (7a) and the second Ti layer
The thickness of the layer (7c) was set to 0.05+-0.1 μm,
This is because this range was optimal in terms of adhesiveness. In addition, the thickness of the Zn layer (7b) was set to 0.01 to O,'05 μm.
However, if this value is exceeded, an increase in contact resistance is observed. Unfortunately, the thickness of the Ag layer (7d) was set to 0.2 μm.
The reason for this is due to the need for work such as soldering or welding to take out the electrode lead to the outside in a later process.

In addition, as a manufacturing method, the heat treatment temperature is 430 to 550'C.
However, this is because outside the above range, the adhesiveness of the electrode decreases and the contact resistance increases.

In the above explanation, we have described the case of GaAs solar cells, but this emission F3Ar/''! can be applied not only to GaAs but also to other ■-v group compound semiconductors, and not only to solar cells but also to other semiconductor devices. .

As explained above, in this invention, the ohmic contact electrode to the p-type ■-v group compound semiconductor layer is formed by using the first Ti layer, Z
Since it has a structure in which the n layer, the second Ti layer, and the Ag layer are stacked in sequence, it has excellent adhesion with the semiconductor layer and low contact resistance.
Moreover, even when the pn junction is shallow, an excellent electrode can be obtained without impairing the junction characteristics.

After forming the above four-layer structure using vacuum evaporation method,
By performing heat treatment at a temperature of 430 to 550° C. in an inert or reducing atmosphere, further improvement in electrode adhesion and further reduction in contact resistance can be expected.

[Brief explanation of drawings]

FIG. 1 is a schematic sectional view showing the structure of a solar cell using conventional electrodes, and FIG. 2 is a schematic sectional view showing the structure of an embodiment of this invention. In the figure, (2) is a p-type GaAs (group II V compound semiconductor) layer, (7a) is the first Ti layer, (7b) is the second Ti layer, (7d ) is A
In the g layer, (7) is an electrode. Note that the same reference numerals in the figures indicate the same or corresponding parts. Agent Makoto Kuzuno (1 other person) Figure 1 Figure 2 Procedural amendment (voluntary) ・Representation of the Office Commissioner's Palace case Patent Application No. 120242/1987 2, Title of invention Electrode of semiconductor device and method for manufacturing the same Right to correct, -++□+1-' (Address: Marunouchi-guchi, Chiyo 111-ku, Tokyo) 21
'35; Mitsubishi Electric Corporation's detailed description of the invention in the 5th amendment to the anti-vibration specification and the 6th amendment to the details 11) will be corrected.

Claims (3)

[Claims] (1) An electrode for a semiconductor device, characterized in that a first chikunno η, a zinc layer, a second titanium layer, and a silver layer are sequentially formed on a p-type 1■-V group compound semiconductor layer. (2) The thickness of the first and second titanium layers is 0.05 to 0.
．． 1/Jm, the thickness of the zinc layer is 0.01~0.05fim
An electrode for a semiconductor device according to claim 1, wherein the silver layer has a Jl of 0.2 μm or more. (3) In a sufficiently evacuated container, the first titanium layer, zinc layer, second titanium layer, and silver layer are sequentially deposited on the surface of the p-type ■-v group compound semiconductor layer by a method such as a vacuum evaporation method. 1. A method for manufacturing an electrode for a semiconductor device, which comprises heating the electrode in an inert or reducing atmosphere at a temperature of 430 to 50°C.