JPS6255963A - Gaas semiconductor device - Google Patents
Gaas semiconductor deviceInfo
- Publication number
- JPS6255963A JPS6255963A JP60196966A JP19696685A JPS6255963A JP S6255963 A JPS6255963 A JP S6255963A JP 60196966 A JP60196966 A JP 60196966A JP 19696685 A JP19696685 A JP 19696685A JP S6255963 A JPS6255963 A JP S6255963A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- type
- gaas
- type electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Electrodes Of Semiconductors (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明(よGaAs半導体装置の電極構造に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to an electrode structure of a GaAs semiconductor device.
第4図は従来のGaAs半導体装置の一例として、Ga
As太陽電池の製造方法を工程順に示したものである。FIG. 4 shows an example of a conventional GaAs semiconductor device.
The method for manufacturing an As solar cell is shown in the order of steps.
以下これを用いて従来の方法を説明する。The conventional method will be explained below using this.
まず、第4図(a)に示すように、n形GaAs基板(
1)の上面に亜鉛を添加したA I −G a A s
メルトを用いて、液相エピタキシャル成長法でAl−G
a A s層(3)を成長させる。乙のとき、添加さ
れた亜鉛がn形GaAs基板(1)に拡散して、P形G
aAs層(2)が形成されろ。特に宇宙で用いろ場合、
耐放射線の強いGaAs太陽電池が要求され、P形Ga
As層(2)(よ0.5μm程度の膜厚のものが要求さ
れろ。次に第4図(b)に示すようにAN−GaAs層
(3)上面に反射防止膜(4)をCVD法により形成し
た後、写真製版、エツチング法により選択的にコンタク
トホール(9)を形成する。次に第4図
(c)に示すように、蒸着法によりコンタクトホール(
9)にT i /Ag、Ag−ZnなどてP形電極層(
6)、n形GaAs基板(1)の裏面にA u G
e Ni −A g、のn形電極層(7)を形成する
。次に銀のインクコネクタ(8)をP形電極層(6)に
電気溶接により接続し、モジュール化する。First, as shown in FIG. 4(a), an n-type GaAs substrate (
1) A I - G a A s with zinc added to the top surface
Al-G is grown by liquid phase epitaxial growth using melt.
Grow the a As layer (3). At the time of B, the added zinc diffuses into the n-type GaAs substrate (1) and becomes a P-type GaAs substrate (1).
AAs layer (2) is formed. Especially when used in space,
GaAs solar cells with strong radiation resistance are required, and P-type Ga
An As layer (2) (with a film thickness of about 0.5 μm is required).Next, as shown in Figure 4(b), an antireflection film (4) is deposited on the top surface of the AN-GaAs layer (3) by CVD. After forming the contact hole (9) by the method, the contact hole (9) is selectively formed by the photolithography and etching method.Next, as shown in FIG.
9) P-type electrode layer (T i /Ag, Ag-Zn, etc.)
6), A u G on the back side of the n-type GaAs substrate (1)
An n-type electrode layer (7) of Ni-Ag is formed. Next, a silver ink connector (8) is connected to the P-type electrode layer (6) by electric welding to form a module.
第4図で示すように、電気溶接でP形電極層(6)とイ
ンクコネクタ(8)とを接続するときに、高い溶接電圧
を印加すると高熱が生じ、P形電極層(6)の材料によ
って、Pn接合00)が損傷されろことがある。また、
P n接合α0)の損傷を恐れて電気溶接のi*接電圧
を下げると、P形電極層(6)とインクコネクタ(8)
とが接合しないという問題点がある。上記のことから、
P形電極層(6)とインタコネクタ(8)との接続は、
電気溶接の溶接電圧、溶接電圧のパルス幅、などの最適
な設定条件の範囲は非常に狭く、細かな配慮が必要であ
る。それに加えて従来ての電気溶接の印加電圧で(よ溶
接器の先端が溶接時に酸化するなど、前記の最適な設定
条件の再現性が悪くなるなどの問題点があった。As shown in Figure 4, when a high welding voltage is applied when connecting the P-type electrode layer (6) and the ink connector (8) by electric welding, high heat is generated, and the material of the P-type electrode layer (6) This may damage the Pn junction 00). Also,
If the i* contact voltage of electric welding is lowered for fear of damaging the P-n junction α0), the P-type electrode layer (6) and the ink connector (8)
There is a problem that they do not bond. From the above,
The connection between the P-type electrode layer (6) and the interconnector (8) is as follows:
The range of optimal setting conditions for electric welding, such as welding voltage and welding voltage pulse width, is very narrow and requires careful consideration. In addition, there were problems with the applied voltage in conventional electric welding, such as oxidation of the tip of the welder during welding, and poor reproducibility of the optimal setting conditions.
この発明は、上記のような問題点を解消するためになさ
れたもので、充分な接続強度を有するインクコネクタと
Pn接合が損傷されることの無いGaAs半導体装置を
得ることを目的とする。The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain an ink connector having sufficient connection strength and a GaAs semiconductor device in which the Pn junction is not damaged.
この発明に係わるGaAs半導体装置は、P形GaAs
層(2)とP形電極層(6)との間にTiNの薄膜を設
けたものである。The GaAs semiconductor device according to the present invention is made of P-type GaAs.
A thin film of TiN is provided between the layer (2) and the P-type electrode layer (6).
この発明における、P形GaAs層(2)とP形電極層
(6)との間のTiNの薄膜(よ、高い溶接電圧を印加
した電気溶接のさいに生ずる熱によって、下層のP形電
極層と反応することが無いためにPn接合が損傷される
ことを防止する。In this invention, the thin film of TiN between the P-type GaAs layer (2) and the P-type electrode layer (6) is heated by heat generated during electric welding with a high welding voltage applied to the lower P-type electrode layer. Since there is no reaction with the Pn junction, damage to the Pn junction is prevented.
以下、この発明の一実施例を図について説明する。第1
図は本発明の一実施例のインクコネクタ(8)を除いた
上面図、第2図は本発明の一実施例によるGaAs太陽
電池の製造方法を工程111αに示し、第2図(a)は
従来法の第4図(b)と同一の状態である。第2図(b
)は第1図(a)のTub−4b’線断面図で、インタ
コネクタ(8)を溶接したものである。本実施例方法で
は、第2図(a)の状態の後、第2図(b)のようにイ
ンタコネクタ(8)を接続する部分のP形GaAs層(
2)の上面に、反応性スパッタ法により、TiN層(5
)を形成し、その後、従来方法と同様にP形i′S極層
(6)、n形電極層(7)を形成する。モジュール化す
る為にインクコネクタ(8)をP形電極層(6)に接続
する。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a top view of an embodiment of the present invention excluding the ink connector (8), FIG. This is the same state as in FIG. 4(b) of the conventional method. Figure 2 (b
) is a sectional view taken along the line Tub-4b' in FIG. 1(a), in which the interconnector (8) is welded. In the method of this embodiment, after the state shown in FIG. 2(a), as shown in FIG. 2(b), the P-type GaAs layer (
2) A TiN layer (5
), and then a P-type i'S pole layer (6) and an n-type electrode layer (7) are formed in the same manner as in the conventional method. The ink connector (8) is connected to the P-type electrode layer (6) for modularization.
T i N層(5)をP形GaAs層(2)とP形電極
層(6)との間に形成することによって、インクコネク
タ(8)の溶接時に、高い溶接電圧を加えても、TiN
層(5)がP形GaAs層(2)に対して、バリアメタ
ルとして機能し、Pn接合00)を損傷されることが無
くなった。従来の場合、溶接電圧は0.5KVが限界で
あったが、TiN層(5)の前記の機能により0゜55
K Vまで高くすることができる。また、溶接時に他界
溶接電圧を加えられるため、充分な強度を有する接続が
実現され、接続部の信頼性を高めろことができる。By forming the TiN layer (5) between the P-type GaAs layer (2) and the P-type electrode layer (6), even if a high welding voltage is applied when welding the ink connector (8), the TiN
The layer (5) functions as a barrier metal with respect to the P-type GaAs layer (2), and the Pn junction 00) is no longer damaged. In the conventional case, the welding voltage was limited to 0.5KV, but due to the above-mentioned function of the TiN layer (5), it can be reduced to 0.55KV.
It can be increased up to KV. Furthermore, since a phantom welding voltage is applied during welding, a connection with sufficient strength can be achieved, and the reliability of the connection can be improved.
なお、TiN層(5)は接触抵抗が高い為に格子状電極
(6a)に設ければ、GaAs太陽電池の変換効率が下
がるので、P形電極層(6)上部全体に設けることがで
きない。このことより第1図に示すようにインクコネク
タ(8)を接続する部分のみにTiN層(5)を設ける
場合と第3図のようlこ共通電極(6a)全体にTiN
層(5)を設ける場合が考えられる。Note that since the TiN layer (5) has a high contact resistance, if it is provided on the grid electrode (6a), the conversion efficiency of the GaAs solar cell will decrease, so it cannot be provided on the entire upper part of the P-type electrode layer (6). Therefore, as shown in Fig. 1, there is a case where the TiN layer (5) is provided only in the part where the ink connector (8) is connected, and a case where the TiN layer (5) is provided only on the part where the ink connector (8) is connected, and a case where the TiN layer (5) is provided on the entire common electrode (6a) as shown in Fig. 3.
A case may be considered in which a layer (5) is provided.
以上のように、この発明によれば共通電極部内のP形電
極層とP形Gaza層との間にTiN層を形成したので
、P形電極材料にPn接合が損傷されるのを防止できる
。従って前記により、溶接時に高い溶接電圧を印加臼で
きので、インクコネクタの接着強度の高いGaAs太陽
電池が得られる効果がある。また、このTiN層はGa
As太陽電池以外のGaAs半導体装置にも適用できろ
。As described above, according to the present invention, since the TiN layer is formed between the P-type electrode layer and the P-type Gaza layer in the common electrode section, it is possible to prevent the Pn junction from being damaged in the P-type electrode material. Therefore, as described above, since a high welding voltage can be applied during welding, a GaAs solar cell with high adhesive strength of the ink connector can be obtained. Moreover, this TiN layer is made of Ga
It should be applicable to GaAs semiconductor devices other than As solar cells.
第1図、第3図はこの発明の一実施例によろGaAs太
陽電池の一ヒ面図、第2図はこの発明の一実施例による
GaAs太陽電池の製造工程を示す断面図、第2図(b
)は第1図のHb−1’Ib’綿断面図、第4図は従来
のGaAs太陽電池の製造工程を示す断面図である。
l if n形GaAs基板、2はP形GaAs層、3
はAj’−GaAs層、4ζよ反射防止膜、5はTiN
層、6はP形電極層、6aは格子状電極、6biよ共通
電極、7はn形電極層、8はインクコネクタである。な
お、図中、同一符号は同一、又(よ相当部分を示す。1 and 3 are a front view of a GaAs solar cell according to an embodiment of the present invention, and FIG. 2 is a sectional view showing the manufacturing process of a GaAs solar cell according to an embodiment of the present invention. (b
) is a sectional view of Hb-1'Ib' cotton in FIG. 1, and FIG. 4 is a sectional view showing the manufacturing process of a conventional GaAs solar cell. l if n-type GaAs substrate, 2 is P-type GaAs layer, 3
is Aj'-GaAs layer, 4ζ is anti-reflection film, 5 is TiN
6 is a P-type electrode layer, 6a is a grid electrode, 6bi is a common electrode, 7 is an N-type electrode layer, and 8 is an ink connector. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
に形成されたTiN層、前記GaAs層とTiN層の表
面に形成された電極層、前記TiN層上の前記電極層表
面に形成された電極とを備えたGaAs半導体装置。A GaAs layer, a TiN layer formed on a selected region of the surface of the GaAs layer, an electrode layer formed on the surfaces of the GaAs layer and the TiN layer, and an electrode formed on the surface of the electrode layer on the TiN layer. A GaAs semiconductor device equipped with.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60196966A JPS6255963A (en) | 1985-09-04 | 1985-09-04 | Gaas semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60196966A JPS6255963A (en) | 1985-09-04 | 1985-09-04 | Gaas semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6255963A true JPS6255963A (en) | 1987-03-11 |
Family
ID=16366608
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60196966A Pending JPS6255963A (en) | 1985-09-04 | 1985-09-04 | Gaas semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6255963A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011517105A (en) * | 2008-04-08 | 2011-05-26 | エフオーエム・インスティテュート・フォー・アトミック・アンド・モルキュラー・フィジックス | Solar cell with surface plasmon resonance generated nanostructure |
WO2022138623A1 (en) | 2020-12-21 | 2022-06-30 | 出光興産株式会社 | Electrode structure for solar cell and manufacturing method therefor |
WO2022138619A1 (en) | 2020-12-21 | 2022-06-30 | 出光興産株式会社 | Electrode structure of solar cell and method for manufacturing same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58188157A (en) * | 1982-04-28 | 1983-11-02 | Toshiba Corp | Semiconductor device and manufacture thereof |
JPS5998553A (en) * | 1982-11-26 | 1984-06-06 | Mitsubishi Electric Corp | Electrode structure for gaas semiconductor device |
-
1985
- 1985-09-04 JP JP60196966A patent/JPS6255963A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58188157A (en) * | 1982-04-28 | 1983-11-02 | Toshiba Corp | Semiconductor device and manufacture thereof |
JPS5998553A (en) * | 1982-11-26 | 1984-06-06 | Mitsubishi Electric Corp | Electrode structure for gaas semiconductor device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011517105A (en) * | 2008-04-08 | 2011-05-26 | エフオーエム・インスティテュート・フォー・アトミック・アンド・モルキュラー・フィジックス | Solar cell with surface plasmon resonance generated nanostructure |
WO2022138623A1 (en) | 2020-12-21 | 2022-06-30 | 出光興産株式会社 | Electrode structure for solar cell and manufacturing method therefor |
WO2022138619A1 (en) | 2020-12-21 | 2022-06-30 | 出光興産株式会社 | Electrode structure of solar cell and method for manufacturing same |
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