JP5341297B2 - Compound single crystal solar cell and method for producing compound single crystal solar cell - Google Patents

Compound single crystal solar cell and method for producing compound single crystal solar cell Download PDF

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JP5341297B2
JP5341297B2 JP2005332580A JP2005332580A JP5341297B2 JP 5341297 B2 JP5341297 B2 JP 5341297B2 JP 2005332580 A JP2005332580 A JP 2005332580A JP 2005332580 A JP2005332580 A JP 2005332580A JP 5341297 B2 JP5341297 B2 JP 5341297B2
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高明 安居院
達也 高本
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Description

本発明は、化合物単結晶太陽電池および化合物単結晶太陽電池の製造方法に関し、更に詳しくは電極形成工程を簡略化することができる化合物単結晶太陽電池および化合物単結晶太陽電池の製造方法に関する。   The present invention relates to a compound single crystal solar cell and a method for producing a compound single crystal solar cell, and more particularly to a compound single crystal solar cell and a method for producing a compound single crystal solar cell that can simplify an electrode forming step.

太陽電池の中で発電効率が高く宇宙用太陽電池に適している太陽電池として、半導体基板上に化合物半導体単結晶層を積層してなる化合物半導体太陽電池がある。宇宙用太陽電池はその質量を低減することが重要であり、太陽電池として機能しない半導体基板の厚みを薄くする、あるいは基板除去して軽量化する技術が開発されている。   Among solar cells, as a solar cell having high power generation efficiency and suitable for a space solar cell, there is a compound semiconductor solar cell in which a compound semiconductor single crystal layer is stacked on a semiconductor substrate. It is important to reduce the mass of space solar cells, and a technology has been developed to reduce the thickness of a semiconductor substrate that does not function as a solar cell, or to reduce the weight by removing the substrate.

従来、薄膜化された化合物半導体太陽電池においては、電極形成およびセル間接続時に生じる凹凸が原因で封止工程等の電極形成後の工程において太陽電池の損傷が発生していた。これを回避するために、異なる極性の電極を共に太陽光の入射する側に形成し、電極形成およびセル間接続時に生じる凹凸を低減する方法が開発されている(特許文献1)。   Conventionally, in a thinned compound semiconductor solar battery, damage to the solar battery has occurred in a process after electrode formation such as a sealing process due to irregularities generated during electrode formation and inter-cell connection. In order to avoid this, a method has been developed in which electrodes having different polarities are formed on the side on which sunlight is incident to reduce unevenness that occurs during electrode formation and inter-cell connection (Patent Document 1).

図9、図10には特許文献1の化合物太陽電池の概略断面図を示す。図9の化合物太陽電池はp型Ge基板1/n型Ge層2/n型GaAs層3/n型InGaP層4/p型AlGaAs層5/p型InGaP層6/p型GaAs層7/n型GaAs層8/n型AlInP層9/n型InGaP層10/p型AlGaAs層11/p型AlInP層12/p型InGaP層13/n型InGaP層14/n型AlInP層15/n型GaAs層16からなる半導体層、図10の化合物太陽電池はp型InGaP層27/p型AlGaAs層28/p型AlInP層29/p型InGaP層30/n型InGaP層31/n型AlInP層32/n型GaAs層33からなる半導体層に、それぞれ蒸着法により第一電極17と第二電極18が形成され、Agリボン配線22、23が接続された構造である。太陽電池の光入射面側に極性の異なる第一電極17と第二電極18が形成されており、太陽電池の表面裏面の両面に電極・配線が形成された構造と比較して、電極および配線により生じる凹凸が低減されている。
特願2005−168124号
9 and 10 are schematic cross-sectional views of the compound solar cell of Patent Document 1. FIG. 9 includes a p-type Ge substrate 1 / n-type Ge layer 2 / n-type GaAs layer 3 / n-type InGaP layer 4 / p-type AlGaAs layer 5 / p-type InGaP layer 6 / p-type GaAs layer 7 / n. Type GaAs layer 8 / n type AlInP layer 9 / n type InGaP layer 10 / p type AlGaAs layer 11 / p type AlInP layer 12 / p type InGaP layer 13 / n type InGaP layer 14 / n type AlInP layer 15 / n type GaAs 10 is a p-type InGaP layer 27 / p-type AlGaAs layer 28 / p-type AlInP layer 29 / p-type InGaP layer 30 / n-type InGaP layer 31 / n-type AlInP layer 32 /. The first electrode 17 and the second electrode 18 are formed on the semiconductor layer composed of the n-type GaAs layer 33 by vapor deposition, and the Ag ribbon wirings 22 and 23 are connected to each other. Compared with the structure in which the first electrode 17 and the second electrode 18 having different polarities are formed on the light incident surface side of the solar cell, and electrodes / wirings are formed on both the front and back surfaces of the solar cell, the electrode and the wiring The unevenness caused by is reduced.
Japanese Patent Application No. 2005-168124

しかしながら、特許文献1の太陽電池構造の場合は、第一電極17がn型GaAs層16上、第二電極18がp型Ge基板1上(図9)、または第一電極17がn型GaAs層33上、第二電極18がp型AlGaAs層28上(図10)とそれぞれ異なった導電型の半導体上に形成されている。このため、これらの電極は、第一電極17がAu−Ge(100nm)/Ni(20nm)/Au(100nm)/Ag(5000nm)を順次積層した構造、第二電極18がAu(30nm)/Ag(5000nm)を順次積層した構造とそれぞれ異なった材料とする必要があり、半導体層に対して同じ側に電極が設けられているにも関わらず2度の電極形成工程が必要であった。   However, in the case of the solar cell structure of Patent Document 1, the first electrode 17 is on the n-type GaAs layer 16, the second electrode 18 is on the p-type Ge substrate 1 (FIG. 9), or the first electrode 17 is n-type GaAs. On the layer 33, the second electrode 18 is formed on a semiconductor having a different conductivity type from that on the p-type AlGaAs layer 28 (FIG. 10). For this reason, the first electrode 17 has a structure in which Au—Ge (100 nm) / Ni (20 nm) / Au (100 nm) / Ag (5000 nm) are sequentially stacked, and the second electrode 18 has Au (30 nm) / It was necessary to use a material different from the structure in which Ag (5000 nm) was sequentially laminated, and two electrode formation steps were required even though the electrodes were provided on the same side of the semiconductor layer.

本発明は上記の点に鑑みなされたものであり、電極形成工程をより簡略化できる化合物単結晶太陽電池の構造および製造方法を提供することを目的とする。   This invention is made | formed in view of said point, and it aims at providing the structure and manufacturing method of a compound single crystal solar cell which can simplify an electrode formation process more.

上記目的を達成するために本発明は、光電変換層を含み上面が第一導電型である第一半導体積層体と、
第一半導体積層体の上面に形成されたキャップ層と、
キャップ層の上面に形成された第一の極性を有する第一電極と、
前記第一半導体積層体の下面に形成されその一部が前記上面側に露出した露出面を有する第一導電型の第一半導体層と、
前記露出面に形成された第二の極性を有する第二電極と、
を備え、前記光電変換層の最下部層と前記第一半導体層の間に位置する層の界面の一つは、トンネル接合により電気的に接合されており、
前記第一半導体および前記キャップ層は、n型GaAsからなり、
前記第一電極および前記第二電極は、同一材料から形成される化合物単結晶太陽電池とした。
In order to achieve the above object, the present invention includes a first semiconductor laminate including a photoelectric conversion layer and having an upper surface of a first conductivity type,
A cap layer formed on the upper surface of the first semiconductor laminate;
A first electrode having a first polarity formed on the upper surface of the cap layer;
A first semiconductor layer of a first conductivity type formed on the lower surface of the first semiconductor laminate and having an exposed surface, a part of which is exposed on the upper surface side;
A second electrode having a second polarity formed on the exposed surface;
One of the interfaces of the layers located between the lowermost layer of the photoelectric conversion layer and the first semiconductor layer is electrically joined by a tunnel junction,
Said first semiconductor layer and the cap layer, Ri n-type GaAs Tona,
The first electrode and the second electrode were compound single crystal solar cells formed from the same material .

この構造によれば、第一電極と第二電極を同一導電型の半導体層上に形成することとなるため、第一電極と第二電極として同一の材料で同時に形成することができ、電極形成工程の簡易化が可能となる。   According to this structure, since the first electrode and the second electrode are formed on the semiconductor layer of the same conductivity type, the first electrode and the second electrode can be formed of the same material at the same time. The process can be simplified.

また、本発明は、前記トンネル接合は、前記第一半導体積層体と前記第一半導体層の界面に形成されていることが望ましい。   In the present invention, it is preferable that the tunnel junction is formed at an interface between the first semiconductor stacked body and the first semiconductor layer.

また、本発明は、前記第一半導体積層体の上面を構成する層と前記第一半導体層の主材料が同じであることが望ましい。   In the present invention, the main material of the first semiconductor layer and the layer constituting the upper surface of the first semiconductor stacked body are preferably the same.

また、本発明は、前記第一半導体層の下面には第一導電型を有する単結晶半導体からなる第二半導体積層体が形成されていることが望ましい。   In the present invention, it is desirable that a second semiconductor stacked body made of a single crystal semiconductor having the first conductivity type is formed on the lower surface of the first semiconductor layer.

また、本発明は、前記第二半導体積層体は単結晶半導体基板を含んでいても良い。
また、本発明は、前記第二半導体積層体の下面には導電膜が形成されていることが望ましい。
In the present invention, the second semiconductor stacked body may include a single crystal semiconductor substrate.
In the present invention, it is desirable that a conductive film is formed on the lower surface of the second semiconductor laminate.

また、本発明は、前記導電膜は透明導電材料からなることが望ましい。
また、本発明は、前記導電膜は金属膜を含むことが望ましい
In the present invention, the conductive film is preferably made of a transparent conductive material.
In the present invention, the conductive film preferably includes a metal film .

また、本発明は、単結晶半導体基板の上面に1層以上の半導体層からなる第二半導体積層体を形成する工程と、
前記第二半導体積層体の上面に第一導電型の第一半導体層を形成する工程と、
前記第一半導体層の上面に光電変換層を含み上面側が第一導電型である第一半導体積層体を形成する工程と、
第一半導体積層体の一部をエッチング除去することにより前記第一半導体層の上面の一部を露出させた露出面を形成する工程と、
前記第一半導体積層体の上面に第一導電型のキャップ層を形成する工程と、
前記キャップ層の上面に第一の極性を有する第一電極、前記第一半導体層の露出面に第二の極性を有する第二電極を同時に形成する工程と、
を含み、
前記第一半導体層および前記キャップ層は、n型GaAsからなり、
前記第一電極および前記第二電極は、同一材料から形成され、かつ同一方向から形成される、化合物単結晶太陽電池の製造方法とした。
The present invention also includes a step of forming a second semiconductor stacked body including one or more semiconductor layers on the upper surface of the single crystal semiconductor substrate;
Forming a first semiconductor layer of a first conductivity type on the upper surface of the second semiconductor laminate;
Forming a first semiconductor stacked body including a photoelectric conversion layer on an upper surface of the first semiconductor layer and having an upper surface side of the first conductivity type;
Forming an exposed surface that exposes a portion of the upper surface of the first semiconductor layer by etching away a portion of the first semiconductor stack; and
Forming a first conductivity type cap layer on the upper surface of the first semiconductor laminate;
Simultaneously forming a first electrode having a first polarity on the upper surface of the cap layer and a second electrode having a second polarity on the exposed surface of the first semiconductor layer;
Including
Said first semiconductor layer and the cap layer, Ri n-type GaAs Tona,
The first electrode and the second electrode are made of the same material and are formed from the same direction .

この製造方法によれば、第一電極と第二電極を同一方向を向いた同一導電型の半導体層上に形成できるため、第一電極と第二電極として同一の材料で同時に形成することができる。   According to this manufacturing method, since the first electrode and the second electrode can be formed on the same conductivity type semiconductor layer facing the same direction, the first electrode and the second electrode can be simultaneously formed of the same material. .

また、本発明は、前記第一半導体層は前記単結晶半導体基板と格子整合することが望ましい。   In the present invention, the first semiconductor layer is preferably lattice-matched with the single crystal semiconductor substrate.

また、本発明は、前記単結晶半導体基板を除去する工程を含むことが望ましい The present invention preferably includes a step of removing the single crystal semiconductor substrate .

本発明によれば、光電変換層を含み上面が第一導電型である第一半導体積層体と、第一半導体積層体の上面に形成されたキャップ層と、キャップ層の上面に形成された第一の極性を有する第一電極と、前記第一半導体積層体の下面に形成されその一部が前記上面側に露出した露出面を有する第一導電型の第一半導体層と、前記露出面に形成された第二の極性を有する第二電極と、を備え、前記光電変換層の最下部層と前記第一半導体層の間に位置する層の界面の一つは、トンネル接合により電気的に接合されており、前記第一半導体および前記キャップ層は、n型GaAsからなり、前記第一電極および前記第二電極は、同一材料から形成される化合物単結晶太陽電池とした。上記の構造により第一電極と第二電極を同一導電型の半導体層上に同一方向から形成することとなるため、電極形成工程において同一電極材料で同時に形成することができ、製造工程を簡略化できる。 According to the present invention, the first semiconductor stacked body including the photoelectric conversion layer and having the upper surface of the first conductivity type, the cap layer formed on the upper surface of the first semiconductor stacked body, and the first layer formed on the upper surface of the cap layer. A first electrode having one polarity; a first semiconductor layer of a first conductivity type formed on a lower surface of the first semiconductor multilayer body and having an exposed surface partially exposed on the upper surface side; and on the exposed surface A second electrode having a second polarity formed, and one of the interfaces of the layer located between the lowermost layer of the photoelectric conversion layer and the first semiconductor layer is electrically connected by a tunnel junction. are bonded, said first semiconductor layer and the cap layer, Ri n-type GaAs Tona, the first electrode and the second electrode was a compound single crystal solar cell formed from the same material. With the above structure, the first electrode and the second electrode are formed on the same conductivity type semiconductor layer from the same direction, and therefore can be formed simultaneously with the same electrode material in the electrode formation process, simplifying the manufacturing process. it can.

以下、本発明の実施形態について図を基に説明する。図1は、本実施形態に係る化合物単結晶太陽電池の概略断面図である。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view of a compound single crystal solar cell according to this embodiment.

光電変換層を含む第一半導体積層体101の第一導電型を有する上面101aの少なくとも一部には、第一導電型を有するキャップ層102が形成されている。キャップ層102の上面102aの少なくとも一部には、第一の極性の第一電極103が形成されている。   A cap layer 102 having the first conductivity type is formed on at least a part of the upper surface 101a having the first conductivity type of the first semiconductor stacked body 101 including the photoelectric conversion layer. A first electrode 103 having a first polarity is formed on at least a part of the upper surface 102 a of the cap layer 102.

第一半導体積層体101の下面101bには第一の導電型を有する第一半導体層104が形成され、その上面の一部は露出した露出面104aを備えている。露出面104aには第二の極性の第二電極105が形成された構造である。第一の極性と第二の極性とは互いに異なった極性であり、それぞれ正負いずれかの極性である。   A first semiconductor layer 104 having the first conductivity type is formed on the lower surface 101b of the first semiconductor stacked body 101, and a part of the upper surface thereof has an exposed exposed surface 104a. A second electrode 105 having a second polarity is formed on the exposed surface 104a. The first polarity and the second polarity are different from each other and are either positive or negative.

第一半導体層104は第一半導体積層体101に含まれた光電変換層とトンネル接合を介して電気的に接続されている。   The first semiconductor layer 104 is electrically connected to the photoelectric conversion layer included in the first semiconductor stacked body 101 via a tunnel junction.

上記の構造により第一電極103と第二電極105を同一導電型の半導体層上に同一方向から形成することとなるため、電極形成工程において同一電極材料を同時に形成することができ、電極形成工程を簡略化できる。   With the above structure, the first electrode 103 and the second electrode 105 are formed on the same conductivity type semiconductor layer from the same direction. Therefore, the same electrode material can be formed at the same time in the electrode forming step. Can be simplified.

前記トンネル接合は、第一半導体積層体101内に備わっていても良いが、第一半導体積層体101と第一半導体層104の界面に備わっていることが好ましい。   The tunnel junction may be provided in the first semiconductor stacked body 101, but is preferably provided at the interface between the first semiconductor stacked body 101 and the first semiconductor layer 104.

第一半導体積層体101と第一半導体層104の界面にトンネル接合が備わっている場合は、第一半導体積層体101の最下層101cと第一半導体層104のキャリア濃度が高濃度とされるため、第一半導体層104の電気抵抗が低く抑えられる。本構造においては、第一半導体積層体101中の光電変換層で発生した電流が第一半導体層104を面内方向に流れ第二電極105に収集されるため、第一半導体層104の電気抵抗を低く抑えることにより直列抵抗を低減する効果がある。   When a tunnel junction is provided at the interface between the first semiconductor stacked body 101 and the first semiconductor layer 104, the carrier concentration of the lowermost layer 101c of the first semiconductor stacked body 101 and the first semiconductor layer 104 is high. The electrical resistance of the first semiconductor layer 104 is kept low. In this structure, since the current generated in the photoelectric conversion layer in the first semiconductor stacked body 101 flows in the in-plane direction of the first semiconductor layer 104 and is collected by the second electrode 105, the electric resistance of the first semiconductor layer 104 Is effective to reduce the series resistance.

また、第一半導体積層体101の第一導電型を有する上面101aと、第一半導体層104の主材料を同じものとすることが望ましい。第一電極103と第二電極105を同時に同じ材料により形成する工程において、両電極を形成する下地となる半導体材料の主材料が同じであれば、コンタクト抵抗を低減できる工程の条件が同一となり、その条件選定が容易となる。   Moreover, it is desirable that the upper surface 101 a having the first conductivity type of the first semiconductor stacked body 101 and the main material of the first semiconductor layer 104 be the same. In the process of simultaneously forming the first electrode 103 and the second electrode 105 with the same material, if the main material of the semiconductor material that is the base for forming both electrodes is the same, the process conditions that can reduce the contact resistance are the same, The condition selection becomes easy.

本実施形態において、第一電極103、第二電極105はそれぞれ、金属などの不透明材料またはZnO(酸化亜鉛)、SnO2(酸化スズ)若しくはITO(Indium Tin Oxide)などの透明導電材料を用いることができる。 In the present embodiment, each of the first electrode 103 and the second electrode 105 is made of an opaque material such as metal or a transparent conductive material such as ZnO (zinc oxide), SnO 2 (tin oxide) or ITO (Indium Tin Oxide). Can do.

また、図2に示すように、第一半導体層104の下面104bには、さらに第二半導体積層体106を積層した構造としても良い。第二半導体積層体106は第一半導体層104と同一の導電型を有する1層以上の単結晶半導体からなり、単結晶半導体基板を含んでいても良い。   In addition, as shown in FIG. 2, the second semiconductor stacked body 106 may be further stacked on the lower surface 104 b of the first semiconductor layer 104. The second semiconductor stacked body 106 is made of one or more single crystal semiconductors having the same conductivity type as the first semiconductor layer 104, and may include a single crystal semiconductor substrate.

本実施形態の化合物単結晶太陽電池を製造する工程においては、単結晶半導体基板上に半導体膜をエピタキシャル成長させるため、単結晶半導体基板と格子整合するこのが望ましい。単結晶半導体基板は、化合物単結晶太陽電池の製造開始時の半導体層を成長させるための基板であって、太陽電池製造後も残存させることもできるが、完成前に軽量化、薄型化のために、エッチング、ELO(エピタキシャルリフトオフ)等の方法により除去することもできる。   In the process of manufacturing the compound single crystal solar cell of this embodiment, it is desirable that the semiconductor film is epitaxially grown on the single crystal semiconductor substrate, and this is lattice-matched with the single crystal semiconductor substrate. A single crystal semiconductor substrate is a substrate for growing a semiconductor layer at the start of manufacturing a compound single crystal solar cell, and can be left after the solar cell is manufactured. Further, it can be removed by a method such as etching or ELO (epitaxial lift-off).

単結晶半導体基板上に第二半導体積層体106を形成してから、第一半導体層104を積層することにより、単結晶半導体基板と第一半導体層104の格子不整合を緩和することができ、第一半導体層104より上部のエピタキシャル層(第一半導体層104、第一半導体積層体101)の結晶欠陥低減等の高品質化を図られる。   By forming the second semiconductor stacked body 106 on the single crystal semiconductor substrate and then stacking the first semiconductor layer 104, lattice mismatch between the single crystal semiconductor substrate and the first semiconductor layer 104 can be relaxed, The quality of the epitaxial layer (the first semiconductor layer 104, the first semiconductor stacked body 101) above the first semiconductor layer 104 can be improved, such as reducing crystal defects.

また、図3に示すように、第二半導体積層体106の下面106bには導電膜107が形成されていることが望ましい。導電膜107はZnO(酸化亜鉛)、SnO2(酸化スズ)若しくはITO(Indium Tin Oxide)などの透明導電材料、金属などの不透明材料またはこれらが積層されたものでも良い。導電膜107は、第二半導体積層体106の下面106bの少なくとも一部に設けられていれば良く、全面に設けられていることが望ましい。 Further, as shown in FIG. 3, it is desirable that a conductive film 107 is formed on the lower surface 106 b of the second semiconductor stacked body 106. The conductive film 107 may be a transparent conductive material such as ZnO (zinc oxide), SnO 2 (tin oxide) or ITO (Indium Tin Oxide), an opaque material such as metal, or a laminate of these. The conductive film 107 may be provided on at least a part of the lower surface 106b of the second semiconductor stacked body 106, and is preferably provided on the entire surface.

上記構造により、第一半導体積層体101内の光電変換層で発生した電流の一部は、第一半導体層104、第二半導体積層体106を積層方向に流れ、電気抵抗の低い導電膜107内を通じて太陽電池の面内方向に流れた後、第二半導体積層体106、第一半導体層104を通じて第二電極105に収集される経路をとることができ、出力電流が流れる部分の直列抵抗を低減することができる。導電膜107を第二半導体積層体106の下面106bの全面に設けた場合に、この効果が最も大きくなりさらに望ましい。   With the above structure, part of the current generated in the photoelectric conversion layer in the first semiconductor stacked body 101 flows in the stacking direction through the first semiconductor layer 104 and the second semiconductor stacked body 106, and in the conductive film 107 with low electrical resistance. After flowing in the in-plane direction of the solar cell through, it is possible to take a path collected by the second electrode 105 through the second semiconductor stacked body 106 and the first semiconductor layer 104, reducing the series resistance of the portion through which the output current flows can do. When the conductive film 107 is provided on the entire surface of the lower surface 106b of the second semiconductor stacked body 106, this effect becomes the largest and is more desirable.

また、導電膜107が透明導電材料により形成されている場合、あるいは金属等の不透明材料が部分的に形成されており光が透過する構成であれば、上面下面のどちらから光を入射しても良い。このような光透過型の太陽電池は、異なったバンドギャップを有する他の太陽電池と積層することによりメカニカルスタック型の太陽電池として利用することも可能である。   In addition, when the conductive film 107 is formed of a transparent conductive material, or when an opaque material such as a metal is partially formed and transmits light, the light can be incident from any of the upper and lower surfaces. good. Such a light transmission type solar cell can be used as a mechanical stack type solar cell by stacking with other solar cells having different band gaps.

また、導電膜107が金属等の不透明導電材料を含む場合には、上面側から光を入射したとき、導電膜107の不透明導電材料部分により太陽光が反射され、再度、第一半導体積層体101内の光電変換層で吸収されるため太陽電池の出力電流の向上を図るという効果を得ることができる。   In the case where the conductive film 107 includes an opaque conductive material such as metal, when light is incident from the upper surface side, sunlight is reflected by the opaque conductive material portion of the conductive film 107, and again, the first semiconductor laminate 101 Since it is absorbed by the photoelectric conversion layer, the effect of improving the output current of the solar cell can be obtained.

本実施例においては、本発明の化合物単結晶太陽電池の製造方法を図を基に説明する。図4には本実施例の化合物単結晶太陽電池の製造工程を示す。   In this example, a method for producing a compound single crystal solar cell of the present invention will be described with reference to the drawings. FIG. 4 shows a manufacturing process of the compound single crystal solar cell of this example.

単結晶半導体基板401としてn型GaAs基板401を用い、n型GaAs基板401上に化合物半導体単結晶層をMO−CVD法を用いたエピタキシャル成長により順次形成した(a)。具体的には、まず、Siをドーピングした直径50mmの円板状のn型GaAs基板401上に厚さ3μmのn型GaAsバッファ層402、厚さ0.02μmのn型InGaPバッファ層403を形成した。次に、n型InGaPバッファ層403上に厚さ0.02μmのn型GaAs第一半導体層104を形成した。第一半導体層104は基板401と格子整合することが望ましく、格子整合することにより結晶欠陥の発生を抑えた良質な膜成長が可能となる。次に、n型GaAs第一半導体層104上には厚さ0.02μmのp型AlGaAs層404を形成した。ここで、n型GaAs第一半導体層104とp型AlGaAs層404とはトンネル接合となる。   An n-type GaAs substrate 401 was used as the single crystal semiconductor substrate 401, and a compound semiconductor single crystal layer was sequentially formed on the n-type GaAs substrate 401 by epitaxial growth using the MO-CVD method (a). Specifically, first, an n-type GaAs buffer layer 402 having a thickness of 3 μm and an n-type InGaP buffer layer 403 having a thickness of 0.02 μm are formed on a disk-shaped n-type GaAs substrate 401 having a diameter of 50 mm doped with Si. did. Next, an n-type GaAs first semiconductor layer 104 having a thickness of 0.02 μm was formed on the n-type InGaP buffer layer 403. The first semiconductor layer 104 is desirably lattice-matched with the substrate 401. By lattice matching, it is possible to grow a high-quality film while suppressing generation of crystal defects. Next, a p-type AlGaAs layer 404 having a thickness of 0.02 μm was formed on the n-type GaAs first semiconductor layer 104. Here, the n-type GaAs first semiconductor layer 104 and the p-type AlGaAs layer 404 form a tunnel junction.

前記トンネル接合は、本発明の特徴の一つである第一半導体層104と光電変換層の間に位置するトンネル接合である。   The tunnel junction is a tunnel junction located between the first semiconductor layer 104 and the photoelectric conversion layer, which is one of the characteristics of the present invention.

次いで、前記p型AlGaAs層404を含み、2接合型太陽電池セルを構成する光電変換層を有する第一半導体積層体101が形成した。まず、p型AlGaAs層上に裏面電界層として厚さ0.1μmのp型InGaP層を形成し、p型InGaP層上にベース層として厚さ3μmのp型GaAs層を形成した。その後、p型GaAs層上にエミッタ層として厚さ0.1μmのn型GaAs層を形成し、n型GaAs層上に窓層として厚さ0.03μmのn型AlInP層を形成した。   Next, a first semiconductor laminate 101 including the p-type AlGaAs layer 404 and having a photoelectric conversion layer constituting a two-junction solar cell was formed. First, a p-type InGaP layer having a thickness of 0.1 μm was formed as a back surface field layer on the p-type AlGaAs layer, and a p-type GaAs layer having a thickness of 3 μm was formed as a base layer on the p-type InGaP layer. Thereafter, an n-type GaAs layer having a thickness of 0.1 μm was formed as an emitter layer on the p-type GaAs layer, and an n-type AlInP layer having a thickness of 0.03 μm was formed as a window layer on the n-type GaAs layer.

前記p型InGaP層(裏面電界層)/p型GaAs層(ベース層)/n型GaAs層(エミッタ層)/n型AlInP層(窓層)によりGaAsボトムセル層が構成され、p型GaAs層(ベース層)とn型GaAs層(エミッタ層)はGaAsボトムセルの光電変換層として機能する。   The p-type InGaP layer (back surface field layer) / p-type GaAs layer (base layer) / n-type GaAs layer (emitter layer) / n-type AlInP layer (window layer) constitutes a GaAs bottom cell layer, and a p-type GaAs layer ( The base layer) and the n-type GaAs layer (emitter layer) function as a photoelectric conversion layer of the GaAs bottom cell.

続いて、n型AlInP層上に厚さ0.02μmのn型InGaP層を形成し、前記n型InGaP層上に厚さ0.02μmのp型AlGaAs層を形成した。ここで、n型InGaP層とp型AlGaAs層とはトンネル接合となる。本トンネル接合は、前記GaAsボトムセルと後述するInGaPトップセルを電気的に接合するためのものであり、本発明の特徴の一つである第一半導体層104と光電変換層の間に位置するトンネル接合ではない。   Subsequently, an n-type InGaP layer having a thickness of 0.02 μm was formed on the n-type AlInP layer, and a p-type AlGaAs layer having a thickness of 0.02 μm was formed on the n-type InGaP layer. Here, the n-type InGaP layer and the p-type AlGaAs layer form a tunnel junction. This tunnel junction is for electrically joining the GaAs bottom cell and an InGaP top cell described later, and is a tunnel located between the first semiconductor layer 104 and the photoelectric conversion layer, which is one of the features of the present invention. It is not joining.

さらに、p型AlGaAs層上に裏面電界層として厚さ0.03μmのp型AlInP層を形成し、p型AlInP層上にベース層として厚さ0.5μmのp型InGaP層を形成した。次に、p型InGaP層上にエミッタ層として厚さ0.05μmのn型InGaP層を形成し、n型InGaP層上に窓層として厚さ0.03μmのn型AlInP層を形成した。   Further, a p-type AlInP layer having a thickness of 0.03 μm was formed as a back surface field layer on the p-type AlGaAs layer, and a p-type InGaP layer having a thickness of 0.5 μm was formed as a base layer on the p-type AlInP layer. Next, an n-type InGaP layer having a thickness of 0.05 μm was formed as an emitter layer on the p-type InGaP layer, and an n-type AlInP layer having a thickness of 0.03 μm was formed as a window layer on the n-type InGaP layer.

前記p型AlInP層(裏面電界層)/p型InGaP層(ベース層)/n型InGaP層(エミッタ層)/n型AlInP層(窓層)によりInGaPトップセル層が構成され、p型InGaP層(ベース層)とn型InGaP層(エミッタ層)はInGaPトップセルの光電変換層として機能する。   The p-type InGaP layer is constituted by the p-type AlInP layer (back surface field layer) / p-type InGaP layer (base layer) / n-type InGaP layer (emitter layer) / n-type AlInP layer (window layer). The (base layer) and the n-type InGaP layer (emitter layer) function as a photoelectric conversion layer of the InGaP top cell.

さらに、n型AlInP窓層上に厚さ0.5μmのn型GaAsキャップ層102を形成した。これにより、第二半導体積層体106、第一半導体層104、第一半導体積層体101とキャップ層102が積層され、InGaPトップセル/GaAsボトムセルの2接合型化合物太陽電池が形成された。   Further, an n-type GaAs cap layer 102 having a thickness of 0.5 μm was formed on the n-type AlInP window layer. As a result, the second semiconductor stacked body 106, the first semiconductor layer 104, the first semiconductor stacked body 101, and the cap layer 102 were stacked to form an InGaP top cell / GaAs bottom cell two-junction compound solar cell.

なお、上記のエピタキシャル成長温度は約700℃とした。また、GaAs層を成長させるための原料としては、TMG(トリメチルガリウム)およびAsH3(アルシン)を用い、InGaP層を成長させるための原料としては、TMI(トリメチルインジウム)、TMGおよびPH3(ホスフィン)を用いた。 The above epitaxial growth temperature was about 700 ° C. Further, TMG (trimethylgallium) and AsH 3 (arsine) are used as raw materials for growing the GaAs layer, and TMI (trimethylindium), TMG and PH 3 (phosphine) are used as raw materials for growing the InGaP layer. ) Was used.

AlInP層を成長させるための原料としては、TMA(トリメチルアルミニウム)、TMIおよびPH3を用い、n型GaAs層、n型InGaP層およびn型AlInP層を形成するためのn型不純物源としては、それぞれSiH4(モノシラン)を用いた。 As raw materials for growing the AlInP layer, TMA (trimethylaluminum), TMI and PH 3 are used. As an n-type impurity source for forming the n-type GaAs layer, the n-type InGaP layer and the n-type AlInP layer, SiH 4 (monosilane) was used for each.

一方、p型GaAs層、p型InGaP層およびp型AlInP層を形成するためのp型不純物源としては、それぞれDEZn(ジエチル亜鉛)を用いた。さらに、AlGaAs層を成長させるための原料としては、TMI、TMGおよびAsH3が用いられ、p型AlGaAs層を形成するためのp型不純物源としては、CBr4(四臭化炭素)を用いた。 On the other hand, DEZn (diethyl zinc) was used as a p-type impurity source for forming the p-type GaAs layer, the p-type InGaP layer, and the p-type AlInP layer. Further, TMI, TMG, and AsH 3 were used as raw materials for growing the AlGaAs layer, and CBr 4 (carbon tetrabromide) was used as the p-type impurity source for forming the p-type AlGaAs layer. .

次に、n型GaAsキャップ層102表面の全面にレジストを塗り、櫛形状の電極にするためにフォトリソグラフィーにより、レジストを残し、その後、アンモニア系のエッチング液でレジストが開口した部分のn型GaAs層をエッチングし、適当な有機溶剤を用いてレジストを除去した(b)。この時、下地のn型AlInP層はアンモニア系ではエッチングされないため、n型GaAs層がエッチングされればエッチングは自動的に止まる。   Next, a resist is applied to the entire surface of the n-type GaAs cap layer 102, and the resist is left by photolithography to form a comb-shaped electrode, and then the n-type GaAs in the portion where the resist is opened with an ammonia-based etching solution. The layer was etched and the resist was removed using a suitable organic solvent (b). At this time, since the underlying n-type AlInP layer is not etched in an ammonia system, the etching automatically stops when the n-type GaAs layer is etched.

次に、再度全面にレジストを塗布し、再度のフォトリソグラフィーにより第一半導体積層体101の除去する部分に合わせてレジストを抜き、アンモニア系およびHCl系のエッチング液により第一半導体積層体101の一部をp型AlGaAs層404の表面が露出するまで所定のパターン状に除去し(c)、HCl系のエッチング液によってp型AlGaAs層404を除去した(d)。   Next, a resist is applied again on the entire surface, and the resist is removed again in accordance with a portion to be removed of the first semiconductor stacked body 101 by photolithography, and one of the first semiconductor stacked bodies 101 is removed with an ammonia-based and HCl-based etching solution. The portion was removed in a predetermined pattern until the surface of the p-type AlGaAs layer 404 was exposed (c), and the p-type AlGaAs layer 404 was removed with an HCl-based etchant (d).

この工程により、n型GaAs第一半導体層104の一部を露出させることができる。
次に、適当な有機溶剤を用いてレジストを除去し、再度全面にレジスト406を塗布し、フォトリソグラフィーによりn型GaAsキャップ層102が残っている櫛形状の領域と、n型GaAs第一半導体層104が露出している部分に合わせてレジスト406を抜いた(e)。
By this step, a part of the n-type GaAs first semiconductor layer 104 can be exposed.
Next, the resist is removed using an appropriate organic solvent, a resist 406 is applied again on the entire surface, and the comb-shaped region where the n-type GaAs cap layer 102 remains by photolithography and the n-type GaAs first semiconductor layer The resist 406 was removed in accordance with the exposed portion 104 (e).

その上から電極材料407となる100nmのAu−Ge膜、厚さ20nmのNi膜、厚さ100nmのAu膜および厚さ5000nmのAg膜を順次蒸着し(e)、リフトオフによりレジスト上に蒸着された電極をレジストごと除去し、第一電極103、第二電極105を形成した(f)。その後、熱処理することにより、本発明の構成を含んだ化合物単結晶太陽電池を製造した。   Then, a 100 nm Au—Ge film, a 20 nm thick Ni film, a 100 nm thick Au film, and a 5000 nm thick Ag film as electrode materials 407 are sequentially deposited on the resist by lift-off. The resist was removed together with the resist to form the first electrode 103 and the second electrode 105 (f). Then, the compound single crystal solar cell containing the structure of this invention was manufactured by heat-processing.

図5には本実施例により製造した化合物単結晶太陽電池の概略断面図を示す。上述したように第一電極103、第二電極105は、共にn型GaAs層上に同時に形成され、電極形成工程を簡略化することができた。   FIG. 5 shows a schematic cross-sectional view of a compound single crystal solar cell produced by this example. As described above, both the first electrode 103 and the second electrode 105 are simultaneously formed on the n-type GaAs layer, and the electrode forming process can be simplified.

また、本実施例の太陽電池は、図6に示すようにn型GaAs基板401の下面に更に金属等の不透明電極を含む導電膜107を形成する構成としても良い。この構成により、上面側から入射し第一半導体積層体101、第一半導体層104、n型InGaP層403、n型GaAs層バッファ層402、n型GaAs基板401を透過した光を導電膜107により反射して、第一半導体積層体101中の光電変換層において再度吸収させ、太陽電池の出力を向上させることが可能となる。   Further, the solar cell of this embodiment may be configured such that a conductive film 107 further including an opaque electrode such as a metal is formed on the lower surface of the n-type GaAs substrate 401 as shown in FIG. With this configuration, the conductive film 107 transmits light incident from the upper surface side and transmitted through the first semiconductor stacked body 101, the first semiconductor layer 104, the n-type InGaP layer 403, the n-type GaAs layer buffer layer 402, and the n-type GaAs substrate 401. It is reflected and absorbed again in the photoelectric conversion layer in the first semiconductor stacked body 101, and the output of the solar cell can be improved.

本実施例においては単結晶半導体基板401としてGaAs基板401を使用し、光電変換層としてはInGaP/GaAsを積層したが、単結晶半導体基板401としてはサファイア、Ge等を用いても良く、光電変換層はInGaP/GaAsに限らず他の材料でも良く、また光電変換層は短接合・多接合を問わない。   In this embodiment, a GaAs substrate 401 is used as the single crystal semiconductor substrate 401 and InGaP / GaAs is stacked as the photoelectric conversion layer, but sapphire, Ge, or the like may be used as the single crystal semiconductor substrate 401. The layer is not limited to InGaP / GaAs, and other materials may be used, and the photoelectric conversion layer may be a short junction or a multi-junction.

さらに、本実施例において第一半導体積層体101と第一半導体層104の間に設けられたトンネル接合は、第一半導体積層体101内に設けられていても良い。例えば、図7に示すように第一半導体積層体101の最下層404をp++型AlGaAs層404a、n++ 型GaAs層404b、n型InGaP層404cにより構成し、p++型AlGaAs層404aとn++型GaAs層404bの間にトンネル接合を形成した構造としても上述した本発明の効果を奏することができる。 Furthermore, the tunnel junction provided between the first semiconductor stacked body 101 and the first semiconductor layer 104 in this embodiment may be provided in the first semiconductor stacked body 101. For example, as shown in FIG. 7, the lowermost layer 404 of the first semiconductor stacked body 101 is composed of a p ++ type AlGaAs layer 404a, an n ++ type GaAs layer 404b, and an n ++ type InGaP layer 404c, and a p ++ type AlGaAs layer 404a. The above-described effects of the present invention can also be achieved with a structure in which a tunnel junction is formed between the n ++ type GaAs layers 404b.

本実施例においては、宇宙用等の用途としてさらに軽量化が望まれる場合の本発明の太陽電池の製造方法について説明する。上記図4の工程終了後の太陽電池について以下の工程を実施した。   In this example, a method for manufacturing a solar cell of the present invention when further weight reduction is desired for space applications will be described. The following process was implemented about the solar cell after completion | finish of the process of the said FIG.

まず、第一電極103および第二電極105にそれぞれ長さ10mm×幅3mm×厚さ0.03mmのAgリボン801を配線として溶接により電気的に接続した。   First, an Ag ribbon 801 having a length of 10 mm, a width of 3 mm, and a thickness of 0.03 mm was electrically connected to the first electrode 103 and the second electrode 105, respectively, by welding.

その後、50mm径のn型GaAs基板301から幅20mm×長さ20mmの矩形の板状に切り出した。   Thereafter, the n-type GaAs substrate 301 having a diameter of 50 mm was cut into a rectangular plate shape having a width of 20 mm and a length of 20 mm.

さらに、反射防止膜802として、TiO2膜を厚さ55nm、Al2O3膜を厚さ85nm蒸着した。
続いて、太陽光が入射する第一電極103、第二電極105が形成された面側の表面上にシリコーンからなる透明接着剤803を塗布し、厚さ100μmのガラスからなる透明保護材804をこれに貼り合わせ、所定の温度にて透明接着剤を硬化させることによって透明保護材を接着した。
Further, as the antireflection film 802, a TiO2 film having a thickness of 55 nm and an Al2O3 film having a thickness of 85 nm were deposited.
Subsequently, a transparent adhesive 803 made of silicone is applied on the surface on which the first electrode 103 and the second electrode 105 on which sunlight is incident is formed, and a transparent protective material 804 made of glass having a thickness of 100 μm is applied. The transparent protective material was bonded by bonding to this and curing the transparent adhesive at a predetermined temperature.

その後、透明保護材の表面をレジストでカバーし、太陽光が入射する側と反対側の表面からn型GaAs基板401とn型GaAs層バッファ層402をアンモニア系エッチング液で除去した。そして、薄型化された太陽電池の太陽光が入射する側と反対側の表面上に厚さ30nmのAu膜および厚さ3000nmのAg膜を順次蒸着した後に熱処理することによって導電膜107を形成して図8に示す概略断面図を有する太陽電池を作製した。   Thereafter, the surface of the transparent protective material was covered with a resist, and the n-type GaAs substrate 401 and the n-type GaAs layer buffer layer 402 were removed with an ammonia-based etching solution from the surface opposite to the side on which sunlight was incident. Then, a conductive film 107 is formed by sequentially depositing an Au film having a thickness of 30 nm and an Ag film having a thickness of 3000 nm on the surface of the thinned solar cell opposite to the side on which sunlight is incident, followed by heat treatment. A solar cell having a schematic cross-sectional view shown in FIG.

本実施例で作成した太陽電池の出力電圧電流特性をエアマス(AM)1.5条件下において測定した。その結果、短絡電流Iscは39mA、開放電圧Vocは2.47V、曲線因子FFは0.83、変換効率Effは20%であった。従来の裏面電極を太陽光の入射する側のP型GaAsから取り出した構造のInGaP/GaAs太陽電池の変換効率Effは約20%であることから、本実施例の太陽電池は変換効率Effを従来のものとほぼ同等に維持しつつ、工程の簡略化を図ることができた。   The output voltage / current characteristics of the solar cell produced in this example were measured under air mass (AM) 1.5 conditions. As a result, the short-circuit current Isc was 39 mA, the open circuit voltage Voc was 2.47 V, the fill factor FF was 0.83, and the conversion efficiency Eff was 20%. Since the conversion efficiency Eff of the InGaP / GaAs solar cell having a structure in which the conventional back electrode is taken out from the P-type GaAs on the side where sunlight is incident is about 20%, the solar cell of this embodiment has a conventional conversion efficiency Eff. The process could be simplified while maintaining almost the same as the above.

本発明の本実施形態に係る化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell which concerns on this embodiment of this invention. 本発明の本実施形態において第二半導体積層体を積層した構造を有する化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell which has a structure which laminated | stacked the 2nd semiconductor laminated body in this embodiment of this invention. 本発明の本実施形態において第二半導体積層体と金属を含む導電膜を積層した構造を有する化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell which has a structure which laminated | stacked the electrically conductive film containing a 2nd semiconductor laminated body and a metal in this embodiment of this invention. 本発明の実施例1に係る化合物単結晶太陽電池の製造工程を示す図である。It is a figure which shows the manufacturing process of the compound single crystal solar cell which concerns on Example 1 of this invention. 本発明の実施例1において製造した化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell manufactured in Example 1 of this invention. 本発明の実施例1において導電膜を積層した構造を有する化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell which has the structure which laminated | stacked the electrically conductive film in Example 1 of this invention. 本発明の実施例1においてトンネル接合を第一半導体積層体内に形成した構造の化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell of the structure which formed the tunnel junction in the 1st semiconductor laminated body in Example 1 of this invention. 本発明の実施例2において製造した化合物単結晶太陽電池の概略断面図である。It is a schematic sectional drawing of the compound single crystal solar cell manufactured in Example 2 of this invention. 特許文献1に係る化合物単結晶太陽電池の概略断面図である。1 is a schematic cross-sectional view of a compound single crystal solar cell according to Patent Document 1. FIG. 特許文献1に係る化合物単結晶太陽電池の概略断面図である。1 is a schematic cross-sectional view of a compound single crystal solar cell according to Patent Document 1. FIG.

符号の説明Explanation of symbols

101 第一半導体積層体
101a 第一半導体積層体の上面
101b 第一半導体積層体の下面
102 キャップ層
102a キャップ層の上面
103 第一電極
104 第一半導体層
104a 第一半導体層の露出面
105 第二電極
106 第二半導体積層体
106b 第二半導体積層体の下面
107 導電膜
401 単結晶半導体基板
404 第一半導体積層体の最下層
DESCRIPTION OF SYMBOLS 101 1st semiconductor laminated body 101a Upper surface of 1st semiconductor laminated body 101b Lower surface of 1st semiconductor laminated body 102 Cap layer 102a Upper surface of cap layer 103 1st electrode 104 1st semiconductor layer 104a Exposed surface of 1st semiconductor layer 105 2nd Electrode 106 Second semiconductor stacked body 106b Lower surface of second semiconductor stacked body 107 Conductive film 401 Single crystal semiconductor substrate 404 Lowermost layer of first semiconductor stacked body

Claims (11)

光電変換層を含み上面が第一導電型である第一半導体積層体と、
第一半導体積層体の上面に形成されたキャップ層と、
キャップ層の上面に形成された第一の極性を有する第一電極と、
前記第一半導体積層体の下面に形成されその一部が前記上面側に露出した露出面を有する第一導電型の第一半導体層と、
前記露出面に形成された第二の極性を有する第二電極と、
を備え、前記光電変換層の最下部層と前記第一半導体層の間に位置する層の界面の一つは、トンネル接合により電気的に接合されており、
前記第一半導体および前記キャップ層は、n型GaAsからなり、
前記第一電極および前記第二電極は、同一材料から形成される化合物単結晶太陽電池。
A first semiconductor laminate including a photoelectric conversion layer and having an upper surface of the first conductivity type;
A cap layer formed on the upper surface of the first semiconductor laminate;
A first electrode having a first polarity formed on the upper surface of the cap layer;
A first semiconductor layer of a first conductivity type formed on the lower surface of the first semiconductor laminate and having an exposed surface, a part of which is exposed on the upper surface side;
A second electrode having a second polarity formed on the exposed surface;
One of the interfaces of the layers located between the lowermost layer of the photoelectric conversion layer and the first semiconductor layer is electrically joined by a tunnel junction,
Said first semiconductor layer and the cap layer, Ri n-type GaAs Tona,
The first electrode and the second electrode are compound single crystal solar cells formed of the same material .
前記トンネル接合は、前記第一半導体積層体と前記第一半導体層の界面に形成されていることを特徴とする請求項1に記載の化合物単結晶太陽電池。   2. The compound single crystal solar cell according to claim 1, wherein the tunnel junction is formed at an interface between the first semiconductor stacked body and the first semiconductor layer. 前記第一半導体積層体の上面を構成する層と前記第一半導体層の主材料が同じであることを特徴とする請求項1または2の何れか1項に記載の化合物単結晶太陽電池。   3. The compound single crystal solar cell according to claim 1, wherein the main material of the first semiconductor layer and the layer constituting the upper surface of the first semiconductor stacked body are the same. 前記第一半導体層の下面には第一導電型を有する単結晶半導体からなる第二半導体積層体が形成されていることを特徴とする請求項1から3の何れか1項に記載の化合物単結晶太陽電池。   4. The compound unit according to claim 1, wherein a second semiconductor stacked body made of a single crystal semiconductor having a first conductivity type is formed on a lower surface of the first semiconductor layer. 5. Crystal solar cell. 前記第二半導体積層体は単結晶半導体基板を含んでいることを特徴とする請求項4に記載の化合物単結晶太陽電池。   The compound single crystal solar cell according to claim 4, wherein the second semiconductor stacked body includes a single crystal semiconductor substrate. 前記第二半導体積層体の下面には導電膜が形成されていることを特徴とする請求項4または5の何れか1項に記載の化合物単結晶太陽電池。   6. The compound single crystal solar cell according to claim 4, wherein a conductive film is formed on a lower surface of the second semiconductor stacked body. 前記導電膜は透明導電材料からなることを特徴とする請求項6に記載の化合物単結晶太
陽電池。
The compound single crystal solar cell according to claim 6, wherein the conductive film is made of a transparent conductive material.
前記導電膜は金属膜を含むことを特徴とする請求項6に記載の化合物単結晶太陽電池。   The compound single crystal solar cell according to claim 6, wherein the conductive film includes a metal film. 単結晶半導体基板の上面に1層以上の半導体層からなる第二半導体積層体を形成する工程と、
前記第二半導体積層体の上面に第一導電型の第一半導体層を形成する工程と、
前記第一半導体層の上面に光電変換層を含み上面側が第一導電型である第一半導体積層体を形成する工程と、
第一半導体積層体の一部をエッチング除去することにより前記第一半導体層の上面の一部を露出させた露出面を形成する工程と、
前記第一半導体積層体の上面に第一導電型のキャップ層を形成する工程と、
前記キャップ層の上面に第一の極性を有する第一電極、前記第一半導体層の露出面に第二の極性を有する第二電極を同時に形成する工程と、を含み、
前記第一半導体層および前記キャップ層は、n型GaAsからなり、
前記第一電極および前記第二電極は、同一材料から形成され、かつ同一方向から形成される、化合物単結晶太陽電池の製造方法。
Forming a second semiconductor laminate composed of one or more semiconductor layers on the upper surface of the single crystal semiconductor substrate;
Forming a first semiconductor layer of a first conductivity type on the upper surface of the second semiconductor laminate;
Forming a first semiconductor stacked body including a photoelectric conversion layer on an upper surface of the first semiconductor layer and having an upper surface side of the first conductivity type;
Forming an exposed surface that exposes a portion of the upper surface of the first semiconductor layer by etching away a portion of the first semiconductor stack; and
Forming a first conductivity type cap layer on the upper surface of the first semiconductor laminate;
Simultaneously forming a first electrode having a first polarity on an upper surface of the cap layer, and a second electrode having a second polarity on an exposed surface of the first semiconductor layer,
Said first semiconductor layer and the cap layer, Ri n-type GaAs Tona,
The method for producing a compound single crystal solar cell, wherein the first electrode and the second electrode are formed of the same material and are formed from the same direction .
前記第一半導体層は前記単結晶半導体基板と格子整合することを特徴とする請求項に記載の化合物単結晶太陽電池の製造方法。 The method of manufacturing a compound single crystal solar cell according to claim 9 , wherein the first semiconductor layer is lattice-matched with the single crystal semiconductor substrate. 前記単結晶半導体基板を除去する工程を含むことを特徴とする請求項または10の何れか1項に記載の化合物単結晶太陽電池の製造方法。 Compound single crystal solar method of manufacturing a battery according to any one of claims 9 or 10, characterized in that it comprises a step of removing the single crystal semiconductor substrate.
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