JPS5994919A - Signal processor - Google Patents

Abstract

PURPOSE:To simplify the constitution and to attain high accuracy by utilizing a quadratic function obtained by two integrators and inverting a signal digitized by a nonlinear A/D converter into an analog signal. CONSTITUTION:Suppose that a counter 13 is a counter counting bits up to m(m-2<n>)-bit decided by the bit number (n) of an inputted digital signal, then the counter 13 loads a digital data D from an input terminal 12 at a time T1, the D is counted up to (m) in synchronizing with a clock pulse from a clock generating circuit 14 to output a pulse. An integrating gate switch 2 is turned on by a signal from a control circuit 11 at a time T2, an output of a reference constant voltage generator 1 is integrated by an integrator 5, and applied to an integrator 18. Then, the output of the integrator 18 is increased in the form of a quadratic function from a voltage 0V at the time T2, and stored in a sample holding circuit 9 by a counter load pulse loading the digital data at the time T2.

Description

[Detailed description of the invention] Industrial application field The present invention converts a digital signal into an analog signal 2.
.

The present invention relates to a signal processing device for processing signals.

Conventional configuration and its problems In general, a mu/D converter as a signal processing device is used to convert an analog signal into an all-digital signal, but when converting an analog signal to a digital signal, the resolution depends on the number of conversion bits. If the full scale is assumed to be 1, then its expression capability V is v-/2n, which is independent of the magnitude of the analog input signal, and is suitable for converting analog signals with a wide dynamic range into digital signals. requires a large number of pits. In order to express an analog signal with a wide dynamic range using a digital signal with a small number of bits, it is necessary to change the expression capability vf according to the level of the analog signal.

For this reason, attempts have been made to improve the expressive ability using non-linear MU/D converters, but attempts have been made to convert the digital signals obtained with these non-linear MU/D converters into analog signals. In this case, in order to use a D/M converter that applies a normal resistor array, it is necessary to have a function for the three resistance values that make up the resistor array, and a relationship that requires the accuracy of the resistor itself. There was a problem that it became difficult to configure the resistor array accurately.

OBJECTS OF THE INVENTION An object of the present invention is to provide a signal processing device that can accurately convert signals digitized by a nonlinear A/D converter into analog signals with a simple configuration.

Configuration of the Invention The signal processing device of the present invention is configured to inversely convert a signal digitized by a nonlinear A/D converter into an analog signal by using a quadratic function obtained by a first g second integrator. This is what I did.

DESCRIPTION OF EMBODIMENTS FIG. 1 shows an embodiment of the signal processing device of the present invention. In FIG. 1, a 1Vi reference constant voltage generator, a 2Vi integral gate switch, 16 a second integrator, and 18 a 1 is a first integrator, 9 is a sample hold circuit, 1o is an analog signal output terminal, 11 is a control circuit, 12 is a digital signal input terminal, 13 is a color/receiver, and 14 is a clock generation circuit, which converts the digital signal into an analog signal. Convert to D/
It constitutes the A converter.

Here, the first integrator 18 is composed of an operational amplifier 8 whose non-inverting input is grounded, a resistor 6 which is connected to the inverting input of the operational amplifier 80, and a capacitor 7 inserted between the inverting input and the output of the operational amplifier 80. ing. The second integrator 15 is composed of an operational amplifier 6 whose non-inverting input is grounded, a resistor 3 connected to the inverting input of the operational amplifier 6, and a capacitor 4 inserted between the inverting input and the output of the operational amplifier 60. .

FIG. 2 shows the operation timing and operation waveforms of the above-mentioned D/A converter. Conversion starts at time T1 and ends at time T3.

In such a configuration, the counter 13 is now m (m=2'') determined by the number of bits n of the input digital signal.
), the counter 13 loads the digital data D from the digital signal input terminal 12 at time T1, and in synchronization with the clock pulse from the clock generation circuit 14, the counter 13 loads the digital data D from D to m in synchronization with the clock pulse from the clock generation circuit 14. Power .

runt and output a pulse. Assuming that the output pulse is output from the counter 13 at a timing iT2, at time T2, the integration gate switch 2 is turned ON by a signal from the control circuit 11, and the output of the reference constant voltage generator 1 is output by the second integrator 16. It is integrated and applied to the first integrator 18. As a result, the output of the first integrator 18 increases with a quadratic function from the voltage o (V) at time T2, and the digital data at time T5 is transferred to the counter 13.
The counter load pulse loaded into the sample and hold circuit 9 samples and holds the signal, and the integration gate switch 2 is turned off.

From this, it can be seen that the analog signal obtained at the analog signal output terminal 1o is proportional to the square of the digital input signal.

In the above embodiment, it goes without saying that the reference constant voltage generator 16 may be used as a reference constant current generator and the resistor 3, which is a component of the second integrator 16, may be removed.

Effects of the Invention As described in detail above, according to the present invention, since the nonlinear D/M converter is configured using the quadratic function of the first and second integrators, the full amplitude of the analog input signal can be By generating digital data square-rooted with a scale of 1, a digital signal obtained by a non-linear MU/D converter with improved resolution can be converted into an analog signal with a simple configuration.

Also, 1st. Since the quadratic function by the second integrator requires only relative precision, the precision of the resistor itself, which is a constituent element, is not required to be very precise, which has the advantage of being easy to construct.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the signal processing device of the present invention, and FIG. 2 is an operation timing chart of each part thereof. 7 Baget...Reference constant voltage generator, 2...Integrator gate switch, 16...Second integrator, 18.
...First integrator, 9...Sample hold circuit, 10...Analog signal output terminal, 1
1... Control circuit, 12... Digital signal input terminal, 13... Counter, 14
・・・・・・Clock generation circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (1)

[Claims] A reference voltage or reference constant current generator, a first integrator that receives this reference constant voltage or reference constant current as input, a control circuit that controls the operation timing of the entire device, a clock pulse generator, and a nonlinear pulse generator. /Color input with digital signal digitized by D converter/
The circuit is configured to convert a digital signal into an analog signal, and also includes a second integrator that integrates the voltage or current of a reference constant voltage or reference constant current generator for this digital-to-analog conversion. and a signal processing device configured to turn on and off the input voltage or input current of the second integrator.