JPS5987371A - Detector for power failure - Google Patents

Abstract

PURPOSE:To eliminate malfunction due to noise and momentary power failure, by setting a variable resistor to set an optional power failure detection time without the influence of the voltage variance of an AC input while the output of a regulator is normal after power failure by a simple CR charging circuit. CONSTITUTION:In the normal state, a transistor TR 5 is turned off only for a short time near the zero-crossing point of an input power source 1 to charge a capacitor C4, but the TR 5 is turned off immediately to discharge the electric charge of the capacitor C4. If a short-time power failure occurs, the TR 5 is turned off to charge the capacitor C4, but the capacitor C4 is discharged before a comparator 4 reaches a reference voltage V4 for power failure detection signal, and the power failure detection signalis not generated. If a long- time power failure occurs, an output V3 of a regulator 3 generates a certain DC voltage till a certain time because of capacitors C1 and and C2. After passing this time, the comparator 4 is charged by the capacitor C4, and the comparator 4 generates the power failure detection signal at the time when it exceeds the reference voltage V4. As the result, power failures are not detected to continue the normal operation when the momentary power failure occurs frequently.

Description

[Detailed Description of the Invention] [Technology of the Invention] The present invention provides a power outage detection device that is capable of predetermining a power outage detection time and that does not allow the power outage detection time to be affected by fluctuations in AC input power. Regarding.

[Technical background of the invention and its problems]

Generally, when there is a power outage in the AC power supply, there are cases where it is desired to store data in a battery-backed memory element in order to maintain the state before the power outage or to ensure smooth operation after the power outage is restored. A constant DC voltage EE is obtained as a control power source by the relay 5V, and the constant DC voltage is stored in the smoothing capacitor, and even after a power outage, the regulator connects the constant voltage for a short time. Even after this power outage, it is necessary to accurately detect the power outage while the regulator is operating normally, and to quickly carry out the necessary operations after the power outage is detected, which requires a power outage detection signal.

FIG. 1 shows a conventional power failure detection device. In the figure, the output of an AC input power source I is smoothed by a full-wave rectifier bridge 2 and a capacitor CI, and a constant DC voltage is obtained via a regulator 3 to create a control power source. Also,
The output voltage rectified by the full-wave rectifier bridge 2 and diodes DI and D2 is divided into resistors R1 and R2 (-1, and a capacitor C3 is connected in parallel with this resistor R2. The voltage of this capacitor C3 is connected to the comparator 4. input to the negative side input terminal.On the other hand, from the regulator 3 output, resistors R3 and R
The voltage obtained by dividing the voltage at step 4 is also input to the positive input terminal as a reference voltage. Furthermore, the power source for the comparator 4 is taken from a common control power source. Further, a capacitor C2-f is inserted on the output side of the regulator 4 in order to further improve smoothing of the constant DC voltage.

FIG. 2 shows the voltage waveforms of each part in FIG. 1, and A in the drawing shows the regulator 30 input voltage EEvl.
and output voltage v2.

For the regulator 3 to operate normally, (VI V2)≧V, where the lowest voltage of the input/output voltage difference is VD.

Must. In addition, B in the same figure shows the voltage Vs k of the power failure detection capacitor C3, which is V3 (1(
) shows a case where the AC input power supply 1 is at a high voltage value while operating normally, while V3 (L) shows a case where it is also at a low voltage value. ■3 repeats charging and discharging at R2°R2, C3, and becomes as shown in B.

Electric EV 4 connects the regulator 3 output to resistors R3 and R4.
Divide the voltage by using the reference voltage. If the AC input power source I is normal, the voltage v8 is higher than the reference voltage ■4, so the power failure detection signals C and D are zero. Now, if the AC input power supply 1 has a power outage at the time of to, the output of the regulator 3 obtains a normal output voltage up to tl. The voltage FEv3 is V3 (t') when the AC input power supply 1 is low, so the converter 4
The time it takes to detect a power outage compared with the reference voltage EE V 4 is tL. On the other hand, when the AC input power source 1 is high, it is V3 (I()), so the time to detect a power outage is tll.

In other words, it is clear that tH > tL, and the power failure detection time is affected by fluctuations in the AC input power supply l, so the power failure detection time is not constant, and as a result, short-term instantaneous power failures are ignored and operation continues. This causes inconvenience when you want to continue the process or, conversely, when you want to detect a power outage early and stop the machine. Also, if you want to change the power failure detection time, use voltage dividing resistors R3 and 'Ft4.
resistance value must be changed.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and its purpose is to make the power failure detection time constant without being affected by fluctuations in the AC input power supply, and to make it possible to easily change the power failure detection time. The object of the present invention is to provide a power failure detection device.

[Summary of the invention]

In order to achieve the above object, the present invention connects the output terminal of a full-wave rectifier circuit that rectifies the output of an AC input power source to the input terminal of a regulator that obtains DC = constant current EE1c via a smoothing circuit of diodes and capacitors. and a resistor connected in series between the pace and emitter of the transistor via a resistor, and the collector of the transistor is connected to a connection point of a CR charging circuit consisting of a resistor and a capacitor connected to the output terminal of the regulator, and this connection The output terminal of the regulator is connected to the positive input terminal of a comparator whose power source is the output of the regulator, and the output terminal of the regulator is connected to the negative input terminal of the comparator.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention shown in all the drawings will be described.

FIG. 3 shows an example of the configuration of a power failure detection device according to the present invention, and the same parts as in FIG. 1 are denoted by the same reference numerals. In the figure, the output of AC input power supply 1 is converted to full-wave rectifier bridge 2.
One side is rectified by diode D3 and capacitor CI
The smoothed signal is then input to the regulator 30 input terminal.

The other side connects the rectified output terminal of the full-wave rectifying bridge 2 to the base of the transistor 5 via a resistor R5. The output terminal of the regulator 3 is connected to the collector of this transistor 5 via a resistor R6, and a capacitor C4 is connected in parallel with the collector emitter of this transistor 5, so that the charging voltage of the capacitor C4 is・Input to Masatsukuda 1 terminal of regulator 4. In addition, the output of the regulator 3 is connected to the negative terminal of the comparator 4 by a variable resistor V.
A divided voltage is applied at R.

Note that, as in the conventional case, the comparator power supply v is taken from the output of the regulator 3.

Next, the operation of such a device will be described. FIG. 4 shows the state of voltage at each part in FIG. 3, and A in the figure is the rectifier chamber E V o of the AC input power source I. vo is smooth, but the regulator V-3 manual power vl is smoothed by diode D3 and capacitor CI, as shown in B in the same figure. In addition, C in the same figure shows the charging voltage EE'fd: of the capacitor C4. Under normal conditions, the transistor 50 becomes zero and turns off only for a short time near the zero cross point of the AC input power supply 1 output, so the resistor R6 is charged via C4, but soon the pace becomes positive and turns on, capacitor C4
The charge of is discharged. Therefore, normally the transistor 5 is almost always on, and the voltage V3 is approximately zero.

Now, if there is a short power outage at time 12 as shown in A in Figure 4, the transistor 5 will be turned off at that moment and the capacitor c4 will be charged, but the comparator V~ri4 will not output the power outage detection signal. Since the voltage is discharged again before reaching the reference voltage V4, a power failure detection signal is not generated, and fluctuations in Vl are small and do not affect the regulator 3.

Furthermore, even if a long power outage occurs at the time of t, the regulator 3 output v2 is maintained at t by the capacitors CZ and C2.
Generates a normal constant DC voltage up to l. On the other hand, since the transistor 5 is turned off at the time to, the capacitor C4 is turned off at the time t. The comparator 4 starts charging from this point on, and at a time tA when the voltage exceeds the reference voltage V4, the comparator 4 generates a power failure detection signal.

In the device configured as described above, the presence or absence of the AC input power source I is detected by switching the transistor 5, and a power outage is detected almost unaffected by voltage fluctuations of the AC input power source I. On the other hand, the power failure detection time tA is determined by the output chamber 8EV 2 of the regulator 3, R6, C4, and V4, and is determined by the following relational expression.

A V4 =V2 (1-e g6c4) Therefore, by arbitrarily changing the reference voltage v4 using the variable resistor VR, the power failure detection time tA can be changed. The ability to arbitrarily change this power outage detection time tA means that even if the power supply condition is bad and fine noise is mixed into the input power supply I, or there are many momentary power outages, normal operation will continue without detecting a power outage. This can be an advantage.

In addition, in the above equation, V4 is fixed, that is, variable resistor VR
The same implementation can be achieved by using a fixed resistor instead of O and replacing it with R6fq variable resistor. Also, resistance R6, voltage v
4 may be fixed and capacitor C4f may be variable. Furthermore, even if the AC input power source 1 is DC, the present invention can be applied without any modification.

〔Effect of the invention〕

As explained above, according to the present invention, even after a power outage, even after a power outage, as long as the regulator output is normal, the simple 9-CR charging circuit according to the present invention is not affected by the power EE fluctuations of the tributary input power supply, and the voltage is maintained by the setting of the variable resistor. It is possible to set a specific power outage detection time, thereby providing a stable and extremely reliable power outage detection device that does not malfunction even in response to noise or instantaneous power outage within the set time.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing a conventional power failure detection device h-, Fig. 2 is a diagram for explaining the operation in Fig. 1, Fig. 3 is a circuit diagram showing an embodiment of the present invention, and Fig. 4 3 is a diagram explaining the operation in FIG. 3. FIG. 1... AC input power supply, 2... Full wave rectifier bridge, 3
...Regulator, 4...Comparator, 5...
Transistor, D? , D2. D3...Diode, R
1-R6...Fixed resistance, CI~C4...Capacitor, VR...Variable resistor. Applicant's agent Patent attorney Takehiko Suzue 10- Figure 3 Figure 4

Claims (1)

[Claims] The output terminal of a full-wave rectifier circuit that rectifies the output of an AC input power source is connected to the input terminal of a regulator that obtains a constant DC voltage through a smoothing circuit of diodes and capacitors, and is also connected between the pace and emitter of the transistor through a resistor. They are connected in series, and the collector of the transistor is connected to a connection point of a CR charging circuit consisting of a resistor and a capacitor connected to the output terminal of the regulator, and this connection point is connected to the positive terminal of a connector whose power source is the regulator output. A power outage detection device characterized in that the output terminal of the regulator is connected to the negative input terminal of the comparator.