JPS5986979A - Video signal reproducing circuit - Google Patents

Abstract

PURPOSE:To obtain a complete interlace reproducing output by inputting an output of a 1/2 frequency dividing circuit and an equivalent pulse sampling output to an AND circuit, and switching a reproducing video signal and a 0.5H delay output using its output as a switching control input. CONSTITUTION:A monostable multivibrator 4 which is triggered by the fall of a vertical synchronizing pulse (f) and is set so that the end point of its metastable period coincides with the fall of a write gate pulse derives a switching pulse (g). A frequency dividing circuit 5 frequency-divides the fall of the switching pulse (g) to 1/2. The onostable multivibrators 6, 7 which use the fall of the switching pulse (g) as a trigger input device an equivalent pulse sampling output (h) to obtain a high level in an equivalent pulse section, and input it to an inverter 9. The output of the 1/2 frequency dividing circuit 5 and the output of the inverter 9 are inputted to the AND circuit. Subsequently, by an output (i) of the AND circuit 8, a switch 11a is controlled, and by an inverted output of its output, a switch 11b is controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video signal reproducing circuit that is effective when employed in a magnetic recording and reproducing device that records video signals field by field on a rotating recording medium that rotates at a field period.

A magnetic sheet recorder that records one field's worth of video signals on a magnetic sheet that rotates with a field period usually records exactly 9 nH (where n is an integer and H is the horizontal synchronization period) of video signals per revolution. 9. The same video signal is repeatedly derived during playback.

However, the reproduced screen obtained by such a recording/reproducing method is naturally not interlaced, and the deterioration of the reproduced screen is significant. Despite the deterioration on both sides of the playback, the reason for adopting the recording and playback method described above is that one field of the video signal is a fraction of 0.5H (NTS (262 in the case of 3)).
．． 5 H), if exactly one feed ρ is recorded in one rotation, the horizontal synchronization period will be discontinuous for each rotation at the seam, and in order to eliminate this discontinuity, This is because even if the horizontal synchronization period is made continuous using a switching means incorporating a 0°5H delay means, an interlaced output cannot be obtained.

Therefore, in view of the above-mentioned points, the present invention is based on 9 times exactly 1 per rotation.
The video signal for one field is recorded, and the reproduced video signal is delayed by 0.5H after one field, while the insertion period of the equivalent pulse section including the vertical synchronization signal is kept constant to obtain a complete interlaced reproduction output. This paper specifically proposes a new and effective video signal reproducing circuit that achieves the desired results.

The present invention will be described below according to an illustrative embodiment.

FIG. 1 is a waveform explanatory diagram of an embodiment of the present invention. First, waveform a represents the end of an even field and the vertical retrace interval, and waveform a represents the end of the odd field and the vertical retrace interval, and in this example, these waveforms are finally derived alternately. It is configured so that The video signal for recording is separated by a write gate for exactly one field including the last part of the even field, and the waveforms of the write gate pulses are derived as shown in b and b.

Therefore, the reproduced output waveform obtained by reproduction is as shown in C, and the horizontal synchronization period is discontinuous by 5H at the seam portion (C1). The circuit shown in FIG. 2 converts this reproduced output waveform into an interlaced reproduced output. The present embodiment will be described below with reference to the waveform diagram in FIG. 1 and the circuit block diagram in FIG. 2.

First, the playback output (C1 is the output of the synchronization separation circuit (1) that separates the horizontal synchronization signal is input to the integration circuit (2) and waveform shaping circuit (3) that make up the vertical synchronization separation circuit, and then the integral output is output. The period in which (e) exceeds a predetermined level is defined as a vertical synchronizing pulse (f).It is triggered by the fall of this vertical synchronizing pulse (f), and the end point of the metastable period is the falling edge of 1-inclusive Goodopa 1v7-. The first monomulti (4), which is set to coincide with , whose frequency-divided output is used as one input of the AND circuit (8), and the two-stage second and third mono multi +61 +71 which uses the falling edge of this switching PALNU (g) as a trigger input are equivalent pulse sampling circuits. The equivalent pulse sampling output (h) which becomes high level in the equivalent pulse section is derived and is input to the AND circuit (8) via the inverter (9).Therefore, the AND output (i) and (1) has a high level p in the even field interval excluding the equivalent pulse interval (more precisely, the interval including the end of the odd field and excluding the end of the even field).This AND output (i) and (1
) is configured to derive a 0.5H delayed playback output when it is a high-repeat μ, and to derive a non-delayed playback output when it is a low-repeat μ, the switching output is converted to a complete interlaced playback output δ Therefore, in this embodiment, a delay path including a ζHM extension circuit (lO) that delays the reproduced output by 0°5H and a non-delay path that allows the reproduced output to pass through as is are formed, and the non-delayed output (C) and the delayed output ( 1) is input to the switching circuit (11). Switching circuit (
The first analog switch (111) constituting the AND output is controlled by one person, and the second analog switch (111) is configured to output the AND output by the second inverter (+2
The inverted output that is inverted at + is used as the control input. Therefore, the switching circuit (lI) alternately selects the delayed output and the non-delayed output to produce a complete interlaced output (A
) and (4 are supplied to the TV receiver θ3). Note that some of the symbols in Fig. 1 are with a dash and some are not, but the derived output waveforms are the output waveforms with and without a dash. are derived alternately.

Therefore, according to the present invention, when reproducing field-recorded concentric tracks, it is possible to obtain a complete interlaced reproduction output, and the resolution of the reproduction screen is apparently improved, which is highly effective.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of waveforms according to an embodiment of the present invention, and FIG. 2 is a block diagram of the same circuit. Explanation of main drawing numbers

Claims (1)

[Claims] (1) In a magnetic recording and reproducing device that records video signals for one field' on a recording medium that rotates at one field cycle in a four-way L-circle so that the recording start and end coincide with each other. a 1-frequency divider circuit that inverts the output level in a field period in synchronization with the playback timing at the start and end of recording, an equivalent pulse extraction port path that generates an equivalent pulse extraction output from the reproduced video signal, and the 1-minute direction circuit. An AND circuit whose output is the output and the equivalent pulse sampling output is used as an input, and the output of the AND circuit is used as a switching control input to select the reproduced video signal and the 0.5H delayed output of the vintage video signal (6) to derive an interlaced reproduction output. A video signal reproducing circuit consisting of a switching circuit and a switching circuit.