JPS5986326A - Oscillating circuit - Google Patents

Abstract

PURPOSE:To obtain a signal having a frequency of about several hundred Hz and to adjust the oscillating frequency by connecting a control MOS transistor (TR) to a source of the MOSTR constituting a ring oscillator. CONSTITUTION:Control P channels 311, 312, 313 are connected between a source and a power terminal of inverter groups 1, 2, 3 constituting a ring oscillator, and control N channels 321, 322, 323 are connected between the drain and the power terminal. Control voltages 51, 52 are applied to gates 331, 332, 333, 341, 342, 343 of each channel TR. In changing the control voltages 51, 52, the leading and trailing time of an output voltage of the inverter groups constituting the ring oscillator are controlled and the duty ratio of an oscillating signal is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an oscillation circuit that can be integrated into a monolithic MOS integrated circuit and whose frequency and Dachy ratio are variable.

The basic configuration of a ring oscillator is as shown in Figure 1, in which the inputs and outputs of an odd number of inverters are
Generally, the output of the final inverter 6 is connected to the input of the first inverter 1. The oscillation frequency f at this time is expressed as /=(2-n-td)-1 (Hz) (1), assuming that each inverter has the same signal delay time td. Here, pan n is the number of inverters making up the ring oscillator. Since the signal delay time td of an inverter realized by an integrated circuit is generally several tens of seconds + 1 second, if n = 11 and ta = 50 + 1 seconds, the oscillation frequency f will be about 900 KHz. In order to lower the oscillation frequency, MO
S) It has been considered to reduce the current drive capability of the transistors, or to add a resistor 4 or capacitor 5 to the output of each inverter to delay the output signal of each inverter, as shown in Figure 2. Both of these methods have the disadvantage that they occupy an increased area within an integrated circuit chip, and furthermore, the oscillation frequency cannot be easily adjusted.

The present invention eliminates these drawbacks and occupies only a small amount of space.
The present invention provides an oscillation circuit that can generate frequencies as low as several hundred Hz and whose oscillation frequency can be easily adjusted.

The present invention will be described in detail below with reference to the drawings.

FIG. 3 is a circuit of the present invention. This is a group of odd numbered inverters 1.2. which constitute a ring oscillator. Control P channels 311, 312, 313 and N channel 341 whose sources are connected to the power supply 36, respectively, are connected to the power supply terminals of β.
．． The drains of both MO8) transistors 342 and 345 are connected to each gate terminal 331, 332', 333 of the control blue channel MOs transistor group and each gate terminal 641, 342.
This circuit has a configuration in which a control voltage, which will be described later, is applied to each of 343 and 343.

Next, an example of a circuit for realizing an oscillation circuit using the circuit shown in Fig. f4''S3 will be explained using Figs. 4 and 5. The numbers used in Fig. 3 are also used in Figs. 4 and 5. and represent the same thing.

Terminal 331, 332, 333, 341.34'2゜34
3 is connected to a control power source 41, respectively. Now, assuming that the low potential side of the power supply 33 is O■, the high potential side is DD, and the low potential side of the controllable source 41 is Voe, the channel resistance RON of the control transistor 311 in FIG.
Assuming that the control transistor 311 operates in the non-saturation region, RoN=(β(V aa −V tp −÷V Ds)
tlβ: capability coefficient V DEI: source-drain voltage V, tp: strain hold voltage. This means that a resistor RON is added between the power supply terminal of the inverter 1 and the power supply, and the current drive capacity of the inverter 1 is equivalently equal to the output voltage of the control power supply 41
It will be controlled by the OS. The same principle applies to other control transistor groups and inverter groups,
The output voltage of the control power supply 41 determines the ring-on rate? +”/m t The current drive capability of a group of Luginverters can be controlled, the oscillation frequency can be made variable, and the
It is also possible to oscillate at a sufficiently low frequency of about z.

Figure 5 shows the P channel and N channel of the control MO3) transistor group.
This configuration applies control voltages from control power supplies 51 and 52 to both channel transistors separately, and in addition to the advantages of the circuit shown in Figure 4, the rise and fall times of the output voltages of the group of inverters that make up the ring oscillator can be controlled individually. This is an example of a circuit having the characteristic that it is possible to control the oscillation signal and therefore to make the duty ratio of the oscillation signal variable.

Furthermore, FIG. 6 shows a circuit in which separate control voltages are applied to the gates of each of the control MO'S transistor groups, and the control power supply? S1. ? S2, 63°64.65
．． By appropriately setting the voltage value of each of 66,
This is an example of a circuit that can obtain a signal having an odd duty ratio at any oscillation frequency all the time. Of course the 6th
Similar to FIGS. 4 and 5, the figures use the same numbers as in FIG. 3 and indicate the same parts as in FIG. 6.

As explained above, according to the present invention, a signal of approximately several hundred Hz can be easily obtained with a small occupied area. Furthermore, the oscillation frequency can be adjusted and the duty ratio can also be made variable. Furthermore, signals having different duty ratios can be obtained simultaneously, and the present invention can be used in a wide variety of fields.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a general ring oscillator, Fig. 2 is a circuit diagram of a ring on lator in which resistance and capacitance are added to the output to reduce the oscillation frequency, Fig. 3 is a circuit diagram of the present invention, FIG. 4 is a circuit diagram of an embodiment of the invention, FIG. 5 is a circuit diagram of an embodiment of the invention, and FIG. 6 is a circuit diagram of an embodiment of the invention. 1 to 3... A group of inverters constituting a ring oscillator 4... Resistor 5... Capacity 30... Circuit network of the present invention 31... Power supply line 32... Power line 33... tli311~
313... Control P channel MO8) Transistor group 621-326... Control N channel M, OS)
Group of transistors 331-333...P-channel MO for control 8) Gate terminal group of transistors 341-643...Gate terminal group of N-channel Mos transistor for control 34...Output terminal 41...Control power supply 51...・Control power supply 52... Control power supply 61 to 66... Control power supply and above 1st [) Multi I52'';, 'S B 12 Fig. 4 M''i, 5 Fig. 6

Claims (1)

[Claims] In a monolithic MOS integrated circuit, the drain of a control MOS transistor whose source terminal is connected to a power supply is connected to each source terminal of a group of inverters constituting a ring oscillator, and the gate terminal of the control MO transistor is connected to a control MOS transistor whose source terminal is connected to a power supply. An oscillation circuit characterized in that it is connected to a power source for