JPS5985563A - Disk controller - Google Patents

Abstract

PURPOSE:To minimize the access time to data by searching an internal memory in parallel to an access of a disk and then transferring the data given from the internal memory to a host CPU when the desired data exists. CONSTITUTION:A buffer CPU22 receives a command and then transfers immediately the command to a disk controller 3 to give an access to a disk. While check is carried out concurrently within a disk memory 25 to decide whether or not the desired data exists. As a result, the access delay time can be minimized even in case no data exists in the memory 25. If the desired data exists in the memory 25, the corresponding data is transferred to a host CPU1 from the memory 25. Then an access operation is stopped at the disk side at that time point.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to word processors, office computers,
This invention relates to a disk control device for personal computers, facsimile machines, etc.

[Prior art]

Looking at a conventional disk control device, the data read from the disk is transferred directly to the host), υ transferred to the OPU,
Transferred to CPU (host) via one-stage buffer memory fc
! However, in any case, the disk is accessed for each command, which takes time. It also has a buffer 'Jk with a large storage capacity,
The read data is stored, and when a command comes, it is checked whether the required data already exists in the buffer, and if it exists, the data in the buffer is transferred, but if it does not exist, it is checked. Some were the first to allow disk access. However, in this method, if the data does not exist in the buffer, access to the disk is delayed by the time it takes to check the buffer, which ultimately takes time as a whole.

〔the purpose〕

The present invention has been made in view of the above points, and an object of the present invention is to provide a disk control device that can access data in a minimum amount of time.

〔composition〕

An embodiment of the present invention will be described based on the drawings.

First, Figure 1 is a block diagram showing the basic configuration.
) ha host OPU, (2) is a buffer memory device,
(3) is a disk controller, and (4) is a disk device.

In this system, the host OPU (1) sends commands for disk read/write to the buffer memory device (2) as needed. This buffer memory device M (2) receives and receives commands. Calculate where on the disk to access according to host 0 (for example, host 0
Converts the logical address of the target sector from the PU (1) into a physical address for the disk controller (3) on the disk controller (3), so that it is stored in memory in the entire buffer memory device (2) and simultaneously on the disk controller (3). )
Send to. Then, the disk controller (3) controls the disk device (4) based on this command,
The data is transferred to the buffer memory device (2), host) OP
U (1), or write all data in the host CPU (1) into the disk device (4).

The details of the buffer memory device (2) are then sent to the buffer 0PU (c) through the second host interface (2])'. 0PU for this buffer (a)
operates based on the control memory (c). The command is converted by the buffer CPU (c) into a format suitable for the disk controller (3) and sent to the disk controller (3) via the Dinuk controller interface (c). On the other hand, when reading data, the data read from the disk is transferred to the disk memory (c) through the disk controller (3) and interface (c), and then the host OP
It is sent to the interface @])' (this host through r) to OPU (1) in time with U (1).

At this point, the current data is stored in the disk memory (c) together with its label, ie, the data indicating the location Wk on the disk. Such operations are repeated many times, and more and more data is stored in the disk memory (c).

Therefore, the larger the amount of data, the more likely that when A accesses the disk based on a command from host 0PTJ (1), the required data will be stored in this disk memory (C) separately from the disk. There is a high probability that it is also stored in Therefore, this disk memory (ha)
If the required data already exists in the disk, the data can be read out from the disk device at high speed without the need to access the disk.

Now, when accessing the disk, the sofa CPU (A) receives the command and then checks to see if the target data is in the disk memory (C). Disk controller (3
), when accessing the disk device (4), the access to the disk is delayed by the check time, as shown in the conventional example.

However, when the buffer 0PU (A) according to this embodiment receives a command, it immediately sends the command to the disk controller (3).
) to access the disk, a check is performed in parallel to see if the required data exists in the disk memory (c). Access delay time can be minimized even if there is no access. Then, if the data required for the check exists in the disk memory (c), this disk memory (c)
The data is transferred to the host) OPU (1),
At that point, the access operation on the disk side will be stopped.

〔effect〕

As described above, the present invention provides a means to perform all data searches in the internal memory in parallel with disk access, and to transfer data from the internal memory to the boss OPU when necessary data exists. , data can be accessed in the minimum amount of time.

[Brief explanation of the drawing]

FIGS. 1 and 2 are block diagrams showing one embodiment of the present invention. 1... host), OPU, 3... disk controller, 22... buffer OPU, 25... disk memory (internal memory)

Claims (1)

[Claims] (Host) According to a command from the OPU, data read from the disk is transferred to the host CPU and stored in the internal memory at the same time, and at the time of the next command, the command is transferred to the disk controller and the required data is simultaneously stored in the internal memory. A disk control device characterized by comprising means for checking whether or not the data is stored, and for transferring the data from the internal memory to the host CPU when the data is stored.