JPS5984930U - level shift circuit device - Google Patents
level shift circuit deviceInfo
- Publication number
- JPS5984930U JPS5984930U JP16559183U JP16559183U JPS5984930U JP S5984930 U JPS5984930 U JP S5984930U JP 16559183 U JP16559183 U JP 16559183U JP 16559183 U JP16559183 U JP 16559183U JP S5984930 U JPS5984930 U JP S5984930U
- Authority
- JP
- Japan
- Prior art keywords
- diode
- field effect
- effect transistor
- semiconductor layer
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図Ａは従来例によるレベルシフト回路装置の等価回
路図、同図Ｂは動回路装置の平面パターンの説明−１第
２図Ａは第１菌の回路装置におけるＦＥＴ２のｊ−Ｖ特
性を示すグラフ、同図Ｂは同回路装置におけるダイオー
ドのｌ−Ｖ特性を示したグラ・フ、第３図Ａは本考案の
実施例の等価回路図、同図ＢＣ′よその平面パターンの
説明図、第４図は同実施例におけるダイオードのＩ−Ｖ
特性を示すグラフ、第５図は第３図、Ｂの素子の断面構
造を示す説明図、第６図はレベルシフト回路装置の使用
例を ７示す回路図である。
図中、１は第２の電界効果トランジスタ、２は第１の電
界効果トランジスタ、３はダイオード、１１．１２．１
３は半導体層であや。
−゛ 第５図 −１−
ｏ−５１Ｌ
１
÷４Ｖ −Fig. 1A is an equivalent circuit diagram of a level shift circuit device according to a conventional example, and Fig. 1B is an explanation of a plane pattern of a dynamic circuit device. 3B is a graph showing the l-V characteristics of the diode in the same circuit device, FIG. , FIG. 4 shows the I-V of the diode in the same example.
FIG. 5 is a graph showing the characteristics, FIG. 5 is an explanatory diagram showing the cross-sectional structure of the element of FIG. 3 and B, and FIG. 6 is a circuit diagram showing an example of use of the level shift circuit device. In the figure, 1 is a second field effect transistor, 2 is a first field effect transistor, 3 is a diode, 11.12.1
3 is a semiconductor layer. -゛ Figure 5 -1- o-51L 1 ÷4V -
Claims (1)
レーナ形ダイオードと、これらを負荷抵抗としソースホ
ロアとして働く第２の電界効果トランジスタとからなり
、第２の電界効果トランジスタのゲートに加わる入力電
圧を該ダイオードの電圧降下分だけレベルシフトして該
ダイオードと第１の電界効果トランジスタとの直列接続
点から出力するレベルシフ１回路装置において、該第１
、第２の電界効果トランジスタおよびダイオードが、絶
縁性基板上に成長された半導体層に電極を取付けて構成
され、かつダイオードは半導体層とそれにショットキバ
リヤを作るように取付けられた、電極と、その両側に設
けられて半導体層とはオーム接触しかつ互いに短絡され
た２つの電極とからなり、該ダイオードと第１、第２の
電界効果トランジスタとで該半導体層の厚み形状につい
て実質的に同一であり、該ダイオードの飽和電流値を該
第１の電界効果トランジスタの定電流、値より充分大き
くしたことを特徴とするレベルシフト回路装置。It consists of a first field effect transistor that functions as a constant current source, a planar diode, and a second field effect transistor that uses these as load resistances and functions as a source follower. In a level shifter 1 circuit device that shifts a level by a voltage drop across a diode and outputs the output from a series connection point between the diode and a first field effect transistor, the first
, a second field effect transistor and a diode are constructed with an electrode attached to a semiconductor layer grown on an insulating substrate, and the diode includes an electrode attached to the semiconductor layer to create a Schottky barrier thereto; Two electrodes are provided on both sides and are in ohmic contact with the semiconductor layer and are short-circuited to each other, and the thickness and shape of the semiconductor layer are substantially the same between the diode and the first and second field effect transistors. A level shift circuit device characterized in that the saturation current value of the diode is made sufficiently larger than the constant current value of the first field effect transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16559183U JPS5984930U (en) | 1983-10-26 | 1983-10-26 | level shift circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16559183U JPS5984930U (en) | 1983-10-26 | 1983-10-26 | level shift circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5984930U true JPS5984930U (en) | 1984-06-08 |
| JPH0336111Y2 JPH0336111Y2 (en) | 1991-07-31 |
Family
ID=30362744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16559183U Granted JPS5984930U (en) | 1983-10-26 | 1983-10-26 | level shift circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5984930U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62184516A (en) * | 1986-02-03 | 1987-08-12 | シ−メンス、アクチエンゲゼルシヤフト | Current source |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53118374A (en) * | 1977-03-25 | 1978-10-16 | Nec Corp | Integrated diode device |
-
1983
- 1983-10-26 JP JP16559183U patent/JPS5984930U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53118374A (en) * | 1977-03-25 | 1978-10-16 | Nec Corp | Integrated diode device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62184516A (en) * | 1986-02-03 | 1987-08-12 | シ−メンス、アクチエンゲゼルシヤフト | Current source |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0336111Y2 (en) | 1991-07-31 |
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