JPS5982749A - Selective oxidation of semiconductor - Google Patents

Selective oxidation of semiconductor

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Publication number
JPS5982749A
JPS5982749A JP19379282A JP19379282A JPS5982749A JP S5982749 A JPS5982749 A JP S5982749A JP 19379282 A JP19379282 A JP 19379282A JP 19379282 A JP19379282 A JP 19379282A JP S5982749 A JPS5982749 A JP S5982749A
Authority
JP
Japan
Prior art keywords
film
oxide film
films
silicon
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19379282A
Other languages
Japanese (ja)
Inventor
Yoshiharu Nakao
中尾 「よし」治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19379282A priority Critical patent/JPS5982749A/en
Publication of JPS5982749A publication Critical patent/JPS5982749A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To shorten length of the slant part of an oxide film, and to contrive to enhance the degree of integration of an element by a method wherein an insulating film not to be etched by an oxide film etching agent is formed by selfalignment with the oxide film on the surface of the oxide film thereof. CONSTITUTION:Underlay oxide films 2, nitride films 3 and oxide films 7 of thick film thickness to be used as space films for lifting off are formed selectively in order on the parts other than the part to be formed with an oxide film of the main surface part of a silicon substrate 1. Then a heat treatment is performed using the nitride films 3 as masks to form a thick oxide film 4 on the exposing main surface part of the substrate 1. Then nitride films 8 are formed on the whole upper surfaces of the oxide film 4 and the oxide films 7, and moreover polycrystalline silicon films 9 are formed on the surfaces of the nitride films 8. Then by lifting off the oxide films 7, the parts other than the part on the surface of the oxide film 4 of the nitride films 8 and the polycrystalline silicon films 9 are removed together with the oxide films 7. The nitride films 3 are removed protecting the nitride film 8 with the polycrystalline silicon film 9, then the polycrystalline silicon film 9 is removed, and the underlay oxide films 2 are removed finally to leave the nitride film 8 on the surface of the oxide film 4.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は半導体集積回路装置(:tC)などの製造方
法における選択酸化方法の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in a selective oxidation method in a manufacturing method for semiconductor integrated circuit devices (:tC) and the like.

〔従来技術〕[Prior art]

以下、シリコン基板の主面部に酸化シリコン膜を選択的
に形成する方法を例にとり説明する。
Hereinafter, a method for selectively forming a silicon oxide film on the main surface of a silicon substrate will be described as an example.

第1図(A)〜(0)は従来の選択酸化方法の一例の主
要段階の状態を示す断面図である。
FIGS. 1(A) to 1(0) are cross-sectional views showing the main stages of an example of a conventional selective oxidation method.

まず、第1図(A)に示すように、シリコン基板fi+
の主面部の酸化シリコン膜(以下「酸化膜」と呼ぶ)を
形成すべき部分以外の部分上に、下敷酸化膜(2)およ
び窒化シリコン膜(以下「窒化膜」と呼ぶ)(3)を順
次互いに重なり合うように選択的に形成する。次に、第
1図(B)に示すように、窒化膜(3)をマスクとして
高温の酸化雰囲気中での熱処理を行い、シリコン基板f
tlの露出主面部の所要厚さを酸化させて膜厚の厚い酸
化膜(4)を形成する。このとき、窒化膜(3)の表面
部に膜厚の薄い酸化膜(5)が形成される。しかるのち
、第1図(C)に示すように、酸化膜(5)、窒化膜(
3)および下敷酸化膜(2)を順次エツチング除去する
と、この従来例の作業が終了する。なお、酸化膜(51
および下敷酸化膜(2)のエツチング除去時に、膜厚の
厚い酸化膜(4)もエツチングされる。
First, as shown in FIG. 1(A), a silicon substrate fi+
An underlying oxide film (2) and a silicon nitride film (hereinafter referred to as "nitride film") (3) are formed on the main surface of the silicon oxide film (hereinafter referred to as "oxide film") on the parts other than those where the silicon oxide film (hereinafter referred to as "oxide film") is to be formed. They are selectively formed so as to sequentially overlap each other. Next, as shown in FIG. 1(B), heat treatment is performed in a high temperature oxidizing atmosphere using the nitride film (3) as a mask, and the silicon substrate f
A thick oxide film (4) is formed by oxidizing the exposed main surface portion of tl to a required thickness. At this time, a thin oxide film (5) is formed on the surface of the nitride film (3). Thereafter, as shown in FIG. 1(C), an oxide film (5) and a nitride film (
3) and the underlying oxide film (2) are sequentially removed by etching, and the work of this conventional example is completed. Note that the oxide film (51
When the underlying oxide film (2) is removed by etching, the thick oxide film (4) is also etched.

このような従来例の方法では、第1図(B)に示した酸
化段階において、酸化膜(4)の周縁部に、厚さが窒化
膜(3)の端面からその下へ向って漸減的に薄くなる傾
斜部(6)ができる。この傾斜部(6)の長さが素子を
微細化する際に問題になっている。すなわち、素子の微
細化の際のスケ−りング(Scaling)則に酸化膜
(4)が完全に従うならば、微細化前の素子の大きさに
対する微細化後の素子の大きさの割合と同程度の割合で
、酸化膜(4)の厚さを薄くすると、この割合で傾斜部
(6)の長さも短かくなる。
In such a conventional method, in the oxidation stage shown in FIG. 1(B), the thickness gradually decreases from the end surface of the nitride film (3) to the bottom of the oxide film (4). A sloped portion (6) is formed which becomes thinner. The length of this inclined portion (6) poses a problem when miniaturizing elements. In other words, if the oxide film (4) perfectly follows the scaling law when miniaturizing elements, the ratio of the size of the element after miniaturization to the size of the element before miniaturization is the same. If the thickness of the oxide film (4) is reduced by a certain proportion, the length of the slope part (6) will also be shortened by this proportion.

しかし、第1図(0)に示したエツチング段階での酸化
膜(5)および下敷酸化膜(2)の除去時のエツチング
や例えば後工程でのゲート酸化膜の不要部分の除去時の
エツチングによって、同時に酸化膜(4)モエッチング
される。その際、下敷酸化膜(2)などのエツチング残
を皆無にするためにエツチング時間を余分に長くする必
要があるので、酸化膜(4)も余分に多くエツチングさ
れることになる。しかも、この酸化膜(4)の余分のエ
ツチング量がスケーリング化から期待されるようには減
少しないので、この余分のエツチング量に対応する厚さ
だけ余分に酸化膜(4)の厚さをスケーリング化に従う
厚さより厚くしておかねば?jらず、これに伴って傾斜
部(6)の長さも酸化膜(4)を余分に厚くした部分に
対応する部分だけ長くなる。これによって、素子を微細
化する際には、傾斜部(6)による不要な部分の占める
割合が増大し、素子の集積度の向上を図ることが容易で
はなかった。
However, due to the etching during the removal of the oxide film (5) and the underlying oxide film (2) in the etching step shown in FIG. At the same time, the oxide film (4) is etched. At this time, since it is necessary to make the etching time extra long in order to eliminate any etching residue such as the underlying oxide film (2), an extra amount of the oxide film (4) is also etched. Moreover, since the extra etching amount of this oxide film (4) does not decrease as expected from scaling, the thickness of the oxide film (4) is scaled by an extra thickness corresponding to this extra etching amount. Do I need to make it thicker than the thickness that follows? Along with this, the length of the inclined portion (6) also increases by a portion corresponding to the portion where the oxide film (4) is made extra thick. As a result, when miniaturizing the device, the proportion of unnecessary portions occupied by the inclined portion (6) increases, making it difficult to improve the degree of integration of the device.

〔発明の概要〕[Summary of the invention]

この発明は、上述の欠点を改善する目的でなされたもの
で、選択的に酸化膜を形成する際にこの酸化膜の表面上
にこの酸化膜と自己整合的に酸化膜のエツチング剤によ
ってエツチングされない絶縁膜が形成されるようにし、
この絶縁膜によって上記酸化膜以外の不要酸化膜のエツ
チング除去時に上記酸化膜が余分にエツチングされない
ようにすることによって、上記酸化膜の厚さをスケーリ
ング化に従う厚さ以内にすることができ、これに伴って
上記酸化膜の傾斜部の長官も短かくなシ、素子の集積度
の向上を図り得るようにした半導体の選択酸化方法を提
供するものである。
This invention was made to improve the above-mentioned drawbacks, and when an oxide film is selectively formed on the surface of the oxide film, it is not etched by the oxide film etching agent in self-alignment with the oxide film. so that an insulating film is formed,
By using this insulating film to prevent the oxide film from being excessively etched when removing unnecessary oxide films other than the oxide film, the thickness of the oxide film can be kept within the thickness that conforms to scaling. Accordingly, the present invention provides a method for selectively oxidizing a semiconductor in which the length of the sloped portion of the oxide film is not shortened, and the degree of integration of the device can be improved.

〔発明の実施例〕[Embodiments of the invention]

第2図(A)〜(E)はこの発明の一実施例の選択酸化
法の主袂段階の状態を示す断面図である。
FIGS. 2A to 2E are cross-sectional views showing the state of the main stage of the selective oxidation method according to an embodiment of the present invention.

図において、第1図に示した従来例の符号と同一符号は
同等部分を示す。
In the figure, the same reference numerals as those in the conventional example shown in FIG. 1 indicate equivalent parts.

まず、第2図(A)に示すように、シリコン基板fi+
の主面部の酸化膜を形成すべき部分以外の部分上に、下
敷酸化膜(2)、窒化膜(3)およびリフトオフ用スペ
ース膜である膜厚の厚い酸化膜(7)を順次選択的に形
成する。次に、第2図(B)に示すように、窒化膜(3
)をマスクとして高温の酸化雰囲気中での熱処理を行い
、シリコン基板(11の露出主面部の所要厚さを酸化さ
せて膜厚の厚い酸化膜(4)を形成する。
First, as shown in FIG. 2(A), a silicon substrate fi+
An underlying oxide film (2), a nitride film (3), and a thick oxide film (7) serving as a lift-off space film are sequentially selectively formed on the main surface of the main surface other than the part where the oxide film is to be formed. Form. Next, as shown in FIG. 2(B), a nitride film (3
) is used as a mask to perform heat treatment in a high-temperature oxidizing atmosphere to oxidize the exposed main surface of the silicon substrate (11) to a required thickness to form a thick oxide film (4).

次に、第2図(0)に示すように、酸化膜(4)および
酸化膜(7)の全上面に窒化膜(8)を形成し、更に窒
化膜(8)の表面上に多結晶シリコン膜(9)を形成す
′る。次に、第2図(D)に示すように、酸化膜(7)
をリフトオンすることによって、窒化膜(8)および多
結晶シリコン膜(9)の酸化膜(4)の表面上の部分以
外の部分を酸化膜(7)とともに除去する。次に、第2
図(E)に示すように、まず、多結晶シリコン膜(9)
で窒化膜(8)を保護して窒化膜(3)を除去し、次い
で多結晶シリコン膜(9)を除去し、最後に下敷酸化膜
(2)を除去して酸化膜(4)の表面上に窒化膜(8)
を残すと、この実施例の作業が終了する。
Next, as shown in FIG. 2(0), a nitride film (8) is formed on the entire upper surface of the oxide film (4) and the oxide film (7), and a polycrystalline film is further formed on the surface of the nitride film (8). A silicon film (9) is formed. Next, as shown in FIG. 2(D), an oxide film (7) is formed.
By lifting-on, the portions of the nitride film (8) and the polycrystalline silicon film (9) other than those on the surface of the oxide film (4) are removed together with the oxide film (7). Next, the second
As shown in Figure (E), first, the polycrystalline silicon film (9)
to protect the nitride film (8) and remove the nitride film (3), then remove the polycrystalline silicon film (9), and finally remove the underlying oxide film (2) to remove the surface of the oxide film (4). Nitride film on top (8)
, the work of this embodiment is completed.

この実施例の方法では、第2図(B)に示した酸化段階
において、窒化膜(3)が膜厚の厚い酸化膜(7)にヨ
ッて押え込まれているので、シリコン基板(1)の窒化
膜(3)の下の部分の酸化が抑制されて、酸化膜(4)
の傾斜部(6)の長さが短かくなる。その上、第2図(
0)に示した段階において、酸化膜(4)の表面上に窒
化膜(8)を形成するので、この窒化膜(8)によって
、以降の段階における不要酸化膜の除去時に酸化膜(4
)がエツチングされるのを保護することができる。
In the method of this embodiment, in the oxidation stage shown in FIG. 2(B), the nitride film (3) is pressed against the thick oxide film (7), so that The oxidation of the part under the nitride film (3) is suppressed, and the oxide film (4)
The length of the inclined portion (6) is shortened. Moreover, Fig. 2 (
In the step shown in step 0), a nitride film (8) is formed on the surface of the oxide film (4), so this nitride film (8) prevents the oxide film (4) from being removed during the removal of the unnecessary oxide film in the subsequent step.
) can be protected from being etched.

従って、第1図に示した従来例のように、酸化膜(4)
の厚さに余分のエツチングによる減少量を見込む必要が
ないので、酸化膜(4)の厚さをスケーリング則に従う
厚さ以内にすることができ、これに伴って酸化膜(4)
の傾斜部(6)の長さも上記従来例のそれより一層短か
くなり、素子の集積度の向上を図ることができる。
Therefore, as in the conventional example shown in FIG.
Since there is no need to allow for a reduction in the thickness of the oxide film (4) due to extra etching, the thickness of the oxide film (4) can be kept within the thickness that follows the scaling law.
The length of the inclined portion (6) is also shorter than that of the conventional example, and the degree of integration of the device can be improved.

なお、この実施例では、酸化膜(4)のエツチング保護
に窒化膜(8)を用いたが、必ずしもこれは窒化膜であ
る必要がなく、酸化膜のエツチング剤によってエツチン
グされない例えば酸化アルミニウム膜、酸化タンタル膜
などのその他の絶縁膜を用いてもよい。また、この実施
例では、リフトオフ用スペース膜に酸化膜(7)を用い
たが、必ずしもこれは酸化膜である必要がなく、シリコ
ンの酸化温度に耐え得る材料からなり窒化膜のエツチン
グ剤と異なるエツチング剤によってエツチングされる例
えば酸化アルミニウム膜などのその他のリフトオフ用ス
ペース膜を用いてもよい。1だ、この実施例では、シリ
コン基板ftlを用いたが、必ずしもこれはシリコン基
板である必要がなく、エピタキシャル成長シリコン層、
p形シリコンウェ〜ル、n形シリコンウェル、SOSシ
リコンアイランド、レーザー再結晶シリコン層、多結晶
シリコン層などであってもよい。これらを特許請求の範
囲ではシリコン基体と呼ぶことにする。また、この実施
例では、下敷酸化膜(2)を用いたが、必ずしもこれは
本質的に必要なものではなく、省略してもよい。
In this example, the nitride film (8) is used to protect the oxide film (4) from etching, but it does not necessarily have to be a nitride film, and may be an aluminum oxide film, for example, which is not etched by the oxide film etching agent. Other insulating films such as tantalum oxide films may also be used. In addition, in this example, an oxide film (7) was used as the lift-off space film, but this does not necessarily have to be an oxide film, but is made of a material that can withstand the oxidation temperature of silicon and is different from the etching agent for nitride films. Other lift-off spacing films may be used, such as aluminum oxide films that are etched with an etchant. 1. In this example, a silicon substrate ftl was used, but this does not necessarily have to be a silicon substrate, and an epitaxially grown silicon layer,
It may be a p-type silicon well, an n-type silicon well, an SOS silicon island, a laser recrystallized silicon layer, a polycrystalline silicon layer, or the like. These will be referred to as silicon substrates in the claims. Further, in this embodiment, the underlying oxide film (2) is used, but this is not necessarily essential and may be omitted.

〔発明の効果〕〔Effect of the invention〕

以上、説明したように、この発明によれば、シリコン基
体の主面部の所要部分に酸化シリコン膜を形成する際に
、この酸化シリコン膜の表面上にこの酸化シリコン膜と
自己整合的に上記酸化シリコン膜のエツチング剤によっ
てエツチングされない絶縁膜を形成し、この絶縁膜によ
って上記配化シリコン基体外の不要酸化シリコン膜の除
去時に上記酸化シリコン膜がエツチングされるのを保護
することができる。従って、上記酸化シリコン膜の厚さ
に余分のエツチングによる減少量を見込む必要がないの
で、上記酸化シリコン膜の厚さをスケーリング則に従う
厚さ以内にすることができ、これに伴って上記酸化シリ
コン膜の傾斜部の長さも短かくなり、素子の集積度の向
上を図4ことができる。
As described above, according to the present invention, when forming a silicon oxide film on a required portion of the main surface of a silicon substrate, the oxide film is formed on the surface of the silicon oxide film in a self-aligned manner with the silicon oxide film. An insulating film that is not etched by a silicon film etching agent is formed, and this insulating film can protect the silicon oxide film from being etched during removal of the unnecessary silicon oxide film outside the disposed silicon substrate. Therefore, since there is no need to allow for a reduction in the thickness of the silicon oxide film due to extra etching, the thickness of the silicon oxide film can be kept within the thickness that follows the scaling law, and along with this, the silicon oxide film The length of the sloped portion of the film is also shortened, and the degree of integration of the device can be improved as shown in FIG.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の選択酸化方法の一例の主要段階の状態を
示す断面図、第2図はこの発明の一実施例の主要段階の
状態を示す断面図である。 図において、(1)はシリコン基板(シリコン基体) 
、(:llは窒化シリコン膜、(4)は酸化シリコン膜
、(6)は傾斜部、(7)はリフトオフ用スペース膜で
ある酸化シリコン膜、(8)は窒化シリコン膜(絶縁膜
)、(9)は多結晶シリコン膜である。 なお、図中同一符号はそれぞれ同一または相当部分を示
す。 第1図
FIG. 1 is a sectional view showing the main stages of an example of a conventional selective oxidation method, and FIG. 2 is a sectional view showing the main stages of an embodiment of the present invention. In the figure, (1) is a silicon substrate (silicon base)
, (:ll is a silicon nitride film, (4) is a silicon oxide film, (6) is a sloped part, (7) is a silicon oxide film which is a space film for lift-off, (8) is a silicon nitride film (insulating film), (9) is a polycrystalline silicon film. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] il)  シリコン基体の主面部の酸化シリコン膜を形
成すべき部分以外の部分上に窒化シリコン膜およびシリ
コンの酸化温度に耐え得る材料からなり上記窒化シリコ
ン膜のエツチング剤と異なるエツチング剤によってエツ
チングされるリフトオフ用スペース膜を順次選択的に形
成する第1の工程、上記窒化シリコン膜をマスクとして
酸化雰囲気中での熱処理を行い上記シリコン基体の露出
主面部の所賛厚さを酸化させて酸化シリコン膜を形成す
る第2の工程、上記酸化シリコン膜および上記リフトオ
フ用スペース膜の全上面に上記酸化シリコン膜のエツチ
ング剤によってエツチングされない絶縁膜および多結晶
シリコン膜を順次形成する第3の工程、上記リフトオフ
用スペース膜をリフトオフすることによって上記絶縁膜
および上記多結晶シリコン膜の上記酸化シリコン膜の表
面上の部分以外の部分を上記リフトオフ用スペース膜と
ともに除去する第4の工程、並びに上記窒化シリコン膜
および多結晶シリコン膜を順次除去する第5の工程を備
えた半導体の選択酸化方法。
il) A silicon nitride film on the main surface of the silicon substrate other than the part where the silicon oxide film is to be formed and is etched with an etching agent different from the etching agent for the silicon nitride film, which is made of a material that can withstand the oxidation temperature of silicon. A first step of sequentially and selectively forming lift-off space films, a heat treatment is performed in an oxidizing atmosphere using the silicon nitride film as a mask to oxidize the exposed main surface of the silicon substrate to a desired thickness to form a silicon oxide film. a third step of sequentially forming an insulating film and a polycrystalline silicon film that are not etched by the etching agent for the silicon oxide film on the entire upper surface of the silicon oxide film and the space film for lift-off; a fourth step of removing portions of the insulating film and the polycrystalline silicon film other than the portions on the surface of the silicon oxide film together with the lift-off space film by lifting off the silicon nitride film; A method for selectively oxidizing a semiconductor, comprising a fifth step of sequentially removing a polycrystalline silicon film.
JP19379282A 1982-11-02 1982-11-02 Selective oxidation of semiconductor Pending JPS5982749A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19379282A JPS5982749A (en) 1982-11-02 1982-11-02 Selective oxidation of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19379282A JPS5982749A (en) 1982-11-02 1982-11-02 Selective oxidation of semiconductor

Publications (1)

Publication Number Publication Date
JPS5982749A true JPS5982749A (en) 1984-05-12

Family

ID=16313859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19379282A Pending JPS5982749A (en) 1982-11-02 1982-11-02 Selective oxidation of semiconductor

Country Status (1)

Country Link
JP (1) JPS5982749A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003502161A (en) * 1999-06-16 2003-01-21 キオニックス インコーポレーテッド Improved method of manufacturing microelectromechanical and microfluidic devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003502161A (en) * 1999-06-16 2003-01-21 キオニックス インコーポレーテッド Improved method of manufacturing microelectromechanical and microfluidic devices

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