JPS5979942U - Late priority circuit - Google Patents
Late priority circuitInfo
- Publication number
- JPS5979942U JPS5979942U JP17618482U JP17618482U JPS5979942U JP S5979942 U JPS5979942 U JP S5979942U JP 17618482 U JP17618482 U JP 17618482U JP 17618482 U JP17618482 U JP 17618482U JP S5979942 U JPS5979942 U JP S5979942U
- Authority
- JP
- Japan
- Prior art keywords
- relays
- circuit
- input
- state
- holding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Small-Scale Networks (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来の後発優先回路の一例を示す図である。第
2図は本考案による後発優先回路の一実施例を示す図で
ある。 〜a工〜a4・・・入力接点
、iNl〜IN4・・・入力端子、P1〜P4・・・継
電器、D1〜D4・・・ダイオード、Q1〜Q4・・・
出力端子、Pl、 1’w Pl 2+ P13+
P□4+ P2−1+ P2 2+ P2 3* P
2 4+ P3 1+ P3 2+P3 3+ P3
4+ P4 Lx P4−2+ P4 3+ P4=
4+ P11+P′□−2+ P ’ 2 2+ P
’ 2−2+ P ’ 3−1+P ’ 3 2+ P
’ 4−1t ” 4−2* Pl−O9”2 0+
P30r P4 0・・・継電器の接点。FIG. 1 is a diagram showing an example of a conventional late priority circuit. FIG. 2 is a diagram showing an embodiment of the later priority circuit according to the present invention. ~A~A4...Input contact, iNl~IN4...Input terminal, P1~P4...Relay, D1~D4...Diode, Q1~Q4...
Output terminal, Pl, 1'w Pl 2+ P13+
P□4+ P2-1+ P2 2+ P2 3* P
2 4+ P3 1+ P3 2+P3 3+ P3
4+ P4 Lx P4-2+ P4 3+ P4=
4+ P11+P'□-2+ P' 2 2+ P
' 2-2+ P ' 3-1+P ' 3 2+ P
' 4-1t " 4-2* Pl-O9"2 0+
P30r P4 0...Relay contact.
Claims (1)
わすための複数個の入力端子と、前記複′数個の入力端
子にそれぞれ接続されていて前記複数個の入力接点の状
態に応じて動作して前記入力接点の状態を保持するため
の複数個の継電器と、前記複数個の継電器のそれぞれに
対応して前記複数個の継電器のうちのひとつを選択的に
保持するための複数個のダイオードと、前記選択的に保
持された継電器の状態を情報として出力するための複数
個の出力端子とを具備し、前記複数個の継電器のそれぞ
れに自己保持回路形成用にそれぞれ2回路より成るメー
ク/ブレーク接点対を具備してそれぞれ前記複数個のダ
イオードのひとつとともに反復的に縦続接続し、切替連
鎖回路形成用に他のメーク/ブレーク接点対を具備する
ことにより前記選択的に保持された継電器に対応して前
記複数個の出力端子のひとつへ地気を与えるように構成
したことを特徴とする後発優先回路。a plurality of input terminals for representing states determined by each of the plurality of input contacts; and a plurality of input terminals each connected to the plurality of input terminals and operating according to the state of the plurality of input contacts. a plurality of relays for holding the state of the input contact, and a plurality of diodes for selectively holding one of the plurality of relays corresponding to each of the plurality of relays; , a plurality of output terminals for outputting the state of the selectively held relay as information, and a make/break circuit comprising two circuits for forming a self-holding circuit for each of the plurality of relays. accommodating said selectively held relay by providing contact pairs each repeatedly cascaded with one of said plurality of diodes and providing another make/break contact pair to form a switching chain circuit; 2. A later priority circuit, characterized in that the second priority circuit is configured to supply air to one of the plurality of output terminals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17618482U JPS5979942U (en) | 1982-11-19 | 1982-11-19 | Late priority circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17618482U JPS5979942U (en) | 1982-11-19 | 1982-11-19 | Late priority circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5979942U true JPS5979942U (en) | 1984-05-30 |
Family
ID=30383110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17618482U Pending JPS5979942U (en) | 1982-11-19 | 1982-11-19 | Late priority circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5979942U (en) |
-
1982
- 1982-11-19 JP JP17618482U patent/JPS5979942U/en active Pending
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