JPS58148851U - Relay check circuit - Google Patents

Relay check circuit

Info

Publication number
JPS58148851U
JPS58148851U JP4577682U JP4577682U JPS58148851U JP S58148851 U JPS58148851 U JP S58148851U JP 4577682 U JP4577682 U JP 4577682U JP 4577682 U JP4577682 U JP 4577682U JP S58148851 U JPS58148851 U JP S58148851U
Authority
JP
Japan
Prior art keywords
check circuit
normally open
relay check
relay
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4577682U
Other languages
Japanese (ja)
Inventor
坪井 弘行
Original Assignee
東芝機械株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東芝機械株式会社 filed Critical 東芝機械株式会社
Priority to JP4577682U priority Critical patent/JPS58148851U/en
Publication of JPS58148851U publication Critical patent/JPS58148851U/en
Pending legal-status Critical Current

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  • Testing Electric Properties And Detecting Electric Faults (AREA)
  • Keying Circuit Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す回路図、第2図A、 
Bは個別リレーのオンチェックにおける接点の状態を示
す回路図、第3図A、 Bは個別リレーのオフチェック
における接点の状態を示す回路図である。 Rla”%/R8i・・常開接点、R18b−・・常閉
接点。
Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2A,
3A and 3B are circuit diagrams showing the states of the contacts during the on-check of the individual relays, and FIGS. 3A and 3B are circuit diagrams showing the states of the contacts during the off-check of the individual relays. Rla”%/R8i...Normally open contact, R18b-...Normally closed contact.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数のリレーの作動をチェックするチェック回路におい
て、前記各リレーの常閉接点に次段のリレーの常開接点
をそれぞれ接続し、この常開接点と常開接点との組合せ
からなる複数の接点回路を互いに並列に接続したことを
特徴とするリレーのチェック回路。
In a check circuit that checks the operation of a plurality of relays, a normally open contact of the next stage relay is connected to a normally closed contact of each of the relays, and a plurality of contact circuits are formed by a combination of the normally open contacts and the normally open contacts. A relay check circuit characterized in that the circuits are connected in parallel with each other.
JP4577682U 1982-03-31 1982-03-31 Relay check circuit Pending JPS58148851U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4577682U JPS58148851U (en) 1982-03-31 1982-03-31 Relay check circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4577682U JPS58148851U (en) 1982-03-31 1982-03-31 Relay check circuit

Publications (1)

Publication Number Publication Date
JPS58148851U true JPS58148851U (en) 1983-10-06

Family

ID=30056786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4577682U Pending JPS58148851U (en) 1982-03-31 1982-03-31 Relay check circuit

Country Status (1)

Country Link
JP (1) JPS58148851U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991003741A1 (en) * 1989-09-01 1991-03-21 Fanuc Ltd System for detecting melt-adhesion of relay
JPH07281735A (en) * 1994-04-14 1995-10-27 Dam Seki Shisetsu Gijutsu Kyokai Method and device for deciding abnormal level

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991003741A1 (en) * 1989-09-01 1991-03-21 Fanuc Ltd System for detecting melt-adhesion of relay
JPH07281735A (en) * 1994-04-14 1995-10-27 Dam Seki Shisetsu Gijutsu Kyokai Method and device for deciding abnormal level

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