JPS5979580A - Manufacture of solar battery - Google Patents

Abstract

PURPOSE:To manufacture an Si solar battery with excellent conversion efficiency by means of double diffusion using a simple process. CONSTITUTION:After removing a broken layer on the surface of a P type Si substrate 1, a PSG2 is formed and an N<+> layer 3 is provided by P diffusion. The PSG2 is etched using a resist mask 4 to be heat-treated for the P diffusion. Next the PSG2 is etched and another resist mask 5 is used to etch the N<+> layers on the sides and back. The mask 5 is removed to provide the surface and the back with electrodes 6, 7 respectively made of Ag and Al further covered with solders 7 finally providing the surface with a reflection preventing film 9 to complete a solar battery. Through these procedures, the diffusion temperature may be set up within the range of 800-900 deg.C, (opertional temperature of 830- 900 deg.C) depending upon the diffusing time, to manufacture the solar battery with excellent performances and shallow junction surface.

Description

[Detailed description of the invention] Technical fields> The present invention relates to a method for manufacturing solar cells.

<Corneral resolution problem> In general, solar cells using silicon crystal as a substrate have a structure that includes a PN junction for forming an internal electric field, and a front surface electrode and a back surface electrode for extracting electromotive force. In some cases, an anti-reflection coating is provided to reduce reflection and improve efficiency.

In order to obtain high efficiency in solar cell elements, it is necessary for minority charge carriers generated by incident light to effectively reach the PN junction, but for this purpose, the quality of the crystal of the element substrate itself must be good. That is, it is necessary that the diffusion length of minority charge carriers be long and that the depth of the PN junction surface be appropriate. When the diffusion length of minority charge carriers is appropriate, in order to improve the spectral sensitivity of the device on the short wavelength side, the depth of the junction should be made as shallow as possible (by which the light on the short wavelength side is absorbed at the very surface of the crystal). It is necessary to maximize the contribution from In some cases, when alloying occurs between the electrode forming material and silicon, the alloyed region extends to the interface of the PN junction, causing the junction to penetrate through, thereby degrading the characteristics of the element. Become.

On the other hand, if this region is made shallow and the electrode formation conditions are adjusted so that it does not extend to the PN junction, for example by firing at a low temperature, a sufficient electrical connection will not be obtained. Otherwise, the mechanical strength may be poor, resulting in inconveniences such as the inability to connect terminals.For this reason, it is generally not possible to make the depth of the PN junction very shallow.

<Objective of the Invention> The main object of the present invention is to provide a method for manufacturing a silicon crystal solar cell with high conversion efficiency by performing double diffusion treatment using a simple method.

<Structure of the Invention> The manufacturing method of the present invention performs first diffusion to a predetermined depth by forming a silicon oxide film layer containing an impurity element to be diffused on the surface of a silicon wafer at high temperature, and then The silicon oxide film layer containing the element to be diffused 3 is removed leaving a portion corresponding to the electrode pattern to be formed on the surface, and then heat treatment is performed again at high temperature to form the portion corresponding to the electrode pattern. The method is characterized in that a second diffusion is performed and then an electrode is provided.

Although the diffusion temperature in the present invention also depends on the diffusion time,
It can be carried out on a cylindrical surface at 800°C to 950''C, with a range of 830°C to 900'C being practical.

<Example 1> Figs. 1 to 12 show a first example of the present invention in schematic diagrams over time. A P-type Si wafer 1 was etched for 5 minutes using a mixed acid containing hydrofluoric acid and nitric acid at a mixing ratio of 1:9 to remove a layer of about 20 μm including a damaged layer on the wafer surface, and then washed with water (FIG. 1). Subsequently, in a diffusion furnace, phosphorus was diffused by gas phase reaction using phosphorus oxychloride (POCjl!3) as a diffusion source. Diffusion temperature 830℃
A phosphorus glass layer 2 containing phosphorus was formed on the wafer surface by feeding POCβ3 vapor into the furnace for 20 minutes.

Phosphorus was diffused from the glass layer into the silicon substrate to form n+N3 on the wafer surface (FIG. 2).

After this diffusion, on one side of the wafer, which becomes the light-receiving surface, there is a pattern with an i-turn (same as the surface electrode pattern) and a slightly larger outline size (Q, width 1.5 in l*m to 0.21). It was formed by printing and coating M) 4 and etching resist 4 (FIG. 3). Next, etching was performed using a mixture of hydrofluoric acid and pure water in a ratio of 1:3 to remove the exposed portion of the phosphor glass layer, leaving only the phosphor glass layer in the patterned portion (FIG. 4). After removing the notching resist 4 with an organic solvent, it was washed with pure water (5th
figure). Next, as a result of heat treatment again in a furnace at 860'C for 30 minutes, new diffusion of phosphorus into the silicon substrate occurs in the remaining portion of the phosphor glass layer, so that the sheet resistance increases, respectively. There should be a difference between the removed part (35Ω) and the removed part (45Ω) (Figure 6). After this heat treatment, the remaining phosphorescent layer 2 was removed by etching with a 1:3 mixture of hydrofluoric acid and pure water (FIG. 7). Next, after coating the etching resist 5 on the wafer surface (8th
(Fig. 9), the back side was processed and notched with the mixed acid to remove the dried sardines 3 on the back and sides (Fig. 9). Next, the etching resist 5 was removed using an organic solvent and then washed with pure water (FIG. 10). Printing and baking were performed on the front and back surfaces of this sea urchin/"t- by a printing method using Ag paste and /l base 1- as electrodes.

The surface electrode pattern was aligned to match the previously doubly diffused pattern portion. Electrodes 6 and 7 on the front and back sides
After firing, a solder layer was applied and the electrodes were covered with solder 8 (FIG. 11). Finally, an antireflection film 9 was formed on the surface to obtain the solar cell element.

<Comparative Example> On the other hand, for comparison, an element was manufactured by a conventional method. The manufacturing process is shown in FIGS. 13 to 19.

P-type silicon wafer 1 is mixed with hydrofluoric acid and nitric acid at a mixing ratio of 1.
The wafer surface was etched for 5 minutes with a mixed acid of No. 9 to remove a layer of about 20 μm including a damaged layer, and then washed with water (FIG. 13). Subsequently, in a diffusion furnace at 860°C
Phosphorus was diffused by gas phase reaction using phosphorus oxychloride as a diffusion source for 3 minutes to form n→-layer 3 on the wafer surface (14th
figure). The sheet resistance at this time was 35Ω. After this diffusion, an etching resist 5 is applied to one side of the wafer which becomes the light receiving surface.
After coating (FIG. 15), the back surface was etched with the mixed acid to remove only n+Ji on the back surface (FIG. 16). After removing the etching resist with an organic solvent,
The phosphorus glass layer remaining on the surface was also removed with a mixture of hydrofluoric acid and pure water, and then washed with pure water (FIG. 17). Thereafter, Ag and A/pastes were printed on the front and back surfaces of the device, baked, and soldered (FIG. 18). Finally, an antireflection film 9 was formed on the surface of the element (FIG. 19).

Table 1 shows the electrical characteristics of the solar cell element obtained by the manufacturing method based on the present invention in comparison with Comparative Example 1. The measurement conditions were solar simulator and AMI (irradiation intensity 100mW).
/crA) Measured at a temperature of 25°C.

<Example 2> As a second example, a manufacturing method using the steps shown in FIGS. 20 to 27 instead of the steps after FIG. 8 of Example 1 will be described.

This example is the same as the first example in the steps up to double diffusion, but is different from the first example in that the electrodes are formed after the antireflection film is formed.

This difference improved conversion efficiency. The reason is 25
This is thought to be because the antireflection film was formed at a high temperature of 0° C. to 600° C., which inactivated the element surface and reduced the surface recombination rate of minority carriers generated during light reception.

After double diffusion was performed and all the phosphorous glass layers were removed, an antireflection film 10 of silicon nitride was deposited on the device surface using a plasma CVD apparatus (FIG. 20).

Subsequently, an etching resist 5 was applied to the surface of the antireflection film 10 (FIG. 21), and the back surface of the element was etched with the mixed acid described above to remove n+Fi3 (FIG. 22). Remove the etching resist 5 with an organic solvent (Fig. 23),
Etching resist 11 was applied again by printing to form a mask pattern for removing the antireflection film in the portion corresponding to the surface electrode pattern (FIG. 24). Etching was performed again using the above-mentioned mixture of hydrofluoric acid and pure water, and the exposed portion of the antireflection film was removed by etching (FIG. 25).

Next, the etching resist 11 was removed using an organic solvent (
Figure 26). Finally, after printing and firing Ag and AI pastes on the front and back surfaces to form electrodes 6 and 7, solder 8 was applied to the electrode surfaces using a solder dip to obtain the device (FIG. 27).

<Example 3> - As a third example, a manufacturing method using the steps shown in FIGS. 39 to 44, FIGS. 26 and 27 instead of the steps after FIG. 7 of Example 1 will be explained. do.

In this example, the steps up to double diffusion are the same as those in the first and second examples, but an antireflection film is formed while leaving the phosphor glass layer 2 on the electrode part shown in FIG. Thereafter, the anti-reflection film and the nodding resist 1- in the electrode forming portion are removed in one step, thereby simplifying the number of steps.

After performing double diffusion, the patterned phosphor glass layer 2 was left as it was, and immediately an antireflection film 10 of silicon nitride was deposited on the element surface using a plasma CVD apparatus (FIG. 39).
. Subsequently, an etching resist 5 is applied to the surface of the antireflection film 10 (FIG. 40), and the back surface of the element is etched with the mixed acid described above to remove the n-layer 3 (FIG. 41). (Figure 42) Removing the etching resist 5 with an organic solvent)
Then, Esochindaresist 11 was applied by printing again to form a mask pattern for removing the antireflection film in the portion corresponding to the surface electrode pattern (FIG. 43). Etching was performed again using the above-mentioned mixture of hydrofluoric acid and pure water, and the exposed portion of the anti-reflection film and the phosphor glass layer underneath were etched away at the same time (FIG. 44). Finally, after removing the etching resist with an organic solvent (FIG. 26), electrodes were formed and solder was deposited to obtain the device (FIG. 27).

<Example 4> As a fourth example, a manufacturing method using the steps shown in FIGS. 45 to 49, 26, and 27 instead of the steps after FIG. 6 of Example 1 will be explained. .

In this example, by forming an anti-reflection film before performing the second diffusion process, the process is further simplified than in the third example without reducing the conversion efficiency. It has characteristics.

After performing the first diffusion, the phosphor glass layer on the element surface side is patterned into a front electrode pattern (Fig. 5), and then immediately an anti-reflection film 10 of silicon nitride is deposited on the element surface using a plasma CVD device. (Figure 45). then again 90
As a result of heat treatment in a 0°C furnace for 10 minutes, phosphorus newly diffuses into the silicon substrate in the remaining portion of the phosphor glass layer, so that the sheet resistance is 35 Ω in the remaining portion of the phosphor glass layer, and 35 Ω in the remaining portion of the phosphor glass layer, and 35 Ω in the remaining portion of the phosphor glass layer, and 35 Ω in the remaining portion of the phosphor glass layer, and There was a difference of 45Ω in the part where
Figure 6). At this time, diffusion of oxidation occurs from the phosphorous glass layer into the silicon nitride film 10' on the layer, and as a result, the film quality changes and the etching rate is lower than that of other parts of the film due to the mixture of hydrofluoric acid and pure water. It becomes extremely large compared to the etching speed. In this embodiment, this property is utilized in a later process. Next, an etching resist 5 is applied to the surface of the antireflection film 100 (
(Fig. 47), and the dried sardine 3 was removed by etching the back side of the element with the mixed acid described above (Fig. 48). Next, the etching resist was removed with an organic solvent (Fig. 49), and then etched for 3 minutes with a mixture of hydrofluoric acid and pure water at a mixing ratio of 1:3 to remove the phosphorus on the 10' part of the antireflection film and its lower surface. Only glass layer 2 was removed by etching (FIG. 26). Finally, electrode formation and solder depth are performed to obtain the second solar cell.
Figure 7).

<1 Comparative Example 2> For comparison, Figures 28 to 38 show the manufacturing process for a solar cell element produced by a method that does not involve double diffusion.
As shown in the figure.

A P-type silicon wafer 1 was etched for 5 minutes using the above-mentioned a acid to remove a layer of about 20 μm including a damaged layer on the wafer surface, and then washed with water (FIG. 28). Subsequently, in a diffusion furnace, phosphorus oxychloride was diffused at 860° C. for 23 minutes, and phosphorus was diffused by a gas phase reaction to form n+52 on the light-receiving surface. The surface resistance was 35Ω. The phosphor glass layer 3 on the surface of this element was removed by etching with the above-mentioned mixture of hydrofluoric acid and pure water (Fig. 30), and then an antireflection film 10 was formed on the surface of the element using a plasma CVD apparatus (Fig. 30). Figure 31). Anti-reflection film surface is machined/touching resist 1
-5 (Fig. 32), the back side is etched and removed with the mixed acid (Fig. 33), the etching resist is removed with an organic solvent (Fig. 34), and a new mask corresponding to the front electrode pattern is created. A pattern was formed by printing and applying an etching resist (Figure 35).

The exposed portions of the antireflection film were removed in a pattern by etching the hydrofluoric acid with a mixture of pure water (FIG. 36), and then the etching resist was removed with an organic solvent (ffi37Fl).

Subsequently, after printing and firing Ag and Aβ pastes on the front and back surfaces, the electrode surfaces were covered with solder using a solder depth (FIG. 38).

<Effects of the Invention> Table 1 shows the characteristics of the solar cell elements manufactured according to Examples 1 to 4 described above in comparison with those manufactured according to Comparative Examples 1 and 2. As is clear from this table,
Regarding the conversion efficiency, Comparative Example 1 was 10.4%, while Example 1 was improved to 11.4%, and Comparative Example 2 was 11.9%. Examples 2 to 4 were 12.8%, 13.0%, and 1, respectively.
This increased to 2.7%.

Further, according to the present invention, a part of the silicon oxide film layer such as the phosphor glass layer formed for the first diffusion process is left and reused to perform the second diffusion process. This simplifies the process compared to other predictable double diffusion methods.

Table 1 □ □ Other Modified Examples The present invention is not limited to Examples 1 to 4 mentioned above, but can be implemented by various modified examples.

As a diffusion method, a method of forming a glass filler layer by vapor phase diffusion using pocβ3 was shown in the example, but other methods such as a CVD method and a coating method can be used.

In these cases as well, it is possible to perform the heat treatment again after performing the diffusion and leaving a part of the diffusion. Furthermore, in the embodiment, the case where a P-type silicon wafer substrate was used was described, but it is also possible to form a PN junction with an N-type substrate, for example, by diffusing boron. It is also possible to perform pattern cutting using the formed boron-containing glass layer (or silicon oxide film layer) to perform partial double diffusion.

Although printing and firing using Ag or A72 paste has been shown as an electrode forming method, it is of course possible to apply electrode forming by vapor deposition or plating in the present invention.

As the anti-reflection film, although an example is shown in which a silicon nitride film is used, it is of course possible to use other conventionally used films such as SiO, TiO2, Ta20a, etc.

[Brief explanation of drawings]

1 to 12 are schematic sectional views illustrating a first embodiment of the present invention over time. FIGS. 13 to 19 are schematic cross-sectional views illustrating the first comparative example over time. FIGS. 20 to 27 are schematic sectional views chronologically explaining the main parts of the second embodiment of the present invention. FIGS. 28 to 44 are schematic cross-sectional views illustrating the main parts of the third embodiment of the present invention over time. FIGS. 45 to 49 are schematic cross-sectional views illustrating the main parts of the fourth embodiment of the present invention over time. 1... Silicon wafer, 2... Phosphorus glass layer (silicon oxide film layer), 3... n
Dried sardine, 6... Surface electrode, 9.10... Anti-reflection film, 10'... Altered portion of anti-reflection film

Claims (1)

[Claims] A method for manufacturing a P-N junction solar cell using a silicon wafer as a substrate, in which a silicon oxide film layer containing a diffused impurity element is formed on the surface of the silicon wafer at a high temperature to a predetermined depth. Then, the silicon oxide film layer containing the diffused impurity element is removed leaving a portion corresponding to the electrode pattern to be formed on the element surface, and the next step is heat treatment at high temperature again. A method for manufacturing a solar cell, characterized in that a second diffusion is performed in a portion corresponding to the electrode bag, and then an electrode is provided.