JPS5978539A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5978539A
JPS5978539A JP18861082A JP18861082A JPS5978539A JP S5978539 A JPS5978539 A JP S5978539A JP 18861082 A JP18861082 A JP 18861082A JP 18861082 A JP18861082 A JP 18861082A JP S5978539 A JPS5978539 A JP S5978539A
Authority
JP
Japan
Prior art keywords
electrode
electrode plate
semiconductor body
plate
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18861082A
Other languages
Japanese (ja)
Inventor
Masami Iwasaki
岩崎　政美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP18861082A priority Critical patent/JPS5978539A/en
Publication of JPS5978539A publication Critical patent/JPS5978539A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To uniformly contact a semiconductor body with an electrode in a structure that both side surfaces of a semiconductor body are pressure contacted through a slidably placed electrode plate by forming a structure that the body is uniformly contacted with the electrode plate. CONSTITUTION:The second electrode plate 14 of the collector surface of a semiconductor body 11 is constructed in a structure to pressure contact an electrode plate slidably placed from both side surfaces of the body 11 without brazing. An emitter electrode is removed from a main side, and the first electrode plate 13 which faces the drive side without emitter electrode lead is formed in a doughnut shape in which a center is opened. Since a base lead electrode wire 15 is led from the center of a copper cooling electrode which is disposed on the upper surface of the first plate 13, a groove is formed insulate from the plate 13 as the emitter electrode. The plate 13 is constructed to be pressure contacted together with the copper cooler through an insulator 20 at the center.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は特に大電力用半導体素子のように本体と第２
の電極板との接触を良好にした半導体装置に関する。[Detailed Description of the Invention] [Technical Field of the Invention] This invention particularly relates to a main body and a second
The present invention relates to a semiconductor device that has good contact with an electrode plate.

〔発明の技術的背景〕[Technical background of the invention]

第１図に従来の大電力用ダーリントントランジスタの電
極取り出しが圧接によりなされている半導体装置を示す
。同図において、１１は半導体本体である。上記半導体
本体１１上面（エミッタ及びベース）にはＡ／　　より
なる金属電極層１２が形成されている。そして、上記金
属電極層１２には可滑動的にエミッタ電極として用いら
れる第１の電極板１３が可滑動的に載置され、上記半導
体本体１１の下面（コレクタ）には上記半導体本体１ノ
の熱緩衝板も兼ねて第２の電極板１４をロー付け（ｋｌ
の合金）して上記半導体本体１１を圧接するような構造
となっている。この様な構造にするとロー付けする際。FIG. 1 shows a semiconductor device in which the electrodes of a conventional high-power Darlington transistor are taken out by pressure bonding. In the figure, 11 is a semiconductor body. A metal electrode layer 12 made of A/2 is formed on the upper surface (emitter and base) of the semiconductor body 11. A first electrode plate 13 used as an emitter electrode is slidably placed on the metal electrode layer 12, and a first electrode plate 13 used as an emitter electrode is mounted on the lower surface (collector) of the semiconductor body 11. The second electrode plate 14, which also serves as a thermal buffer plate, is brazed (kl
The structure is such that the semiconductor body 11 is pressed into contact with the semiconductor body 11. With this kind of structure, when brazing.

たとえばＡ、／　　を合金化して使用する場合は７００
℃と高い温度で合金化させるため半導体本体１ノが反り
圧接に対し不都合となっている。For example, when using A, / as an alloy, 700
Since the semiconductor body 1 is alloyed at a high temperature of .degree. C., the semiconductor body 1 is warped, which is disadvantageous for pressure welding.

また、このダーリントントランジスタの中央部には上記
第１の電極板１３とは絶縁されて取り出されたベースリ
ード電極線１５が設けられている。また、ト記半導体本
体１ノは上記第１及び第２の電極板１３及びＪ４を介し
て圧接される様に配置されているエミッタ銅電極体１６
及びコレクタ銅電極体１７とにより半導体本体及び第２
の電極板１４は半導体本体１１の熱が張係数に近いモリ
ブデンやタングステン板等が使用される。ここで、１７
は気密封止用セラミック、１８は半導体本体固定用固定
物である。Furthermore, a base lead electrode wire 15 is provided at the center of the Darlington transistor, insulated from the first electrode plate 13 and taken out. Further, the semiconductor body 1 is placed in pressure contact with the emitter copper electrode body 16 via the first and second electrode plates 13 and J4.
and the collector copper electrode body 17 to connect the semiconductor body and the second
As the electrode plate 14, a molybdenum plate, a tungsten plate, or the like, whose thermal coefficient is close to the tensile coefficient of the semiconductor body 11, is used. Here, 17
1 is a ceramic for hermetic sealing, and 18 is a fixture for fixing the semiconductor body.

また、大電力用ダーリントントランジスタにおいてはエ
ミッタ電極の取り出しはメイン側のトランジスタ部分の
圧接となり、ドライブ側は圧接しないため上記第１の電
極板１３はドーナツ型の形状となっている。また、最近
において半導体本体１１のコレクタ側の第２の電極板１
４をロー付けしないで可滑動的に配置させ圧接する様な
構造が採用されようとしている。Further, in the case of a high-power Darlington transistor, the emitter electrode is taken out by pressing the transistor part on the main side, but not on the drive side, so the first electrode plate 13 has a doughnut-shaped shape. In addition, recently, the second electrode plate 1 on the collector side of the semiconductor body 11
A structure is being adopted in which the parts 4 are slidably and dynamically arranged and pressed together without being brazed.

〔背景技術の問題点〕[Problems with background technology]

本発明においては従来技術の第２の電極板１４を合金化
しないで半導体本体１１と第１及び第２の電極板１　、
？　、　１４を可滑動的に載ｔｉｔさせて圧接する構造
の場合で、半導体本体１１は数１００μｍと薄いシリコ
ンであるため部分的に圧接すると容易に反るという欠点
があった。In the present invention, the semiconductor body 11 and the first and second electrode plates 1 are combined without alloying the second electrode plate 14 of the prior art.
? , 14 are slidably mounted and pressed together, and since the semiconductor body 11 is made of silicon, which is as thin as several 100 .mu.m, it has the disadvantage that it easily warps if it is partially pressed.

また、大電力用ダーリントントランジスタの様にエミッ
タ電極である第１の電極板Ｉ３がドーナツ型のため圧接
しないドライブ側の部分に対面するコレクタ面が第２の
電極板１４と接触しないで第２図に示すように空間１９
が出来る。In addition, since the first electrode plate I3, which is the emitter electrode, is donut-shaped like the Darlington transistor for high power, the collector surface facing the drive side part that is not in pressure contact does not come into contact with the second electrode plate 14, as shown in FIG. Space 19 as shown in
I can do it.

このため、特に熱抵抗が悪くなり半導体本体１１が破壊
しやすくなるという欠点があった。For this reason, there has been a drawback that the thermal resistance is particularly poor and the semiconductor body 11 is easily destroyed.

〔発明の目的〕[Purpose of the invention]

この発明は上記の点に鑑みてなされたもので。 This invention was made in view of the above points.

その目的は半導体本体両面が可滑動的に載置される電極
板を介して圧接する構造において半導体本体が第２の電
極板１４に均一に接触される様な構造にした半導体装置
を提供することにある。The purpose is to provide a semiconductor device having a structure in which both surfaces of the semiconductor body are pressed into contact with each other through an electrode plate on which the semiconductor body is slidably and dynamically placed, and the semiconductor body is in uniform contact with the second electrode plate 14. It is in.

〔発明の概要〕[Summary of the invention]

は絶縁物を介して第１の電極板と一緒に冷却電極体で圧
接して取り出している。The first electrode plate and the first electrode plate are pressed together with a cooling electrode body and taken out through an insulator.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照してこの発明の一実施例を説明する。 Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第３図はこの発明の一実施例における半導体装置で、中
央よりベース電極が取り出される大電力用ダーリントン
トランジスタを示す断面図である。同図において、第１
図あるいは第２図と同一名称には同一番号を付すことｌ
こする。また、同図に示すような半導体装置においては
、半導体本体１１のコレクタ面の第２の電極板１４はロ
ー付けしないで半導体本体１１の両面より可滑動的に載
置される電極板を圧接する構造となっている。また、第
３図に示す様なダーリントントランジスタにおいては、
エミッタの電極取り出しはメイン側からとなり、エミッ
タ電極取り出しがないドライブ側に面する第１の電極板
１３は中央がくりぬかれたドーナツ型の形状となってい
る。また、第１の電極板１３の上面に配置される銅冷却
電極体は中央よりベースリード電極線１５が取り出され
ているため、エミッタ電極である第１の電極板１３との
絶縁を計る上で溝が施されている。また、上記第１の電
極板１３の中央部には例えば、セラミック、エポキシ樹
脂、ゴム等の絶縁物２０を介して半導体本体１１上面の
ドライブ側金属電極層上に載置させ銅冷却体で一緒に圧
接する構造となっている。FIG. 3 is a semiconductor device according to an embodiment of the present invention, and is a sectional view showing a high-power Darlington transistor in which a base electrode is taken out from the center. In the same figure, the first
The same number should be given to the same name as the figure or Figure 2.
Rub. In addition, in the semiconductor device shown in the figure, the second electrode plate 14 on the collector surface of the semiconductor body 11 is not soldered, but is pressed against an electrode plate that is slidably placed on both sides of the semiconductor body 11. It has a structure. In addition, in the Darlington transistor as shown in Fig. 3,
The emitter electrode is taken out from the main side, and the first electrode plate 13 facing the drive side from which the emitter electrode is not taken out has a donut-shaped shape with a hollow center. In addition, since the base lead electrode wire 15 is taken out from the center of the copper cooling electrode body disposed on the upper surface of the first electrode plate 13, it is necessary to insulate it from the first electrode plate 13, which is the emitter electrode. It has grooves. Furthermore, the first electrode plate 13 is placed on the drive-side metal electrode layer on the upper surface of the semiconductor body 11 via an insulating material 20 such as ceramic, epoxy resin, or rubber, and held together by a copper cooling body at the center of the first electrode plate 13. The structure is such that it comes into pressure contact with the

上記したような構造であれば、半導体本体１１の上面全
面が圧接され且つベース電極とエミッタ電極は各々絶縁
されて圧接取り出される構造となり、コレクタ面の第２
の電極板１４と半導体本体１１の接触は良好となり、熱
抵抗も良くなり、破壊耐量が向上する素子を提供するこ
とができる。With the above structure, the entire upper surface of the semiconductor body 11 is pressed, and the base electrode and the emitter electrode are each insulated and taken out by pressure contact, and the second electrode on the collector surface
The contact between the electrode plate 14 and the semiconductor body 11 is improved, the thermal resistance is also improved, and an element with improved breakdown resistance can be provided.

第４図はこの発明の他の実施例を示す半導体装置の断面
図である。同図に示すように、この半導体装置において
はベース電極の取り出しが外周よりなる様に設計された
トランジスタである。そして、メイン側トランジスタが
半導体本体１１の半面又は中央よりなる構造のもので。FIG. 4 is a sectional view of a semiconductor device showing another embodiment of the invention. As shown in the figure, this semiconductor device is a transistor designed so that the base electrode is taken out from the outer periphery. The main transistor has a structure in which the main side transistor is formed on one half or the center of the semiconductor body 11.

圧接方法は第３図の場合と同様である。The pressure welding method is the same as that shown in FIG.

次に、第５図を用いてこの発明の他の実施例を説明する
。第５図に示すように半導体本体１ノの反りを防止する
ために絶縁物２０及びばね２１により半導体本体１１を
押えている。Next, another embodiment of the present invention will be described using FIG. As shown in FIG. 5, the semiconductor body 11 is held down by an insulator 20 and a spring 21 to prevent the semiconductor body 1 from warping.

なお、上記した実施例においては圧接構造の大電力用ダ
ーリントントランジスタで説明したが、他の圧接構造を
有する大電力用サイリスタ等にも適用できる事はいうま
でもない。Although the above-described embodiments have been explained using a high-power Darlington transistor with a press-contact structure, it goes without saying that the present invention can also be applied to high-power thyristors having other press-contact structures.

〔発明の効果〕〔Effect of the invention〕

以上詳述したようにこの発明によれば、半導体本体両面
が可滑動的に載置される電極板を介して圧接する構造に
おいて、半導体本体が電極板に均一に接触される様な構
造にしたので、半As detailed above, according to the present invention, in a structure in which both sides of a semiconductor body are pressure-contacted via an electrode plate that is slidably and dynamically placed, the structure is such that the semiconductor body is in uniform contact with the electrode plate. So, half

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来の半導体装置を示す図、第２図は従来の半
導体装置における半導体本体１１の反りを示す図、第３
図はこ１の発明の一実施例におりる半導体装置を示す図
、第４図及び第５図はそれぞれこの発明の他の実施例を
示す図である。 １ノ・・・半導体本体、１３・・・第１の電極板、１４
・・・第２の電極板、１５・・・ベースリード線。 ２０・・・絶縁物。FIG. 1 is a diagram showing a conventional semiconductor device, FIG. 2 is a diagram showing warpage of the semiconductor body 11 in the conventional semiconductor device, and FIG.
This figure shows a semiconductor device according to one embodiment of the invention, and FIGS. 4 and 5 show other embodiments of the invention, respectively. 1 No. Semiconductor body, 13... First electrode plate, 14
...Second electrode plate, 15...Base lead wire. 20...Insulator.

Claims (2)

【特許請求の範囲】[Claims] （１）半導体本体−面に形成される金属電極層と。 」二組金属電極層に可滑動的に載置される第１の電極板
と、上記第１の電極板の空間１−に載置される絶縁物と
、上記半導体本体の他方面ｔこ可滑動的に接触する第２
の電極板を介して上記半導体水゛体とを圧接する冷却電
極体とを具備したことを特徴とする半導体装置。(1) A metal electrode layer formed on the semiconductor body-plane. A first electrode plate that is slidably placed on the two sets of metal electrode layers, an insulator that is placed in the space 1 of the first electrode plate, and the other surface of the semiconductor body the second in sliding contact
A semiconductor device comprising: a cooling electrode body that is in pressure contact with the semiconductor water body through an electrode plate. （２）上記絶縁物をばね材を介して圧接するようにした
ことを特徴とする特許請求の範囲第１項記載の半導体装
置。(2) The semiconductor device according to claim 1, wherein the insulator is pressed into contact with a spring material.
JP18861082A 1982-10-27 1982-10-27 Semiconductor device Pending JPS5978539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18861082A JPS5978539A (en) 1982-10-27 1982-10-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18861082A JPS5978539A (en) 1982-10-27 1982-10-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5978539A true JPS5978539A (en) 1984-05-07

Family

ID=16226681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18861082A Pending JPS5978539A (en) 1982-10-27 1982-10-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5978539A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62216367A (en) * 1986-03-18 1987-09-22 Hitachi Ltd Pressure welding type semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62216367A (en) * 1986-03-18 1987-09-22 Hitachi Ltd Pressure welding type semiconductor device

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