JPS59764A - 複合計算機装置 - Google Patents

複合計算機装置

Info

Publication number
JPS59764A
JPS59764A JP11001482A JP11001482A JPS59764A JP S59764 A JPS59764 A JP S59764A JP 11001482 A JP11001482 A JP 11001482A JP 11001482 A JP11001482 A JP 11001482A JP S59764 A JPS59764 A JP S59764A
Authority
JP
Japan
Prior art keywords
processor
random access
access memory
data
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11001482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6252906B2 (enrdf_load_stackoverflow
Inventor
Yoichi Takagi
陽市 高木
Yutaka Kubo
裕 久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11001482A priority Critical patent/JPS59764A/ja
Publication of JPS59764A publication Critical patent/JPS59764A/ja
Publication of JPS6252906B2 publication Critical patent/JPS6252906B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/167Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Image Processing (AREA)
JP11001482A 1982-06-28 1982-06-28 複合計算機装置 Granted JPS59764A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11001482A JPS59764A (ja) 1982-06-28 1982-06-28 複合計算機装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11001482A JPS59764A (ja) 1982-06-28 1982-06-28 複合計算機装置

Publications (2)

Publication Number Publication Date
JPS59764A true JPS59764A (ja) 1984-01-05
JPS6252906B2 JPS6252906B2 (enrdf_load_stackoverflow) 1987-11-07

Family

ID=14524930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11001482A Granted JPS59764A (ja) 1982-06-28 1982-06-28 複合計算機装置

Country Status (1)

Country Link
JP (1) JPS59764A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155783A (ja) * 1984-08-27 1986-03-20 Matsushita Electric Ind Co Ltd 画像処理装置
JPS62166471A (ja) * 1986-01-20 1987-07-22 Mitsubishi Electric Corp 画像デ−タ並列処理方式
US5115026A (en) * 1985-04-05 1992-05-19 Ausimont S.P.A. Composite material based on a polymer matrix comprising fluoroelastomers or fluoroplastomer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155783A (ja) * 1984-08-27 1986-03-20 Matsushita Electric Ind Co Ltd 画像処理装置
US5115026A (en) * 1985-04-05 1992-05-19 Ausimont S.P.A. Composite material based on a polymer matrix comprising fluoroelastomers or fluoroplastomer
JPS62166471A (ja) * 1986-01-20 1987-07-22 Mitsubishi Electric Corp 画像デ−タ並列処理方式

Also Published As

Publication number Publication date
JPS6252906B2 (enrdf_load_stackoverflow) 1987-11-07

Similar Documents

Publication Publication Date Title
KR970004514B1 (ko) 고장 허용 멀티프로세서 컴퓨터 시스템
US7941698B1 (en) Selective availability in processor systems
US5384906A (en) Method and apparatus for synchronizing a plurality of processors
US5388242A (en) Multiprocessor system with each processor executing the same instruction sequence and hierarchical memory providing on demand page swapping
US5890003A (en) Interrupts between asynchronously operating CPUs in fault tolerant computer system
US7574581B2 (en) Cross-chip communication mechanism in distributed node topology to access free-running scan registers in clock-controlled components
JPS60100253A (ja) メモリ−システム
US8037350B1 (en) Altering a degree of redundancy used during execution of an application
US7987398B2 (en) Reconfigurable device
JPH02202638A (ja) 多重プロセッサを備えたフォールトトレラントなコンピュータシステム
EP0380845B1 (en) An interface between a system control unit and a service processing unit of a digital computer
JPH01154241A (ja) 同期二重コンピュータシステム
JPH01154240A (ja) 単一レールインターフェイスにエラーチェック機能を有する二重レールプロセッサ
CN107636630B (zh) 中断控制器
CN101317160A (zh) 软件辅助的嵌套硬件事务
EP0348704B1 (en) Apparatus and method for simultaneously presenting error interrupt and error data to a support processor
US20210109762A1 (en) Multi-die and multi-core computing platform and booting method for the same
JPH0690682B2 (ja) マルチプロセツサシステムの障害処理方式
US20080148095A1 (en) Automated memory recovery in a zero copy messaging system
CN113535494B (zh) 一种设备调试的方法及电子设备
JPS59764A (ja) 複合計算機装置
US20050125695A1 (en) Non-inline transaction error correction
KR20170050102A (ko) 데이터 처리 장치
JPS6149713B2 (enrdf_load_stackoverflow)
US12242335B2 (en) Method and apparatus for fault aggregation and support for virtualization