JPS5975627A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain the semiconductor device with an accurate pattern by improving accuracy on the positioning of a drawing or displacing the drawing with high accuracy only by desired size by a first photoetching process using a first mask with a base line equally divided into an even number and a second photoetching process executed while overlapping an etching image formed through said process and a base line equally divided into an odd number of a second mask. CONSTITUTION:Each base line crosses at right angles, and both have the same line length. Scales equally divided into (n) are formed to the base line 11 of the mask used in the pre-process, and scales equally divided into n+1 are formed to the base line 12 of the mask used in the post-process. In the scales such as scales, which are equally divided into forty and forty-one and shown in the figure, one scale is each 0.5mum and 20/41mum when base line length is made to be 20mum. When two base lines are overlapped, the end section of the etching image 11' of the base line formed by the pre- process and the end section of the base line 12 of the mask used in the next process are aligned. The positioning displacement of overlaps can be controlled within an allowable range by reading positions where the scales formed to the base lines agree. Two base lines can be displaced only by desired size by displacing them only by scale sections corresponding to a desired distance when they are displaced intentionally.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a photoetching method.

Conventionally, in the fabrication of semiconductor devices, a photoetching process is repeated many times. Photo-etching is performed by aligning a mask in the next process with the etched image formed on the semiconductor wafer in the previous process, but the alignment accuracy at that time is a problem.

In order to improve alignment accuracy, the mask is provided with alignment figures.

FIGS. 1A to 1C are plan views for explaining alignment in a conventional optical etching process.

A pattern 1 as shown in FIG. 1(a) is provided on the mask used in the photolithography process, and this pattern is formed as an etched image on the semiconductor wafer in the photolithography process. A pattern 2 shown in FIG. 1(b) is provided on a mask used in the subsequent photoetching process. In the subsequent photoetching process, alignment is performed by overlapping the pattern 2 of the mask on the etched image 1' already formed on the semiconductor wafer as shown in FIG. 1(C). It will be done. The accuracy of this overlay, the so-called blinding accuracy, largely depends on the sense and skill level of the operator, resulting in the problem of quality variations. When the magnification of the microscope is 150 times, +1 is 0.5 to 0.71 tm, and when the magnification of the microscope is 300 times,
Although tl is 0.3 to 0.5 μm, it is often greater than this. In addition, there are times when you want to intentionally shift the shapes by a certain distance and overlap them, but with the shapes shown in Section 11, 1(a) and (b), it is possible to shift the positions by the desired dimension. The disadvantage is that it is extremely difficult to do so.

The present invention eliminates the above-mentioned drawbacks and makes it possible to precisely overlap the figures in the previous process and the drawings in the subsequent process and to shift them by a desired dimension when aligning the figures in two or more optical etching processes. The present invention provides a method for manufacturing semiconductor devices ft, t that includes a photoetching process.

In the method for manufacturing a semiconductor device of the present invention, a predetermined line length is set to n (n is an integer of 2 or more)'? A semiconductor wafer is etched using a first mask for optical etching having a reference line 4 with a scale divided into two parts.
A first optical etching step for forming an etching gap in the above, and a reference line having a scale having the same line length as the reference line divided by n (n is an integer of 2 or more) t.f. Using a second mask, the etched image of the reference line formed in the first photoetching step and the scale of the reference line provided on the second mask are overlapped, and exposure is performed and development is performed. and a second optical etching step.

Next, the present invention will be explained using the drawings.

FIGS. 2(a) and 2(b) are plan views of an example of a reference line used in the present invention.

The reference line shown in FIG. 2(a) is the reference line provided on the mask used in the previous photolithography process, and the reference line shown in FIG. 2(b) is the reference line provided on the mask used in the subsequent photolithography process. This is an example of a line. Each reference line is orthogonal and both have the same line length. The reference line 11 of the mask used in the previous step is marked with a scale of 14 minutes, and the reference line 12 of the mask used in the subsequent step is marked with a scale of (n+1) equal parts. Figure 2<8)
shows an example of a scale divided into 40 equal parts, and Fig. 2(b) shows an example of a scale divided into 41 equal parts. If the reference line length is 207L711, one scale is 0.5 μm and 20741 μm, respectively.0 Figures 3 (a) and (b) are obtained by aligning the reference lines shown in Figures 2 (a) and (b). FIG.

Figure 3(a) shows that when two reference lines are superimposed, the third
Figure (b) shows the case where the two reference lines are intentionally shifted. In the case of FIG. 3(a), the end of the etched image 11' of the reference line formed in the previous step is aligned with the end of the reference line 12 of the mask used in the next step. Then, by reading the points where the scales provided on the reference line coincide with each other, it is possible to control the overlapping positional deviation within an allowable range. In the case of FIG. 3(b), it is possible to shift by a desired dimension by shifting off the scale corresponding to a desired distance.

FIGS. 4(a) and 4(b) are plan views of other examples of reference lines used in the present invention.

Even if the reference lines 21 and 22 are made orthogonal at the center, the same effect as shown in FIGS. 2(a) and 2(b) can be obtained.

As described above in detail, according to the present invention, the optical etching process 8. , it is possible to improve the accuracy of alignment of shapes and shift the desired dimension with high accuracy,
This is highly effective because semiconductors and devices with accurate patterns can be manufactured.

[Brief explanation of the drawing]

FIGS. 1(a) to (C) are plan views for explaining alignment in a conventional optical etching process, and FIGS. 2(a) and (b) are plan views of an example of reference lines used in the present invention. , Figure 3(a),
(b) is a plan view when the reference lines shown in Fig. 2 (a) and (b) are superimposed and shifted, and Fig. 4 (a)
, (b) is a plan view of another example of the reference line used in the present invention. 1.11... Alignment figure, 1', 11'...
...Photo-etched image, 2,12... Alignment figure, 2
1. 22...Reference line. Figure 1 No. 3 (Q)
L bノ￥；4 figure

Claims (1)

[Claims] A first photoetching process in which an etched image is formed on a semiconductor wafer using a first mask for photoetching that has a reference line provided with a scale that divides a predetermined line length into n equal parts (n is an integer of 2 or more). engraving process, and the first optical etching using a mask of engraving 2 for optical etching, which has a reference line with a scale that divides the same line length as the reference line into equal parts n+x (n is an integer of 2 or more). The method is characterized by including a second optical etching step in which the etched image of the reference line formed in the step and the scale of the reference line provided on the second mask are overlapped, exposed to light, and developed. A method for manufacturing a semiconductor device.