JPS5971559A - Signal arbitorating device - Google Patents

Abstract

PURPOSE:To allow a processor making the highest request to use a resource, by increasing the pulse frequency given to a counter circuit of each processor and processing the pulse, every time there comes request of use of the information resource from plural processors. CONSTITUTION:When the processors PC100-N00 make the request of use of the information resource asynchronizingly, a resource request signal is transmitted to individual control sections 130-N30 and a pulse of an oscillating circuit 30 is applied to counter circuits 110-N10. A common control section 20 operates a maximum value detecting circuit 10 at the same time, the circuit 10 detects the highest pulse number from the circuits 110-N10, gives the value to comparison circuits 120-N20 so as to compare this value with the value from the circuits 110-N10. A coincidence signal is given to one of the individual control section 130-N30 from the comparison circuits among the circuits 120-N20, where the both are coincident signal, and a resource use allowing signal is given from its control section to the processor.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing system, and particularly relates to a signal source in which signals are generated asynchronously from a plurality of mutually independent signal sources competing for the same information resource. Give priority to the signal source that outputs the most signals,
The invention relates to a signal arbiter having the function of sequentially transmitting each signal to the relevant information resource and transmitting a response signal from the information resource to the relevant signal source.

In a parallel information processing system, a plurality of processors that operate completely independently of each other share and use information resources such as memory and equipment. As a result, there are situations in which two or more processors request the use of one information resource, resulting in collisions of request signals.

Particularly in systems that have grown larger in recent years, such situations are often seen everywhere, and resource allocation has become one of the most important issues in order to improve system efficiency. Conventional methods of this type include polling methods or daisy chain methods that give specific priority to each processor, and interlock methods that grant first use to the processor that made the earliest request. The effectiveness of the effect has been confirmed.

The purpose of the present invention is to investigate the number of past occurrences of each signal, so-called past history, when a plurality of request signals are generated in competition with each other asynchronously as described above, and select the signal that generated the earliest and most signals. The object of the present invention is to provide an algorithm using simple hardware to process the requests of each signal source by giving a resource usage recognition signal to the source.

In a system in which a plurality of mutually independent processors asynchronously compete for the same information resource and obtain the same information resource, the signal arbitrator of the present invention provides a signal arbitrator whenever there is a request from the processor to use the information resource. means for increasing the frequency of pulses supplied to counting circuits arranged corresponding to each of the processors (C); and permission to use the information resource to a processor that indicates the maximum value among the plurality of counting circuits. and a means for giving.

The present invention will be explained in detail below using the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a time chart for explaining the embodiment.

First, an overview of the functions and operations of each block will be explained. 1st
In the figure, 100 to NOO represent processors.

It is assumed that the processors request resources (not shown) independently of each other and asynchronously. 30 is an oscillation circuit. The oscillation circuit 30 emits a plurality of clock signals of different frequencies, and these clock signals are transmitted to each individual control section 13.
0 to N30 to drive the counting circuits 110 to NIO. Counting circuits 110 to N10 receive and count the clock signals of the oscillation circuit 30 in response to the resource request signals of the processors 100 to NOO.

The maximum value detection circuit 10 detects the maximum value from among the values indicated by the counting circuit 110 to NIO.
The output value of 0 is transmitted to comparison circuits 120 to N20 and compared with the values of counting circuits 110 to NIO.

Therefore, the right to use the resource is given to the processor connected to the counting circuit whose value matches the value of the maximum value detection circuit 10. In other words, the processor that has requested the most resources obtains permission to use the resource. When the 0 individual control units 130 to N30 receive the resource request signals from the processors 100 to NOO, the clock signal of the oscillation circuit 30 is set to a higher level. The function selects a frequency clock and supplies it to the counting circuit 110 to NIO, and when the value sent from the maximum value detection circuit 10 and the value of the counting circuit 110 to NIO match, the counting circuit is reset and resources are sent to the corresponding processor. It has a function of sending permission signals and transmitting resource request signals to the common control unit 20 via the resource request line 40.

When the common control unit 20 receives the resource request signal transmitted from each of the individual control units 130 to N30, the common control unit 20 activates the maximum value detection circuit 10.
, or instructs individual control units 130 to N30 to operate counting circuits 110 to N10.

Next, the actual operation will be explained.

For ease of explanation, three processors (processor 1
00. Processor 200. A case will be explained in which the processor 300) requests one resource independently. Suppose now that processor 100 makes a resource request for the first time. When processor ioo makes a resource request, the resource request signal is sent to the individual control unit 1.
30 and the clock 1 of the oscillation circuit 30 is supplied to the counting circuit 110. In this case, since no resource requests are made from the processors 200 and 300, the common control unit 20 operates the maximum value detection circuit 10. The maximum value detection circuit 10 detects a value indicating the maximum value among the counting circuit 110, the counting circuit 210, and the counting circuit 310. The maximum value detection circuit 10 transfers the value indicated by the counting circuit 110 to each comparison circuit 120, 220°, 320. Each comparison circuit 12
At 0.220°230, it is compared with the value of the counting circuit 110°210.310 corresponding to the comparison circuit, and the comparison circuit 1
A coincidence signal is obtained at 20. It is output from the comparison circuit 120. The coincidence signal is transmitted to the individual controller 130, and the individual controller 130 sends a resource grant signal to the processor 100. When the comparison operation is completed, the common control unit 20 instructs the individual control units 130, 230, and 330 to start counting. When the processor 100 is granted permission to use the resource, the individual control unit 130 transmits a resource request signal to the common control unit 20, and the resource is used. The common control unit 20 continues to send the resource grant signal only to the processor 100 while the resource request signal is being sent from the processor 100.

During this time, the counting circuits 210 and 310 are connected to the processor 200.
and a state in which the resource request signals of the processor 300 can be counted sequentially. When the use of the processor 100 is finished, the transmission of the resource request signal sent from the processor 100 to the common control unit 20 stops, and accordingly, the resource permission signal sent from the common control unit 20 to the processor 100 stops, and the maximum The value detection circuit 10 starts operating.

Processor 100 is currently using resources, 7'o-+ = processor 2
Assume that resource requests are made from the processor 00 and the processor 300 at the timing shown in FIG.

1 in FIG. 2 is a resource grant signal to the processor 100;
2 is a resource request signal from the processor 200, and 3 and 4 are resource request signals from the processor 300.

The counting circuit 210 of the processor 200 counts with the clock 1 based on the resource request signal 2 outputted from the processor 200.

Further, the counting circuit 310 of the processor 300 is counted by the clock 1 according to the resource request signal 3 outputted from the processor 300, and further, the counting circuit 310 of the processor 300 is counted by the resource request signal 4.
The zero counting circuit 310 counts with clock 2.

Note that the relationship between clock 1 and clock 2 is as follows:
frequency <frequency of clock 2. Therefore, while the resource grant signal is given to the processor 100, the counting circuit 210 of the processor 200 counts by the frequency x(t, +-t2) of the clock 1, and the counting circuit 310 of the processor 300 counts the frequency x(t, +-t2) of the clock 1. 1 frequency X(t8-t,)+clock 2 frequency x(t4-ts) is counted.

Now, set the frequency of clock 1 to 5Hz, the frequency of clock 2 to 10Hz, tl, t! + If t3 and t4 are 1 second, 2 seconds, 3 seconds, and 4 seconds, respectively, counting circuit 210 counts by 1o, while counting circuit 310 counts by 2o.
Count only 0. Therefore, the maximum detection circuit 10 grants permission to the processor 300 corresponding to the counting circuit 310 to use the resource.

The details of the operation using three processors have been described above, but the same applies to the case where N processors are used. In this embodiment, the counting circuit of the processor that has been given permission to use resources is reset to give it the lowest priority, but it is easy to reduce the counting circuit of the processor that has been given permission to use resources by a certain number. Conceivable.

In this way, when use request signals are generated asynchronously toward the same information resource from a plurality of mutually independent signal sources, the signal source that has generated many use request signals is It provides a signal arbiter for granting permission to use resources, and is extremely effective in practical use.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the signal arbitrator of the present invention, and FIG. 2 is a time chart for explaining the above embodiment.

Claims (1)

[Claims] In a system in which a plurality of mutually independent processors asynchronously compete for the same information resource and acquire the information resource, each time the processor 75 makes a request to use the information resource, means for increasing the frequency of pulses supplied to a counting circuit disposed corresponding to the processor, and granting permission to use the information resource to the processor that exhibits the maximum value among the counting circuits of the previous n-self-duplication; A signal arbitrator comprising: means.