JPS5970193A - Controller for motor by width modulation pulse - Google Patents
Controller for motor by width modulation pulseInfo
- Publication number
- JPS5970193A JPS5970193A JP57178578A JP17857882A JPS5970193A JP S5970193 A JPS5970193 A JP S5970193A JP 57178578 A JP57178578 A JP 57178578A JP 17857882 A JP17857882 A JP 17857882A JP S5970193 A JPS5970193 A JP S5970193A
- Authority
- JP
- Japan
- Prior art keywords
- pulse
- signal
- output
- motor
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/06—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current
- H02P7/18—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power
- H02P7/24—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices
- H02P7/28—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
- H02P7/285—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only
- H02P7/29—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation
- H02P7/2913—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices controlling armature supply only using pulse modulation whereby the speed is regulated by measuring the motor speed and comparing it with a given physical value
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Direct Current Motors (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、速度指令を、eルス幅化しこれに速度電流の
アナログの帰還信号をノ?ルス幅データとして重畳しこ
の信号によシ終段の電力増幅器を駆動する幅変調パルス
による電動機の制御装置に関する0
従来装置の構成の概要全売す路線図を第1図に表わす8
1はn bitのディジタルな速度指令を出す速度指令
器、2はディ・ジタル佃号をアナログ信号へ変換するD
/A変換器、3はアナログの速度指令、4は負荷電動機
からの電流フィード・々ツク、5は演算増幅器、6は三
角波発振器、7は比較器、8は幅変調パルス、9はたと
えばトランジスタブリッジからなる電力増幅器、10は
負荷の電動機である。DETAILED DESCRIPTION OF THE INVENTION The present invention converts the speed command into an e-pulse width and inputs an analog feedback signal of the speed current to this. 8 1 is n A speed command device that issues a bit digital speed command, 2 is a D that converts the digital speed command into an analog signal.
/A converter, 3 is an analog speed command, 4 is a current feed from the load motor, 5 is an operational amplifier, 6 is a triangular wave oscillator, 7 is a comparator, 8 is a width modulation pulse, 9 is, for example, a transistor bridge 10 is a load motor.
これは、アナログ電圧の速度指令3と速度電流のアナロ
グフィードバック信号4を、演算増幅器5を用いて演算
を行ない、比較器7を介して三角波との比較によりパル
ス幅を変化させて、終段のトランジスタ、9の・駆動信
号を求めており、これは、eルス幅変調(PWM)方式
のトランジスタ駆動回路として知られ、この回路に指令
を与える上位システムは通常ディジタル回路で作成され
、ディ、ジタルの速度指令をD/A変換器2を使ってア
ナログ電圧信号3として出力される。This uses an operational amplifier 5 to calculate the speed command 3 of the analog voltage and the analog feedback signal 4 of the speed current, and changes the pulse width by comparing it with a triangular wave via the comparator 7. This is known as an e-pulse width modulation (PWM) type transistor drive circuit. The speed command is output as an analog voltage signal 3 using a D/A converter 2.
ところで、このD/A変換器2は機能的に不良になるこ
とが多く、信頼性の面からも、がっはコストの面からも
難点があった。By the way, this D/A converter 2 often becomes functionally defective, and is problematic from both a reliability and a cost perspective.
また、今までにディジタル化の方式は考えられたが、ア
ナログフィードバック信号をA/D変換し、ビットデー
タとして演nを行なっており、結果としてはシステム、
部品点数、コストの増大につながシ実用的には無理があ
った。Furthermore, although digitization methods have been considered up to now, analog feedback signals are A/D converted and processed as bit data, resulting in system,
This led to an increase in the number of parts and costs, making it impractical.
ここにおいて本発明は、従来装2置の欠陥を克服し、演
算デ°−夕をパルス幅とし/(ルス幅単位の演算を可能
としており、速度指令をディジタルのままで演算して/
ξルス幅変調を行ないトランジスタ駆動回路を制御する
ようにした装置を提供するとと゛を、その目的とする。Here, the present invention overcomes the deficiencies of the two conventional devices and makes it possible to perform calculations in units of pulse width as the calculation data, and calculates the speed command as it is digitally.
It is an object of the present invention to provide a device for controlling a transistor drive circuit by performing ξ pulse width modulation.
第2図は、本発明の一実施例の構成の需要を示すブロッ
ク図である。FIG. 2 is a block diagram showing the requirements of the configuration of one embodiment of the present invention.
21はパルス幅変換回路、22は速度指令がパルス幅に
変換されたデータ、23は同期PWM回路、24はその
演算用、力、25は排他論理和回路、局はPWMされた
制御信号出力である。21 is a pulse width conversion circuit, 22 is data obtained by converting a speed command into a pulse width, 23 is a synchronous PWM circuit, 24 is for its calculation, power, 25 is an exclusive OR circuit, and the station is a PWM control signal output. be.
本発明は、ディジタルの速度指令を)ξルス幅のデータ
22に変調した後に、ノにルス幅に変調された電流・速
度のフィードバック信号24を排他□論理和回路5で重
畳し、終段のトランジスタ9のドライブ信号26を得る
ようにしである。In the present invention, after modulating a digital speed command into data 22 of ξ pulse width, the current/velocity feedback signal 24 modulated to ξ pulse width is superimposed in an exclusive □OR circuit 5. This is to obtain a drive signal 26 for the transistor 9.
では、各部の詳細について述べる。Now, we will explain the details of each part.
n bit−の速度指令はパルス幅変換回路21へ入力
し、第3図に表わすように入力し、たn bitの数値
はパルス幅デユーティに従ったパルス幅のデータ22に
変換される。The n-bit speed command is input to the pulse width conversion circuit 21 as shown in FIG. 3, and the n-bit value is converted into pulse width data 22 according to the pulse width duty.
n == s btt とすると、
10進、fO(16進で00H)はデユティ50%、1
0進で+127(16進で7. F H)はデユティ7
5%、
10進で−128(16進で80H)はデユティ25%
、
の、eルス幅に変換されたデータ22(指令・にルス)
が得られる。If n == s btt, decimal, fO (00H in hexadecimal) is duty 50%, 1
+127 in 0 base (7.F H in hexadecimal) is duty 7
5%, -128 in decimal (80H in hexadecimal) is duty 25%
, data 22 converted to e-rus width (command/ni-rus)
is obtained.
この指令パルスηはゲートをなす排他的論理和回路5と
、同期PWM回路に入力される。This command pulse η is input to an exclusive OR circuit 5 forming a gate and a synchronous PWM circuit.
同期PWM回路の構成を示すブロック図を第4図に表わ
す。A block diagram showing the configuration of the synchronous PWM circuit is shown in FIG.
241は同期ノコギリ波発生回路(2411,2412
はその出力) 、242 、243は演算増幅器(両者
でコンパレータをなす)、244はインノζ−タ、24
5 、246 、247はナンド (これらでマルチプ
レクサ−を形成し2470はその出力層である1、第5
図は、前記ノコギリ波発生回路の内部詳細ブロック図で
ある。241 is a synchronous sawtooth wave generation circuit (2411, 2412
is its output), 242 and 243 are operational amplifiers (both form a comparator), 244 is an inverter, and 24
5, 246, and 247 are NAND (these form a multiplexer, and 2470 is its output layer 1, 5
The figure is a detailed internal block diagram of the sawtooth wave generation circuit.
501 、503はアナログスイッチ(その出力により
接点501a 、 503aをオンさせる)、502は
インノ々−タ、504 、505 、506は演算増幅
器、507゜509 、510は抵抗、508,512
はコンデンサ、■□、は発生するノコギリ波の基準電圧
、Ovは零電位である。501 and 503 are analog switches (their output turns on contacts 501a and 503a), 502 is an inverter, 504, 505, and 506 are operational amplifiers, 507°, 509, and 510 are resistors, and 508, 512
is a capacitor, ■□ is a reference voltage of the generated sawtooth wave, and Ov is a zero potential.
そして、各種信号の波形図を負荷電動機の正転から逆転
にわたって第6図に示す。FIG. 6 shows waveform diagrams of various signals from normal rotation to reverse rotation of the load motor.
同期PWM回路24は同期ノコギリ波発生回路241と
コンノミレータ−ゲート回路よりなる。The synchronous PWM circuit 24 consists of a synchronous sawtooth wave generating circuit 241 and a connominator gate circuit.
そして、同期PWM回路別への入力指金・ξルスnは同
期ノコギリ波発生回路241へ入力される。Then, the input finger/ξ pulse n for each synchronous PWM circuit is input to the synchronous sawtooth wave generation circuit 241.
この出力は指令パルス22に同期した正方向の発振出力
A・2412と負方向の発振出力B・2411を得るこ
とがで、きる。This output can be achieved by obtaining a positive oscillation output A 2412 and a negative oscillation output B 2411 synchronized with the command pulse 22.
・り期ノコ、ギリ波発生回路241はスイッチ素子(ア
ナログスイッチ501 、503 )と精分器(゛演算
増幅器504 、506とコンデンサ5082.512
)の組合せで作成可能であり、積分器の積分コンデン
サ508 、512を指令ノξルス22で短絡すること
により発振出力は零になり、開放することにより積分を
行なう。これを繰返すことにより変形したノコギリ波発
振出力A・2411および発振出力B・2412が求め
られ、またノコモリ波基準電圧■RF、Fが正か負かに
キリ、発振出力A−Bが異なってくる。・The period saw and the gigi wave generation circuit 241 are composed of switching elements (analog switches 501 and 503), a separator (operational amplifiers 504 and 506, and capacitors 5082 and 512).
), the oscillation output becomes zero by shorting the integration capacitors 508 and 512 of the integrator with the command nolse 22, and integration is performed by opening them. By repeating this, the modified sawtooth wave oscillation output A・2411 and oscillation output B・2412 are obtained, and the sawtooth wave reference voltage RF and F are positive or negative, and the oscillation outputs A-B are different. .
負荷電動機10のモータ電流および速度発電機(図示し
又いない)により検出された速度フィーrノ々ツクは合
成され電流・速度フィー1パツク信号4となり、その値
が正のときは発振出力A・2411と負のときは発振出
力B・2412と比較される。The motor current of the load motor 10 and the speed fee R notch detected by the speed generator (not shown or not) are combined to form a current/speed fee pack signal 4, and when the value is positive, the oscillation output A. When 2411 is negative, it is compared with oscillation output B.2412.
第6図において、負のフィードバック信号4は発振出力
B・2412と比較され、コン・ξレータ242の出力
を得る。この出力は指令パルス22によるマルチプレク
サ−(ナン′ド245 、247 )を経て出力される
。In FIG. 6, the negative feedback signal 4 is compared with the oscillating output B 2412 to obtain the output of the converter ξ-lator 242. This output is output via a multiplexer (Nands 245, 247) based on the command pulse 22.
出力されたマルチプレクサー出力2470は排他論理和
ゲート5に入り、指令パルス22との重畳演算を行なう
ことにより、合成波26が求められる。The output multiplexer output 2470 enters the exclusive OR gate 5 and performs a superposition operation with the command pulse 22 to obtain a composite wave 26.
こ\でフィードパラ、1り信号4と合成波あの出力を見
ると、信号4のフィートノセック貴が増大するとマルチ
プレクサー出力2470は比例して増大し、指令)eル
ス22との排他論理和5での演算後、合成波26のデユ
ティが低下する。If we look at the feed para, 1 signal 4 and the output of the composite wave, we can see that when the signal 4's signal 4 increases in noise, the multiplexer output 2470 increases proportionally, and the exclusive OR with the command) e pulse 22. After the calculation in step 5, the duty of the composite wave 26 is reduced.
これは従来回路におけるPWMと同等であシ、以下トラ
ンジスタのペースドライブ回路(図示していない)に入
力することにより、指令から4−スドライブまでをディ
ジタル化したサーボドライブシステムが完成する。This is equivalent to PWM in a conventional circuit, and by inputting it to a transistor pace drive circuit (not shown), a servo drive system in which everything from commands to 4-speed drive is digitized is completed.
かくして、本発明によれば、電動機のサーボシステムか
らアナログ部を排除し、ダイレクトディジタルサーボへ
の道が開拓されたと言うべきであり、ディジタルな指令
ノξルスとフィードバック信号の演算がコスト的に有利
に行ガわれ、かつ演算の信頼性が向上する等資するとこ
が太きい。Thus, according to the present invention, it can be said that the analog part is eliminated from the motor servo system, and the path to direct digital servo has been opened, and the calculation of digital command pulses and feedback signals is cost-effective. This greatly contributes to improving the reliability of calculations.
第1図は従来装置の略糾図、第2図は本発明の一実施例
の構成を示すブロック図、第3図は指令パルスの数値に
対応するノξルス幅デユーティの特性図、第4図は同期
PWM回路の構成を表わすブロック図、第5図は同期ノ
コギリ波発生回路の内部の詳細を示す結線図、第6図は
この実施例における各部波形を表わすタイムチャー、ト
である。
1・・・速度指令器、2・・・D/Aコンノ々−タ、3
・・・速度指令のアナロ夛電圧信号、4・・・負荷電動
機の電電動機電流と電動機速度の合成された電流・速度
フィー゛トノ々ツク信号、5・・・演算増幅器、6・・
・三角波発振器、7・・・比較器、8・・・幅変調パル
ス、9・・・電力増幅器(トランジスタブリッジ回路)
、10・・・電動機(負荷)、21・・・)ぞルス幅変
換回路、22・・・速度指令がパルス幅に変換されたデ
ータ、n・・・同期PWM回路、24・・・同期PWM
回路の演算出力()ξルス幅に変調された電流・速度フ
ィードバック信号)6・・・排他物理和回路1.26・
・・PWMされた制御信号出力(ドライブ信号)、24
1・・・同期ノコギリ波発生回路、2411・・・その
発振出力A12412・・・その発振出力B 、 24
2 、243・・・演算増幅器、244・・・インノ々
−タ、245 、246 、247・・・ナンド、、
2470・・・マルチプレクサ−出力、501 、50
3・・・アナログスイッチ、501 a 、 503
a・・・その接点、502・・・”インノ々−タ、5σ
4 、505 、506・・・演算増幅器、507 、
509510 =−・抵抗、508 、512−:y
yデンサ、vRFF ”’ノコモリ波基準電圧、Ov・
・・零電位。FIG. 1 is a schematic diagram of a conventional device, FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 3 is a characteristic diagram of the ξ pulse width duty corresponding to the numerical value of the command pulse, and FIG. 5 is a block diagram showing the configuration of the synchronous PWM circuit, FIG. 5 is a wiring diagram showing internal details of the synchronous sawtooth wave generating circuit, and FIG. 6 is a time chart showing waveforms of various parts in this embodiment. 1...Speed command device, 2...D/A controller, 3
...Analog multiple voltage signal of speed command, 4.Current/speed feed note signal which is a composite of the motor current of the load motor and the motor speed, 5..Operation amplifier, 6..
・Triangular wave oscillator, 7... Comparator, 8... Width modulation pulse, 9... Power amplifier (transistor bridge circuit)
, 10... Electric motor (load), 21... Pulse width conversion circuit, 22... Data obtained by converting the speed command into pulse width, n... Synchronous PWM circuit, 24... Synchronous PWM
Calculated output of the circuit (current/speed feedback signal modulated to ξ pulse width) 6... Exclusive physical sum circuit 1.26.
... PWM control signal output (drive signal), 24
1... Synchronous sawtooth wave generation circuit, 2411... Its oscillation output A12412... Its oscillation output B, 24
2, 243... operational amplifier, 244... inverter, 245, 246, 247... Nando,
2470...Multiplexer output, 501, 50
3...Analog switch, 501a, 503
a...The contact point, 502..."In-no-ta, 5σ
4, 505, 506... operational amplifier, 507,
509510 =-・Resistance, 508, 512-:y
y capacitor, vRFF ``'Nokomoli wave reference voltage, Ov・
...Zero potential.
Claims (1)
された・ぞルスに応じて前記電動機を市11 伺1する
装置においそ、 2 指令パルスに同期した第1および第2ののこぎシ波
信号を8廃生する同期の、こぎり波発生1居路と、 前記第1・第20のこぎ9波信号をそれぞit前記フィ
ードバック信号と比較する第1・第2の比較器と、 前記指令、eルスと前記第1・第2の比較器の出力とか
ら前記フィートノセック信号の大きさに応じたパ゛ルス
幅をもつ信号を作るマルチプレクサと、 前記指令パルスと前記マルチプレクサの出力信号とを入
力する排他的論理和回路とを備え、この排他的論理和回
路の出力によって前記電動機を制御するようにしたこと
を特徴とする幅変調・ぞルスによる電動様の制御装置。[Claims] 1. A device for driving the electric motor in response to a width adjusted by a foot pulse signal from the electric motor; 2. First and second pulses synchronized with the command pulse; A synchronized sawtooth wave generation circuit that generates eight sawtooth wave signals, and first and second comparisons that compare the first and 20th sawtooth nine wave signals with the feedback signal, respectively. a multiplexer that generates a signal having a pulse width corresponding to the magnitude of the foot nosec signal from the command, the e-pulse, and the outputs of the first and second comparators; An electric motor-like control device using width modulation and ZORS, comprising an exclusive OR circuit that inputs an output signal of a multiplexer, and the motor is controlled by the output of the exclusive OR circuit. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57178578A JPS5970193A (en) | 1982-10-13 | 1982-10-13 | Controller for motor by width modulation pulse |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57178578A JPS5970193A (en) | 1982-10-13 | 1982-10-13 | Controller for motor by width modulation pulse |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5970193A true JPS5970193A (en) | 1984-04-20 |
JPS6329515B2 JPS6329515B2 (en) | 1988-06-14 |
Family
ID=16050918
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57178578A Granted JPS5970193A (en) | 1982-10-13 | 1982-10-13 | Controller for motor by width modulation pulse |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5970193A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61121787A (en) * | 1984-11-13 | 1986-06-09 | Chuo Denshi Kogyo Kk | Speed controller of motor |
JPS63302794A (en) * | 1987-05-30 | 1988-12-09 | Fujitsu Ltd | Motor current control |
JPH0196783U (en) * | 1987-12-17 | 1989-06-27 |
-
1982
- 1982-10-13 JP JP57178578A patent/JPS5970193A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61121787A (en) * | 1984-11-13 | 1986-06-09 | Chuo Denshi Kogyo Kk | Speed controller of motor |
JPS63302794A (en) * | 1987-05-30 | 1988-12-09 | Fujitsu Ltd | Motor current control |
JPH0196783U (en) * | 1987-12-17 | 1989-06-27 | ||
JPH0723033Y2 (en) * | 1987-12-17 | 1995-05-24 | ナイルス部品株式会社 | Duty ratio controller |
Also Published As
Publication number | Publication date |
---|---|
JPS6329515B2 (en) | 1988-06-14 |
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