JPS5966262A - Raster phase synchronism circuit of laser beam printer - Google Patents

Abstract

PURPOSE:To obtain a phase synchronism circuit of a noise-resistant laser beam printer, by generating a print start timing signal by digital latches connected in cascade driven by a high frequency clock being an integral multiple of a basic clock. CONSTITUTION:An output of an oscillator oscillating a high frequency clock being an integral multiple of a basic clock frequency fs is inputted to the digital latches 24-26 and a frequency division counter 21. An analog signal BDT from a raster phase synchronism circuit 10 is inputted to the latch 26, where the signal is latched and ANDed 23 with the output of the latches 24-26, and its output is inputted to a video signal generator 11 as a write position synchronizing signal SYNC of the laser beam printer. A laser diode 2 is modulated with a video signal from the generator 11 and the laser beam from the diode 2 scans horizontally a photoreceptor drum 7 by means of a rotary polygon mirror 5. The laser beam is detected at a photo sensor 8, inputted to the circuit 10 to latch the signal BDT at the latches 24-26, noise is masked and the noise-resistant signal SYNC is obtained.

Description

[Detailed description of the invention] [Field of application of the invention].

The present invention relates to a raster phase synchronization circuit of a laser beam printer, and in particular, to a raster phase synchronization circuit of a laser beam printer in which the video signal generating flat film in the laser beam 7' link has noise resistance to prevent malfunction. It is related to circuits.

[Prior Art] First, FIG. 1 is a schematic basic configuration diagram of a laser beam printer, showing the operating principle of the laser beam printer.

In other words, a video signal from a video signal generator 11 associated with the signal generation stage is amplified by a video amplifier 1 and drives a laser diode 2 .

The laser emission beam modulated by the video signal is shaped by a coupling lens 3 and scans the scan 7 at a constant speed to form an image of print data on the drum surface.

The created image is transferred and printed onto plain paper printing paper by a xerographic process (not shown).

And from this modulation there was a transfer print. The configuration of tt is related to a printing means that prints on printing paper with a signal of a laser beam modulated by a video signal, and a scanner motor 4.tt. Polygon mirror 5. f
This is related to a deflecting means that scans the laser beam in the width direction (horizontal direction) of the printing paper indicated by the arrow in the drawing using a -θ lens 6, a rotary polygon mirror, or the like.

However, the video signal of such a laser beam printer is as shown in FIG. 2 which is an example of printed characters.
Horizontal direction scanning (raster) and photoconductor drum 0
synchronized with the vertical scanning of its drum rotation direction by rotation,
It is generated as dot information.

The timing of the video signal output start position for each raster is generally determined by detecting the writing start position in the horizontal scanning direction, that is, the amount of horizontal printing, and detecting that the laser beam has arrived at the start position, that is, the scanned laser beam An analog signal (13DT signal,
The raster phase synchronization circuit 10 is created based on the beam detection signal), and the circuit operates digitally.

It is common practice to digitally minimize positional deviations by using a clock several times the basic clock frequency used by the video signal generator 11 that operates the video signal.

The photosensitive drum 7 is equipped with a normal paper feeding mechanism that transports printing paper in a direction perpendicular to the horizontal scanning direction.

Here, FIG. 3 is a print example diagram showing printing examples when the writing timing of the horizontal scan matches correctly and when it does not match, and as an example, the character ("Li'
This is the case when J-'e is printed, (2L) is an example where the writing position of each raster is aligned, (b) is an example where the writing position of each raster is shifted, 1: The writing position f is shifted If this happens, normal printing will not be possible.

As described above, since the output from the photosensor 8 is a weak signal, it is susceptible to noise, and pulses may be applied to this signal from the conventional technology or the high voltage transformer used in the xerography process. This invention has drawbacks including the risk that the video signal generator 11 may malfunction and abnormal printing occurs when such noise is superimposed. □ Laser beam printer system system with noise resistance that prevents the video signal generation means from being made by mistake, even if a stray noise is superimposed on the output of the optical detection means that informs when the printing start position has been reached. Phase synchronization. Its purpose is to provide circuits.

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[Summary of the invention]

The configuration of the laser beam pre-retardation circuit according to the present invention includes a video signal generating means for generating data information to be printed, and a zero modulation circuit for the video signal. , a printing unit and stage for printing the Q signal as light and dark colors on the printing paper, a deflection means for scanning the laser beam in the width direction of the printing paper using a rotating polygon mirror, and the scanning/scanning means for scanning the laser beam in the width direction of the printing paper. a paper feed mechanism for conveying the printing paper in a direction perpendicular to the scanning direction; 1. A means for producing high-frequency radiation, which is an extremely large number of times the frequency of the laser device, which is composed of a laser device, which is produced by a laser device. A multi-stage cascade-coupled digital latch driven by this high-frequency clock; 1. 11. It consists of a frequency division counter that divides the high frequency clock into the basic clock frequency and a logic gate. , the print synchronization signal is input to the multi-stage cascade-coupled nine digital latch, and a timing signal for starting printing of the video signal generating means is generated by logical calculation of the outputs of each stage. In addition, there is a device configured to reset the frequency-divided clock and control the phase of the basic clock.

More specifically, an analog signal (BDT signal) that indicates that the laser beam is at a predetermined horizontal scanning position is
Digital latch and high power ANJ) circuit digitized by high frequency clock and connected in multi-stage cascade, NANDA
The ND circuit is designed to provide noise resistance by removing excess noise.

[Embodiments of the invention]

A laser beam related to this book! An example of Tetsu's Larter phase synchronization circuit will be explained below with reference to each figure, including Fig. 1.

First, Figure 4 shows 1. 5 shows a timing chart of each part in FIG. 4, and FIG.
In FIG. 4, 20 is the previous video signal generator 1.
n of the basic clock frequency supplied to 1 ('n is an integer value)
Regarding the means of generating high frequency - lock CP of twice the frequency □
oscillator (0'SC'1).

21 is the CK terminal input of the high frequency clock CP,
This is a frequency division counter that divides the basic clock frequency by □ and n, and outputs it to the Q terminal.The output from this Q terminal is supplied to the video signal generator 11 as the basic clock. 'Then, this □ frequency divider counter 21 has a clear input of the CL terminal at the Low level (logic +1o'') at the rising edge of the input of the high frequency clock C'P to the CK terminal. Then, the counter is cleared and starts counting again from 0.

22 is a three-person NAND circuit related to a logic gate, and only when all inputs are logic ``1'', the output □ becomes ``0'', and in other cases, it becomes ``1''. It is something.

23 is a three-man-operated AND circuit related to a logic 1 gate, and only when all inputs are logic ``l'', the output is ``1'', and 0'' in other cases □. “is”.
□ Further, 24 to 26 are digital latches ('I
) type), and when the clock input to the C- terminal rises, the state of the D terminal input is changed to the Q terminal output,
Still, the inverted signal kQ terminal outputs both the next C,
It is held until the input to the K terminal rises.

Incidentally, in the debug log signal related to the BDT bond 'iX printing synchronization signal, the 5YNC A word is a write position synchronization signal, which will be described later. □However, in the second embodiment, as explained above, the BDT signal related to the print synchronization signal is connected to the multi-stage cascade-coupled digital latch 26.
24, and the AND circuit 23 takes A'N'D't of the resulting outputs of each stage, and outputs the print start and stop synchronization signal which is the timing signal of the video signal generator 11. It is configured to generate the S''YNC signal of the signal, and the frequency division counter 2
1) is reset by a NAND circuit 22 to control the phase of the basic clock f. □ As already mentioned, FIG. 5 is a timing chart diagram of each part of the circuit of FIG. 4.

Now, photosensor 8 in Figure 1. Sensor amplifier 9
BD related to the print synchronization signal that informs that the horizontal scanning of the laser beam has reached the predetermined writing start position throughout the entire BD.
If the T signal (an analog signal input asynchronously to the high frequency clock CP, a vinyl detect signal) is input to the raster phase synchronization circuit 10, a cascade-coupled signal is input to the raster phase synchronization circuit 10. - The outputs of the total latches 26 to 24 are delayed by the time gain of Takaoka □ wave □ ri CP in order like (c, (a), (tsu)).Writing to the video signal generator 11 The 5YNC signal of the position synchronization signal is obtained by inputting the output 'AND' of the Q end floating terminal in these one-stage digital latches, and the output of the terminal (A), @) to the NAND circuit 22'', and outputting the BDT signal. is digitally differentiated by the high frequency □ri・tsuk CP, and the left signal ('C"l) - period width signal) is inverted ii) is the frequency division color □21's CI and R terminals. The video signal generating device 11 enters the clear input of
The phase of the basic clock f, is (power.

The phase of the output of (a) and ゛(two) is - as shown in the figure, so 1r1
As can be seen from the □ phase of the output of
The writing position of each rask is aligned in synchronization with the input of signal 4, and the phase error □P1 that occurs with digitization is 1.1 after the BDT signal is input. C,,P(W) will fit within the time range until the next rising edge.

The value of this phase error ΔP is calculated by inputting a high-frequency clock CP which is several times the basic clock to the clock input of the frequency division counter 21.
Should I use it? When the CP is 0 times f, the maximum value of the phase error ΔP is equal to 1/n basic clocks. FIG. 5 is a timing chart for low 8.

The 6th one shows the phase error. It is a diagram.

That is, Fig. 6 shows the upper and lower basic positions.

has a phase error ΔP in the Lth and /
, indicates the positional relationship of the +1st printed dot.

Now, consider the case where pulse-like noise is superimposed on the 131)T signal at the rising edge of the high frequency clock CP as shown in FIG.

In this case, the illustrated abnormal signal generator 1 corresponding to one clock worth of noise is applied to the output of the digital latch at each stage.
In the method where the 5YNC signal is the write position synchronization signal for 1, a 1 clock width pulse corresponding to the noise is
The video signal generation station 11 will operate erroneously by determining that it is the opening timing of the next last lid.

However, according to the circuit configuration of this embodiment, S of "2"
Since the A and N D outputs of the cascade-combined D, D, Tarlat, and C stages 24 to 26 are taken as the Y N and 'C signals, the abnormal pulse is removed as shown in Figure 5. , (S
This noise does not occur in the YNC signal and can be masked.

j had JKian ship lock f,. Frequency division to synchronize the phase shift of 2,.1 (7),!' !J terminal 0L
Digital latch 25 in each stage as input)
N, , , A, N related to the output of the Q terminal of ゜26 and the output of the Q terminal of the final stage digital latch 24
Since the output of the circuit 22 is used, the generated S Yj, N C
It is possible to mask noise as well as signals.

Next, FIG. 7 is a block diagram of a raster phase synchronization circuit of a laser vino printer according to another embodiment.

In the figure, 30 is a frequency division counter, and 31 is a large-power NANDAN.
D circuit~34 is a digital latch (D type), 35
is a multi-input AN'D circuit, and is not shown in the diagram.
For example, a plurality of digital latches are further coupled between the digital latches 32 and 33, and these digital latches, including the one shown, are coupled in cascade.

In other words, the circuit configuration of this example is an extension of the circuit configuration shown in FIG. In each embodiment, if the number of cascade-coupled one-stage latches is fm, then n-2) Even if noise of less than the clock width is superimposed on the DT signal, pulse-like noise will continue to occur at the rising edge of the clock CP. , (m-2) This is a raster phase synchronization circuit that does not affect the previous 5YNC signal even if it is input.

That is, to explain using what is shown in FIG. 5, the number of stages is rn.
= 3, and m-2 of high frequency clock CP = 1 of 1
Black? Even if noise of less than the width of B I) is superimposed on the L' times signal, or even if pulse-like noise is continuously inputted less than once in m72-1 at the rising edge of the clock CP, as shown in the figure. As such, it does not affect the 5YNC signal.

The effects of each of the above embodiments can be summarized as follows.

As mentioned above, if noise is included in Lester's write start position timing signal, it will cause printing errors and other fatal problems. However, according to each of the above-mentioned embodiments, digitally, the raster phase having noise resistance,
Laser: A light detection means (laser) that indicates when the horizontal scanning beam of light has arrived at a predetermined position.
Even if pulse-like noise is superimposed on the weak analog signal from the photo sensor 8), the video signal generator 11 can be prevented from malfunctioning.

Further, the circuit configuration thereof may be a simple configuration of multi-stage cascade coupling of digital latches, and the noise resistance characteristics can be easily enhanced by increasing the number of stages of coupling.

[Effects of the Invention] - According to the present invention, the video signal generation means is resistant to malfunction even if pulse-like noise is superimposed on the output of the mouse light detection means to notify that the laser beam has reached the horizontal printing start position. This invention provides a raster phase synchronization circuit for a laser beam printer that has noise characteristics, and can be said to be an invention that has a significant practical effect.

[Brief explanation of the drawing]

Figure 1 is a schematic basic configuration diagram of a laser beam printer.
Fig. 2 shows an example of the printing uniformity, and Fig. 3 shows an example of printing. ';5'',,s':t
", 1' Phase synchronization circuit configuration diagram, Figure 5 shows each part in Figure 4, tie branch Guchiard diagram, Figure 6 is a phase error diagram due to digital pins, Figure 7 shows other It is a configuration diagram of the sister phase synchronization circuit according to the embodiment. 1... Video amplifier, 2... Laser diode,
3 (5", -t -□ v7x, 739. Photoconductor Y51
-1g-7 1st sensor, 9...sensor amplifier,
10... Raster phase homomorphism circuit, 11... Video signal generator, 20... Oscillation t'fr," 21, 3
0-... Frequency division counter, 22... 3-manpower NA member n circuit, 23... 3-manpower AND circuit, 2゛4~26,3
゜～34---yii') l)> 5 pieces, 3□・
...Multi-input NANDAND circuit...Multi-input AND
□Circuit. Agent: Patent attorney Kosaku Fukuda (and one other person),':... ,′. −□ 1

Claims (1)

[Claims] 1. A video signal that generates data information to be printed. a generating means, a printing means for printing a laser beam signal modulated by the video signal on printing paper as color shading, and a rotating polygon mirror or the like to print the laser beam in the width direction of the printing paper. a deflection means for scanning the scanned laser beam; a light detection means for generating a print synchronization signal to notify that the scanned laser beam has arrived at a predetermined position; In a laser beam printer consisting of a paper feeding mechanism for conveying printing paper, means for generating a soaring/wave clock that is an integral multiple of the basic clock frequency to be supplied to the video signal generating means, and a means for generating a wave clock that is driven by the high frequency clock. It consists of digital latches cascade-coupled in multiple stages, a frequency dividing counter that divides the high-frequency clock thereof into the above-mentioned basic a clock frequency, and a logic gate, and converts the above-mentioned print synchronization signal into the digital latches of the multi-stage cascade-coupled The video signal generating means is configured so as to be inputted to a latch, and the resulting outputs of each stage are subjected to a logical operation to cause the video signal generating means to generate a timing signal for starting printing, and the frequency division counter is reset. A raster phase synchronization circuit for a laser beam printer, characterized in that it is configured to perform phase control of the basic clock. 2. An oscillator that generates a high-frequency □ clock having an integral multiple of the frequency related to the basic clock supplied to the video 1/signal generating device; 7.
A cascade-coupled digital signal that receives a print synchronization signal related to the analog signal from the first sender and is driven by a high-frequency clock from the epoch oscillator and outputs after being delayed by the time of the high-frequency clock. latches and the ANI of the outputs of the digital latches at each stage, and generates and outputs a write start position synchronization signal related to the print start timing signal to the video signal generator.
A high-frequency clock is input from the circuit and the oscillator, and each digital latch 9 at the previous stage in the cascade-coupled multi-stage digital latch is used as a clear input.
output,,! :, Since the output from the N A N 'D r@' path is inputted to the final stage digital and latch inversion output, it is basically a frequency division counter for synchronizing the phase of the ripple and lock. The raster phase synchronization circuit of a laser beam printer is designed to control the phase of the basic clock.