JPS5965437A - Manufacture of resin sealed type semiconductor device - Google Patents
Manufacture of resin sealed type semiconductor deviceInfo
- Publication number
- JPS5965437A JPS5965437A JP17595782A JP17595782A JPS5965437A JP S5965437 A JPS5965437 A JP S5965437A JP 17595782 A JP17595782 A JP 17595782A JP 17595782 A JP17595782 A JP 17595782A JP S5965437 A JPS5965437 A JP S5965437A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- mold
- external
- semiconductor device
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 34
- 239000011347 resin Substances 0.000 title claims abstract description 16
- 229920005989 resin Polymers 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000007789 sealing Methods 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 8
- 239000004575 stone Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 abstract description 8
- 229910052751 metal Inorganic materials 0.000 abstract description 8
- 238000010292 electrical insulation Methods 0.000 abstract description 5
- 230000002452 interceptive effect Effects 0.000 abstract 1
- 239000004519 grease Substances 0.000 description 7
- 230000017525 heat dissipation Effects 0.000 description 5
- 239000010445 mica Substances 0.000 description 3
- 229910052618 mica group Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000011900 installation process Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は例えば外部放熱板に密着させ取り付けて使用さ
れるに好適な樹脂封止型電力用半導体装置の製法に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a resin-sealed power semiconductor device suitable for use, for example, by being closely attached to an external heat sink.
パワートランジスタ、サイリスタ、パワーＩＣ等の樹脂
封止型電力用半導体装置は、第１図で示す一様に、半導
体素子１０発生する熱を外部へ効率よく放熱するために
、放熱板２が封止樹脂５の外ぺ露出しており、放熱板２
を外部放熱器と密着させ使用するのが一般的である。こ
の場合、効率的に熱を逃がすために、半導体素子１は銅
等熱伝導率のよい放熱板２に固定し、放熱板２の素子固
定面の反対面を外部放熱器と密着させる。従って、外部
放熱器も熱伝導率のよい安価なＡｔ等の金属が使われる
のが普通である。又、電力用半導体装置の放熱板２は、
該装置の外部電極の一つになっているため、外部放熱器
に熱だけを逃がしたい場合は、装置の放熱板と外部放熱
器の間にマイカ等絶縁板をはさむのが一般的な使い方で
ある。しかし、前述の如く、熱を効率よく逃がすために
、この絶縁板との密着をよくすることが肝心であり、一
般的には熱伝導のよいシリコングリースを：塗布し。In resin-encapsulated power semiconductor devices such as power transistors, thyristors, and power ICs, a heat sink 2 is sealed in order to efficiently radiate heat generated by a semiconductor element 10 to the outside, as shown in FIG. The outside of the resin 5 is exposed, and the heat sink 2
It is common to use it in close contact with an external heatsink. In this case, in order to efficiently dissipate heat, the semiconductor element 1 is fixed to a heat sink 2 having good thermal conductivity, such as copper, and the surface of the heat sink 2 opposite to the surface on which the element is fixed is brought into close contact with an external heat sink. Therefore, the external heat sink is usually made of an inexpensive metal such as At which has good thermal conductivity. Moreover, the heat sink 2 of the power semiconductor device is
Since it is one of the external electrodes of the device, if you want to release only heat to the external heatsink, the common usage is to insert an insulating plate such as mica between the device's heatsink and the external heatsink. be. However, as mentioned above, in order to dissipate heat efficiently, it is important to have good adhesion to this insulating plate, and generally silicone grease, which has good thermal conductivity, is applied.
半導体装置と絶縁板、絶縁板と外部放熱器を結合させる
。A semiconductor device and an insulating plate, and an insulating plate and an external heat sink are combined.
この様に、取り付は工数をかけ、グリースを塗布して取
シ付けても、半導体装置を取り付けるビスや押さえ治具
が不均一な押さえ方をすると、電力用半導体装置が傾い
たまま取り付けられ、素子の放熱にアンバランスが生ず
る欠点が生じる。さらに、グリースの塗布を均一にしな
いと、グリースに泡などが入り熱伝導の均一性を損なう
欠点がある。この様に、熱伝導を阻害する欠点をもった
電力用半導体装置は、その能カ一杯の負荷をかけた場合
、熱伝導の不具合に起因して素子の破壊に至る欠点があ
った。この欠点をなくすためには。In this way, even if the installation takes many man-hours and is applied with grease, if the screws or holding jig used to attach the semiconductor device are held down unevenly, the power semiconductor device may be installed at an angle. , there is a drawback that an imbalance occurs in the heat dissipation of the element. Furthermore, if the grease is not applied uniformly, bubbles may form in the grease, impairing the uniformity of heat conduction. As described above, power semiconductor devices that have the drawback of inhibiting heat conduction have the drawback that when a load is applied to their full capacity, the device may be destroyed due to the defect in heat conduction. In order to eliminate this drawback.
放熱板の半導体素子固定面とは反対の面を均一で薄い熱
伝導性のよい絶縁樹脂で稜い、半導体装置と一体化させ
た構造の電力用半導体装置を作ればよい。A power semiconductor device may be fabricated in which the surface of the heat sink opposite to the surface on which the semiconductor element is fixed is made of a uniform, thin insulating resin with good thermal conductivity and integrated with the semiconductor device.
一般に、電力用半導体装置は自己の発熱した熱を放熱板
を通して外部へ放熱する構造となっており、従って、放
熱板は錐等の熱伝導率のよい金属が用いられている。又
、外部リード部３も、他の外付は回路に半田付をして用
いることが多く、そのため、金属を用いる。従って、一
般的にはり一ド３．放熱板２は同一金属板を用いるのが
半導体装置を安価に作る製法であシ構造である。この様
に、同一金属材料で作られたリードフレームは初期には
所望する寸法、形状を有していても、半導体素子１をマ
ウントする工程やボ／ディ／グ工程等、熱を加えたり機
械的振動を加えたりする工程を経るごとに、リードと放
熱板にわずかのソリやタワミが部分的に生じるのが常で
ある。このようなソリやタワミの入ったリードフレーム
を樹脂封止した場合、一般の成形金型は圧入樹脂が外部
にもれないようリード部を密着させるだけの構造になっ
ているため、ソリ、タワミの生じた放熱板は封止用下金
型の内壁に接触することがしばしば起る。この場合得ら
れた半導体装置は放熱板が一部露出したシ、不均一の樹
脂層で覆われたシした半導体装置となり前述の不具合発
生の原因となる。In general, a power semiconductor device has a structure in which the heat generated by itself is radiated to the outside through a heat sink, and the heat sink is therefore made of a metal with good thermal conductivity, such as a cone. Further, the external lead part 3 is also often used by soldering other external parts to the circuit, and therefore metal is used. Therefore, in general, 3. The heat dissipation plate 2 has a structure in which the use of the same metal plate is a method of manufacturing semiconductor devices at low cost. In this way, even if a lead frame made of the same metal material initially has the desired dimensions and shape, it is difficult to apply heat or mechanical Each time the lead and heat sink undergo a process of applying physical vibration, slight warpage or deflection will occur in some areas. When a lead frame with such warpage or deflection is sealed with resin, general molding molds are structured only to tightly fit the lead parts to prevent the press-fitting resin from leaking to the outside, so warpage and deflection may occur. The resulting heat sink often comes into contact with the inner wall of the lower mold for sealing. In this case, the obtained semiconductor device becomes a semiconductor device in which the heat sink is partially exposed and covered with a non-uniform resin layer, which causes the above-mentioned problems.
本発明の目的は、熱伝導を阻害することなく、電気的絶
縁を保ちながら外部放熱器に容易に取付は可能とした樹
脂封止型の電力用半導体装置を、容易安価に製造するた
めの製造方法を提供するにある。An object of the present invention is to easily and inexpensively manufacture a resin-sealed power semiconductor device that can be easily attached to an external heat sink while maintaining electrical insulation without impeding heat conduction. We are here to provide you with a method.
本発明方法は、複数の外部リードのうちの一つの外部リ
ードが放熱板と一体に形成され、かつ、前記複数の外部
リードは前記放熱板に対し一方向のみに引き出されてい
るリードフレームの前記放熱板に半導体素子を固着後、
封止金型の上型と下型の開に前記複数の外部リードをは
さみ、前記放熱板側を前記金型内に入れて封止用樹脂を
注入するに際し、前記封止金型の前記放熱板と・一体の
外部リードをはさむ密着部には前記放熱板を持ち上げる
方向にテーパー付けされており、このテーパーにより持
ち上げられた放熱板を位置ピ／によシ前記封止金型の内
部底面に対し所定の間隔に固定後、前記金型内Ｖｃｗ脂
を注入する工程を含むものである。In the method of the present invention, one of the plurality of external leads is formed integrally with a heat sink, and the plurality of external leads are drawn out in only one direction with respect to the heat sink. After fixing the semiconductor element to the heat sink,
When the plurality of external leads are sandwiched between the upper and lower molds of the sealing mold, the heat sink side is placed in the mold, and the sealing resin is injected, the heat radiation of the sealing mold is injected. The contact area between the plate and the integral external lead is tapered in the direction of lifting the heat sink, and the lifted heat sink due to this taper is moved to the inner bottom surface of the sealing mold. On the other hand, the method includes a step of injecting Vcw fat into the mold after fixing at a predetermined interval.
本発明方法によシ製造された半導体装置は、放熱板の半
導体素子固定面とは反対の面が均一で薄い熱伝導性のよ
い絶縁樹脂で覆われているので。In the semiconductor device manufactured by the method of the present invention, the surface of the heat sink opposite to the surface on which the semiconductor element is fixed is covered with a uniform thin insulating resin having good thermal conductivity.
熱伝導性を阻害する仁となく、電気的絶縁を保持して容
易に放熱器に取付けることができる。It maintains electrical insulation and can be easily attached to a heat sink without any holes that impede thermal conductivity.
つぎに本発明を実施例により説明する。Next, the present invention will be explained by examples.
まず第２図（ａｌの断面図に示すように、３本の外部リ
ード（手前の一本３ａだけが図に見える）が放熱板２の
左側方向のみに引き出されており、がっ、中央の外部リ
ード３ｂ（付は根部分だけ図示）が放熱板２と一体に形
成されているリードフレームの放熱板２に、半導体素子
１を固着する。それから外部リードと半導体素子１の間
を金属細線４の外部リードを、封止用金型６の上型６ａ
と下型６ｂの重ね合せの側壁の間にはさむようにして、
放熱板・２の方を金型６の中に入れる。金型６の外部リ
ードをはさんだ密着部では、中央の外部り−ド３ｂをは
さむ部分には、外部リード３ｂと一体の放熱板２を上方
へ持ち上げるようなテーパー８が付けられている。した
がって、半導体素子１を搭載した放熱板２はテーパー８
のため釦持ち上げられ、特に外部リード側では、下型６
ｂの１内部底面に対し狭い間隔を隔てて位置付けされ、
放熱板の右端側・コでは、上型６ａから位置固定ヒ／９
が下りて来て放熱板２に接触し、放熱板２？ｉ？下型６
ｂの内部底面に対し所定の狭い間隔を隔でて位置付けさ
れる。つぎに上型６ａと下型５ ｂ ５７含む金型６の
内部に封止樹脂を注入し、同化後金型６を取り除いて、
第２図（ｃｌ Ｋ示す樹脂封止型半導体装置が製造され
る。First, as shown in the cross-sectional view of Figure 2 (Al), the three external leads (only the front one 3a is visible in the figure) are pulled out only to the left side of the heat sink 2. The semiconductor element 1 is fixed to the heat sink 2 of the lead frame in which the external lead 3b (only the root part is shown) is formed integrally with the heat sink 2. Then, a thin metal wire 4 is connected between the external lead and the semiconductor element 1. The external leads of the upper die 6a of the sealing die 6
and the stacked side walls of the lower mold 6b,
Place the heat sink plate 2 into the mold 6. In the close contact portion of the mold 6 that sandwiches the external lead 3b, a taper 8 is provided at the central portion that sandwiches the external lead 3b so as to lift upward the heat dissipation plate 2 that is integrated with the external lead 3b. Therefore, the heat sink 2 on which the semiconductor element 1 is mounted has a taper of 8
Therefore, the button is lifted, especially on the external lead side, the lower die 6
located at a narrow interval with respect to the internal bottom surface of b,
On the right side of the heat dissipation plate, place the position fixing hitch/9 from the upper mold 6a.
comes down and contacts the heat sink 2, and the heat sink 2? i? Lower mold 6
b is positioned at a predetermined narrow distance from the inner bottom surface of b. Next, a sealing resin is injected into the inside of the mold 6 including the upper mold 6a and the lower mold 5b 57, and after assimilation, the mold 6 is removed.
A resin-sealed semiconductor device shown in FIG. 2 (cl K) is manufactured.
このような本発明方法によりｆｆ造された電力用半導体
装置を使用する場合、すでに電気的絶縁のための樹脂層
が、放熱板の下面にあるため、マイカ等の絶縁板を使用
せずにビスで圧着するたけて十分な放熱ができ、取付工
数を大巾に簡略できる。When using a power semiconductor device manufactured by the method of the present invention, a resin layer for electrical insulation is already on the bottom surface of the heat sink, so screws can be installed without using an insulating plate made of mica or the like. It provides sufficient heat dissipation by crimping, and greatly simplifies the installation process.
さらに、従来のマイカ等を用いンリコ／・グリースを塗
布して取付ける場合に生じた不都合、すなわち、グリー
スに泡が入ったり、グリースが偏ったりして取付は半導
体装置が傾いた状態で取付けられ、熱源と放熱器との距
離が等距離にならず熱伝導のア／バランスが生じ、熱に
よる該半導体装置を破壊に至らしめるようなことが回避
される。Furthermore, the problems that occurred when attaching the conventional mica or the like by applying the grease, such as bubbles in the grease or unevenness of the grease, caused the semiconductor device to be attached at an angle. It is avoided that the distance between the heat source and the heat radiator is not equal, causing an imbalance in heat conduction and causing the semiconductor device to be destroyed due to heat.
第１図は従来の樹脂封止型半導体装置の断面図。
第２図（ａｌ 、 （ｂｌ 、 （ｃｌは本発明の一実
施例にかかる製造工程順の断面図である。
１・・・・・・半導体素子、２・・・・・・放熱板、３
ａ・・・・・・外部リード、３ｂ・・・・・・放熱板と
一体の外部リード。
４・・・・・・金属細線％ ５・・・・・・封止樹脂、
６・・・・・・金型、６ａ・・・・・・上金型、６ｂ・
・・・・・下金型、８・・・・・・テーノく一部、９・
・・・・・位置固定ピン。FIG. 1 is a sectional view of a conventional resin-sealed semiconductor device. FIG. 2 (al, (bl, (cl) are cross-sectional views in the order of manufacturing steps according to an embodiment of the present invention. 1... Semiconductor element, 2... Heat sink, 3
a... External lead, 3b... External lead integrated with the heat sink. 4...Metal thin wire% 5...Sealing resin,
6... Mold, 6a... Upper mold, 6b.
...Lower mold, 8...Tenoku part, 9.
...Position fixing pin.
Claims (1)
一体に形成され、かつ、前記複数の外部リードは前記放
熱板に対し一方向のみに引出されているリードフレーム
の前記放熱板に半導体素子を固着後、封止金型の上型と
下型の間に前記複数の外部リードをはさみ、前記放熱板
側を前記金型内に入れて封止用樹脂を注入するに際し、
前記封止金型の前記放熱板と一体の外部リードをはさむ
密着部には前記放熱板を持上げる方向にテーパー付けさ
れておシ、このテーパーによシ持ち上げられた放熱板を
位置ビンによシ前記封止金型の内部底面に対し所定の間
隔に固定後、前記金型内に封止用樹脂を注入する工程を
含むことを特徴とす石樹脂封止型半導体装置の製造方法
。A semiconductor element is attached to the heat sink of a lead frame in which one of the plurality of external leads is integrally formed with a heat sink, and the plurality of external leads are drawn out in only one direction with respect to the heat sink. After fixing, the plurality of external leads are sandwiched between the upper mold and the lower mold of the sealing mold, and when the heat sink side is placed in the mold and the sealing resin is injected,
The sealing mold is tapered in the direction of lifting the heat sink at the contact portion that sandwiches the external lead integrated with the heat sink, and the heat sink lifted by this taper is placed in a position bin. A method for manufacturing a stone resin-encapsulated semiconductor device, comprising the step of injecting a sealing resin into the mold after fixing the sealing mold at a predetermined interval to the inner bottom surface of the mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17595782A JPS5965437A (en) | 1982-10-06 | 1982-10-06 | Manufacture of resin sealed type semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17595782A JPS5965437A (en) | 1982-10-06 | 1982-10-06 | Manufacture of resin sealed type semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5965437A true JPS5965437A (en) | 1984-04-13 |
Family
ID=16005207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17595782A Pending JPS5965437A (en) | 1982-10-06 | 1982-10-06 | Manufacture of resin sealed type semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5965437A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4888307A (en) * | 1986-08-27 | 1989-12-19 | Sgs Microelettronica S.P.A. | Method for manufacturing plastic encapsulated semiconductor devices |
| US5091341A (en) * | 1989-05-22 | 1992-02-25 | Kabushiki Kaisha Toshiba | Method of sealing semiconductor device with resin by pressing a lead frame to a heat sink using an upper mold pressure member |
| JPH09129783A (en) * | 1995-10-31 | 1997-05-16 | Nec Corp | Resin sealed semiconductor device and manufacturing method thereof |
-
1982
- 1982-10-06 JP JP17595782A patent/JPS5965437A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4888307A (en) * | 1986-08-27 | 1989-12-19 | Sgs Microelettronica S.P.A. | Method for manufacturing plastic encapsulated semiconductor devices |
| US5091341A (en) * | 1989-05-22 | 1992-02-25 | Kabushiki Kaisha Toshiba | Method of sealing semiconductor device with resin by pressing a lead frame to a heat sink using an upper mold pressure member |
| JPH09129783A (en) * | 1995-10-31 | 1997-05-16 | Nec Corp | Resin sealed semiconductor device and manufacturing method thereof |
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