JPS5958475A - Color graphic crt display using writable character font - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION This defense relates generally to a Rusk scanning color negative m-ray tube display 4 (display), and more particularly to
The present invention relates to such a display device including I jJ character fonts.

A typical raster scan color cathode υ tube display Wt is generally comprised of characters displayed in fixed rows and columns on a cathode ray tube. This display device N displays character codes (ASCII) in color and blinking 1i17I4i.
It is refreshed internally by storing it in random access memory (RAM). This display device RZ sequentially reads these codes used as address information and displays the character 1. It is refreshed by accessing the read-only memory (ROM) that is currently being updated. These character marks are typically formed by dots within a matrix.

jlQ, fixed lever Tori character has 64 letters/numbers and 64 special symbols displayed μ■
It is Noh. In 1-poly, where the repertoire of characters is fixed, the flexibility of the system described above is limited to non-lightning. This is because the character cannot be changed by the operator in It OM or added to ROM.

In view of the above, it would be desirable to develop a system in which characters from the JJI system could be used and these characters could be programmed by an operator.

The present invention solves the above-mentioned and other problems associated with the prior art by providing a RAM in addition to the ROM for storing character characters. This RAM is accessible and programmable by a microprocessor (central processing unit CPU) to enter character characters. During operation, the microprocessor can access It OM f or RAM through a display memory containing character codes used as address information. Depending on whether ROM or IcA IVI is selected, the contents of the character code [+y,l] and the appropriate memo 1 location are transferred to the video generator. This video generator is connected to the sweep deflection driver and color trinograph of the cathode ray meter display. In this way, fixed characters from ROM and programmable characters from RAM can be displayed on the cathode ray tube.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings labeled T5. The accompanying drawings are for the purpose of illustrating preferred embodiments of the present invention, and are not intended to limit the present invention thereto.

FIG. 1 is an electrical diagram of a system 10 used in accordance with the present invention. System 10G includes a microprocessor 12 with associated program memory 14, a character generator in the form of read-only memory (ROM) 16, and a programmable character generator in the form of run-time access memory (RAM) 18. , a display memory 20 and a video generator 22.

Microprocessor 12 (central processing unit) controls the flow of information through system 10 under the direction of program memory 14 m11. Program memory 14 is typically contained within microprocessor 12, but may be separate from the microprocessor if microprocessor 12 does not include sufficient memory capacity. 24 and other computers, etc.) to enter data from
6 is provided, and data in the program memory 14 or a character generator (RAM) in the program memory 14 is provided.
) 18 can be accessed to insert and/or modify data in microprocessor 12 . The microprocessor 12 reads the display memory 2o or the reading indicated by the overall reference number ¥28.
Write isolation and control circuitry can be accessed.

Through this read-write isolation and control circuit 28, microprocessor 12 accesses programmable character storage (RAM) 18. Program memory 14
is programmed to select the appropriate character generator, and this selection causes display memory 20 to be
Do lji-C. The display memory 20 stores character codes (ASCII) used as address bus information.
I have written down the following. The display memory 20 is connected to a character generator (ROM) 16 through a line buffer 30, or via an isolation and control circuit 28 to a program character generator rIr(gAM)1s.
access. Depending on which character generator is selected, the contents of the appropriate memory location associated with the character -1-)'' (ASCII) is transferred to three-state buffer 62. In the case of character generator (ROM) 16, , this transfer takes place directly from this generator 16 to the buffer 32, whereas if a programmable character generator (RAM) 1B is used, the contents of the appropriate memory location of this character generator 18 are isolation and 1lilJ &11 circuit 28 to buffer 32. In either case, the output of buffer 62 is the input h=I to video shift register 34.
The output of the video shift register 34 is connected to the input of the video generator 22. The output of the video generator 22 is connected to a sweep direction driver 36 and a color driver 40. Sweep deflection driver 3
6 controls the horizontal and vertical sweeping of the cathode ray tube 38, and the color driver 40 controls the red, blue and green colors of the cathode ray tube 38. In this way, a writable character font formed by the dots in the dot matrix is created, and the resulting character is displayed on the cathode ray tube 58.
It is displayed in fixed rows and columns at the top, typically 80 rows by 48 columns.

Referring now to FIG. 2, the read-write isolation and control circuit 28 is shown in detail, along with its interconnections with other circuit components. This figure illustrates an 8-bit address and 8-bit isolation system. Such a remote number is necessary to enable microprocessor 12 to program character generator 18, and to enable character generator 18 to subsequently provide data to video generator 22. This isolation and control cycle t7628 is A N D gate person or A6, A
ND gate Δ, or Al1, A N I) gate D.

or D8, ANT) Gate 1). or DIM, inverters B1 and B4, and amplification i, 14B, and σ
It is +4' higher than Bs. microprocessor 1
The address bus from 2 is connected to one input of each of the AND gates A, Z or A, while the other input of each of these AND gates AI or A is connected to the intensifier B. , is connected to the output of. The human power of the increaser B, is connected to the program command bus of the microprocessor 12. Address bus from display memory 20
1, and the other inputs of each of the gates A to A16 are connected to the output of an inverter B. The input of inverter B, 18!, is also connected to the program command bus of microprocessor 12! It is continued. , gates A, through A, and gates A9 through A1! The corresponding outputs of l are connected together, and the resulting wiring is programmed 0 to 1 to 1. :(RAM
)1 Substitute B's manpower for i9. microprocessor 1
The data bus from 2 is connected to one of the AND gates DI and DI, while the power above each of these gates 1), 1) and 8 is connected to the amplifier B1. The input of the amplifier 133 is the output of the microphone [connected to the 1st bus of the J processor 12, which is the gate DI to 1]. ) Gate 1).

1) to 1] and 6, respectively, and the program's 11th character @ Genki (Le AM) 1 B's Jl
form the input.

The other input terminal of each of these AND gates I] to II6 is connected to the output side of the inverter B4. The input of inverter B4 is connected to the program command bus of microprocessor 12.

The output of gate D or DI6 is connected to the input of five-state buffer 28.

1IIJ, microprocessor 12+-j
The display memory 2o is programmed with the galaxy code (ASCII) corresponding to the address of the required character. When a character generator (ROM) 16 receives a particular address from the display memory 2o, it outputs a digitized version of the required character via a six-state buffer 32 to the video shift register '54 &. Shift register 54 sends these data to video generator 22. The video generator 22 is connected to the cathode ray tube 5 through a sweep deflection driver 66.
Controls the horizontal and vertical sweeps of 8, and also controls the color triver 4o1lilJ. Color driver 40 generates various color tods that form the desired characters on the cathode ray tube.

Through the use of the isolation and control circuit 28, the microprocessor 12 (or character generator (RAM) 18, which can act as a special character generator) can be programmed. 3o, a programmable character generator (RAM) 18 or a character generator (
iloM) 16, which transfers the data contained therein to the 5-state buffer 52, and further transfers the data to the video shift register 34 for transmission. can.

Referring again to the second sentence, to program a programmable character generator 8i (ItAM) 1B, a digital 1 Cedar-style program command signal is received on the program command bus of the microprocessor 12 (
It is fied. This digital 1 is inverted to a digital O by the inverter 81, and this digital 0 is supplied to each input of the AND gates h, yz, and Ale, disabling all of these gates and displaying the memo! Prevents the address bus from J20 from accessing the programmable character generation fr (RAM) 18i. Similarly, this digital signal is sent to the amplifier B.

and is supplied to the respective inputs of AND gates A1 to A8, using these AND gates A1 to A8.
jT enable state to enable the address bus from microprocessor 12 to access program character generator (RAM) 18. While this is occurring, this digital 1 is applied to the input of each of AND gates D1-D8 to enable these gates and the data bus from microprocessor 12 is connected to a programmable character generator (0T).
RAM) 18 [Enable this access. During this time, the digital 1 signal is inverted to a digital 0 by inverter B4, and this digital 0 is applied to each of the AND gates D9 to I)+a, disabling these gates and disabling the microprocessor 12.
The data bus from the 3-state buffer 32 is prevented from transmitting data directly to the tristate buffer 32.

In this way, the microprocessor 12 can address the programmable character generator (ItAM) 1s.

As mentioned above, during normal operation of the system, display memory 20 sends particular addresses to character generator 41E 16 on its address bus. The character transmitter 16 digitizes the necessary characters and transmits them to the 5-state buffer 62 and the 6-state buffer 5
2 (transmits these data to the video shift register 34).However, if characters from the programmable character generator (RAM) 18 are required, then the digital The external signal is sent from the microprocessor 12 (and thus the program command bus). This digital O signal is replaced by a digital 1 signal by an inverter B, and the AND
Is the character generator (RAM) the address bus from the display memory 20 programmed with the gate or A16 enabled? 8 can be accessed. The above digital 0&i also disables the AND gates A1-A8 and Dl, and causes the address bus and Qz data bus of the microprocessor 12 to generate a programmable character i(
RAM) Prevent access to 1B. While this is occurring, this digital 0 signal is connected to inverter B,
&Thus, it is inverted to digital 1, and AND gate D
, Q and Dl6 are enabled. Display memory 20 includes a programmable character generator (RAM).
)1 B can be directly accessed, and this character generator 18 digitizes the necessary characters? 6 through A N D gate D or DIll
It is sent to the status buffer 62. The three-way buffer 32 sends these data to the video shift register 64. In this way, the memory capacity Jd of this character @ generator is stored in the program iU frg character generation 8) (RAM
) It is said that the small banquet was expanded by the 8th of 18th.

Those skilled in the art will recognize variations, changes and improvements to the above-described embodiments. All such variations, modifications and improvements have been omitted herein for the sake of clarity and clarity, but do not fall within the scope of the present invention.
You should understand that this is the case.

[Brief explanation of drawings]

FIG. 1 is an electrical circuit diagram of one embodiment of the present invention, and FIG. 2 is an illustration of the isolation and sidewall circuitry, as well as the read-only memory (ROM) and random access memory used for character generation. FIG. 2 is a circuit diagram illustrating the interconnection relationship with RAM. 10 System 12: Microprocessor (CPU) 14 Program memory 16: Read only memory (ROM) 18 Random access memory (RAM) 20: Display memory 22: Video generator 24: Data Entry keyboard 26: communication input 28: read-write separation and control (, l!1 circuit 60 line buffer 32; 6-state buffer 34: video shift register 36: sweep deflection driver 38: cathode ray tube 40: color driver; ~AI6, D, ND16: AND gate T31
Sn2 'Inverter Bl, B3' Amplifier 1 Name of agent: Motohiro Kurauchi Akira Kurahashi
845

Claims (8)

[Claims] (1) a microprocessing means having an associated program memory, a first memory means containing a character bond, a second memory means containing a character bond, and said first memory means; and a selection means for selecting between the character font and the second memory means and transmitting the included I4 positive character font to the display device. Character truth display system for (2) The character true display system according to claim 1, wherein the operation of the selection means is controlled by the program memory. (3) a display memory including address information regarding character fonts stored in the first memory means and the second memory means, respectively, the display memory being accessible by the microprocessing means; 1↑'F Claim 1 subdivision 1↑'F Features operable to select between said first memory means and said second memory means in response to an address provided by a program memory. Shi's character real display system. (4) The memory means of @2 is accessed by the microprocessing means 9 and is capable of inputting and changing the character text contained therein. Pound display system. (5) The character real display system according to claim 1, further comprising access means for accessing the microprocessing means to enable entry and modification of t+V t4j within the system. (6) Patent J in which the access means is a communication means
The character true display system according to item 5 of the R-required range. (7) The first memory means is read-only.
1. The character display system according to item 1, which is a special FF tire which is a memory means. (8) The character font display system according to claim 1, wherein the second memory means is a random access memory means.