JPS595652A - 半導体類のパツケ−ジ成形方法 - Google Patents

半導体類のパツケ−ジ成形方法

Info

Publication number
JPS595652A
JPS595652A JP57114743A JP11474382A JPS595652A JP S595652 A JPS595652 A JP S595652A JP 57114743 A JP57114743 A JP 57114743A JP 11474382 A JP11474382 A JP 11474382A JP S595652 A JPS595652 A JP S595652A
Authority
JP
Japan
Prior art keywords
lead
lead frame
frame
unit
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57114743A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0373144B2 (ref
Inventor
Shinichi Oota
伸一 太田
「はざま」　圭司
Keiji Hazama
Toshiyuki Arai
敏之 新井
Kiichi Kanamaru
金丸　喜一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP57114743A priority Critical patent/JPS595652A/ja
Publication of JPS595652A publication Critical patent/JPS595652A/ja
Publication of JPH0373144B2 publication Critical patent/JPH0373144B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP57114743A 1982-07-01 1982-07-01 半導体類のパツケ−ジ成形方法 Granted JPS595652A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57114743A JPS595652A (ja) 1982-07-01 1982-07-01 半導体類のパツケ−ジ成形方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57114743A JPS595652A (ja) 1982-07-01 1982-07-01 半導体類のパツケ−ジ成形方法

Publications (2)

Publication Number Publication Date
JPS595652A true JPS595652A (ja) 1984-01-12
JPH0373144B2 JPH0373144B2 (ref) 1991-11-20

Family

ID=14645542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57114743A Granted JPS595652A (ja) 1982-07-01 1982-07-01 半導体類のパツケ−ジ成形方法

Country Status (1)

Country Link
JP (1) JPS595652A (ref)

Also Published As

Publication number Publication date
JPH0373144B2 (ref) 1991-11-20

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