JPS595651A - Resin seal type semiconductor device and manufacture thereof - Google Patents
Resin seal type semiconductor device and manufacture thereofInfo
- Publication number
- JPS595651A JPS595651A JP57114711A JP11471182A JPS595651A JP S595651 A JPS595651 A JP S595651A JP 57114711 A JP57114711 A JP 57114711A JP 11471182 A JP11471182 A JP 11471182A JP S595651 A JPS595651 A JP S595651A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- mold
- width
- package
- bent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
- H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（υ発明の技術分野
本発明は半導体装置、詳しくは樹脂封止型半導体装置に
おいて、樹脂封止モールドのリードに対して下半部分の
幅を上半部分の幅より大に、がっ、外部リードは下半部
分の上側肩部分につけられたＲ形状に沿って曲げた構成
とした半導体パッケージおよびその製造方法に関する。Detailed Description of the Invention (υTechnical Field of the Invention) The present invention relates to a semiconductor device, specifically a resin-sealed semiconductor device, in which the width of the lower half of the lead of the resin-sealed mold is made smaller than the width of the upper half. The present invention generally relates to a semiconductor package in which an external lead is bent along an R shape formed on an upper shoulder portion of a lower half portion, and a method for manufacturing the same.
（２）技術の背景
第１図に示される樹脂封止型半導体装置（以下にはパッ
ケージと略称する）は、マイクロコンピュータ等におい
て多用される。同図についテ説明すると、１１がパンケ
ージ、１２は外部リード（以下にはリードと略称する）
、１３はモールド（樹脂封止部分）、１はパンケージ１
１が実装されたプリント基板、２はり一ド１２の挿入の
ためにプリント基板ｌに形成した穴を示す。穴２の間の
間隔（ロースペースといわれる）−２は業界においては
ほぼ一定しており、パッケージの製作においては、モー
ルドの幅−１と−２との間に十分な差があるよう設計す
る。(2) Background of the Technology The resin-sealed semiconductor device (hereinafter referred to as a package) shown in FIG. 1 is frequently used in microcomputers and the like. To explain the same figure, 11 is a pan cage, 12 is an external lead (hereinafter abbreviated as lead).
, 13 is the mold (resin sealing part), 1 is the pan cage 1
1 shows a printed circuit board mounted thereon, and 2 shows a hole formed in the printed circuit board 1 for inserting a board 12. The distance between holes 2 (referred to as low space) -2 is almost constant in the industry, and when manufacturing packages, the mold widths -1 and -2 are designed to have a sufficient difference. .
パッケージ１１の内部は第２図の断面図に示され、第２
図以下において、既に図示された部分と同じ部分は同一
符号を付して表示する。１４はインナーリード（内側リ
ード）、１５は半導体チップ（以下チップという）、１
６はチップの電極パッドとインナーリード１４を接続す
るボンディングワイヤ、１７はチップ１５が付着された
ダイアタッチをテす。The inside of the package 11 is shown in the sectional view of FIG.
In the figures below, parts that are the same as those already shown in the drawings are designated by the same reference numerals. 14 is an inner lead, 15 is a semiconductor chip (hereinafter referred to as a chip), 1
6 is a bonding wire connecting the electrode pad of the chip and the inner lead 14, and 17 is a die attach wire to which the chip 15 is attached.
以上に説明したパッケージは、リードフレームに取り付
けられたチップ１５を樹脂で封止することによって作ら
れ、そのリードフレームは第３図の平面図に部分的に示
される。同図について説明すると、】８はダイアタッチ
を図示しないリードフレームのクレードルに連結するピ
ンチ、１９は樹脂封止のとき樹脂の流出を止めるタイバ
ーを示す。The package described above is made by sealing the chip 15 attached to a lead frame with resin, and the lead frame is partially shown in the plan view of FIG. To explain this figure, 8 is a pinch that connects the die attach to a cradle of a lead frame (not shown), and 19 is a tie bar that prevents resin from flowing out during resin sealing.
図に１点鎖線２０で示すところまでが樹脂封止され、封
止後、タイバー切断およびリード曲げの整形工程が続く
。The area shown by the dashed line 20 in the figure is sealed with resin, and after sealing, the shaping process of cutting tie bars and bending the leads continues.
タイバーは通常のポンチを用いて切断され、リード曲げ
は第４図に示される如くなされる。すなわち、リード１
２のモールド１３に近い部分をクランプ３ではさみ、曲
げポンチ４を矢印の示す如く押し下げてリード１２を曲
げる。このようにして作られたパッケージ１１の一部は
第５図の斜視図に示（３）従来技術と問題点
パッケージが使用されるマイクロコンピュータ等におい
て取り扱う情報量の増加に対応して、チップは最近大型
化する傾向にある。それに応じてリードフレームのダイ
アタッチも従来より面積を広くとるようになった。かか
るリードフレームは第３図に点線で示す。同図の１点鎖
線２１は、ダイアタッチ１７が大になった場合にそこま
でが樹脂封止されることを示す。従って、モールドの幅
１ＩＩｌ′は、プリント基板のロースペース間に近付く
ことになる（−１′ζ−２）。The tie bars are cut using a conventional punch and the lead bends are made as shown in FIG. That is, lead 1
2 near the mold 13 is held between the clamps 3 and the bending punch 4 is pushed down as shown by the arrow to bend the lead 12. A part of the package 11 made in this way is shown in the perspective view of FIG. Recently, there has been a trend towards larger sizes. Accordingly, the area for lead frame die attachment has become wider than before. Such a lead frame is shown in dotted lines in FIG. A dashed-dotted line 21 in the figure indicates that when the die attach 17 becomes large, that portion is sealed with resin. Therefore, the width 1IIl' of the mold approaches the low space of the printed circuit board (-1'ζ-2).
第４図に戻ると、リード１２の曲げにクランプ３を用い
た理由は、クランプ３とポンチ４との位置関係を適宜選
定することにより、リード１２が曲げ部分１２′で自然
な曲がり方をなし、同部分にクラック（割れ）等が発生
することを防止するためである。前記した如く、プリン
ト基板のロースペース−２はモールド幅−１よりも十分
に大であるがら、クランプ３の配置は可能であったが、
第５図に示す例においてはＷｌ”＝１１２であるから、
クランプを配置するだけのスペースをとり得ない。プリ
ント基板のロースペース−２をより大にすることは、産
業界の実情が許さない。Returning to FIG. 4, the reason why the clamp 3 is used to bend the lead 12 is that by appropriately selecting the positional relationship between the clamp 3 and the punch 4, the lead 12 can be bent naturally at the bent portion 12'. This is to prevent cracks from occurring in the same portion. As mentioned above, although the low space -2 of the printed circuit board was sufficiently larger than the mold width -1, it was possible to arrange the clamp 3.
In the example shown in FIG. 5, Wl''=112, so
There is not enough space to place the clamp. The actual circumstances of the industry do not permit increasing the low space -2 of the printed circuit board.
そこで、第６図に示す如く、クランプを用いることなく
、ポンチ４′でリード１２を曲げたところ、曲げ部分１
２′において図に模式的に示すクラック等が発生し、パ
ッケージは不良品となった。Therefore, as shown in FIG. 6, when the lead 12 was bent with a punch 4' without using a clamp, the bent portion 1
At 2', cracks and the like as schematically shown in the figure occurred, and the package became a defective product.
なおリード１２の曲げにおいて、図示の如くモールド１
３の下半部分１３ｂ（上半部分は１３ａで示す）が第４
図のクランプの代りに用いられたが、下半部分１３ｂは
図示の曲げを作るについて十分な機械的強度をもつもの
であることが確認された。Note that when bending the lead 12, the mold 1 is
The lower half part 13b (the upper half part is shown as 13a) of No. 3 is the fourth
Although used in place of the clamp shown, the lower half 13b was found to have sufficient mechanical strength to create the bends shown.
（４）発明の目的
本発明は上記従来の問題点に鑑み、チップの寸法が大に
なることに伴うパッケージのモールドの寸法の大型化が
あったとしても、パンケージのリードを、現在のプリン
ト基板のロースペースに合せて、当該リードの曲げ部に
おいてクラック等が発生しない自然な曲がりをなしたパ
ッケージと、かかるパッケージを製造する方法とを提供
することを目的とする。(4) Purpose of the Invention In view of the above-mentioned conventional problems, the present invention has been made to improve the lead of the pancage from the current printed circuit board, even if the size of the package mold increases due to the increase in the size of the chip. It is an object of the present invention to provide a package that has a natural bend that does not cause cracks or the like in the bent portion of the lead, and a method for manufacturing such a package, in accordance with the low space of the lead.
（５）発明の構成
そしてこの目的は本発明によれば、パッケージのモール
１′のリードに対して下半部分を上半部分よりも幅広く
、かつ、当該下半部分のリードの曲げ部に接する面には
それに沿って曲げられるリードが自然な曲がりをなすよ
うな曲率をもたせて形成したパッケージと、リードをモ
ールドの下半部分に沿って曲げることを特徴とする前記
パッケージの製造方法を提供することによって達成され
る。(5) Structure and object of the invention According to the present invention, the lower half of the molding 1' of the package is wider than the upper half of the lead, and is in contact with the bent part of the lead of the lower half. To provide a package in which a surface is formed with a curvature such that a lead bent along the surface forms a natural bend, and a method for manufacturing the package, characterized in that the lead is bent along the lower half of the mold. This is achieved by
（６）発明の実施例 以下本発明の実施例を図面によって詳述する。(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.
本発明にかかるパッケージは、上記した大型化したチッ
プを付けたダイアタッチをもったリードフレームに、樹
脂封止をなして形成され、それは第７図に断面で示され
る。なお、同図において、２１がパッケージ、２２はリ
ード、２３はモールド、２４はインナーリード、２５は
大型化したチップ、２６はボンディングワイヤ、２７は
従来のものよりも広い面積をもったダイアタッチを示す
。The package according to the present invention is formed by resin-sealing a lead frame with a die attach to which the above-mentioned enlarged chip is attached, and is shown in cross section in FIG. In the figure, 21 is a package, 22 is a lead, 23 is a mold, 24 is an inner lead, 25 is a larger chip, 26 is a bonding wire, and 27 is a die attach with a wider area than the conventional one. show.
モールド２３は、従来例のモールド１３に比べ、その下
半部分の幅％１１１ａが、上半部分の幅Ｗｌｌより大に
形成され（Ｗｌｌａ＞Ｗｌｌ 、Ｗｌｌ＞Ｍｌ） 、Ｌ
かもその上側肩部分２３ａは、所定の曲率Ｒをもって形
成される。このＲは、それに沿ってリード２２が曲げら
れたとき、リード２２が自然な形で曲げられ、リードの
曲げ部分にクラック等が発生しないよう実験によって設
定する。更に、モールドの下半部分の幅−１１ａは、パ
ッケージが実装されるプリント基板のロースペースの幅
を超えることがないよう設定する。第８図はかかるパッ
ケージの一部を斜視図で示す。Compared to the conventional mold 13, the mold 23 is formed such that the width %111a of the lower half thereof is larger than the width Wll of the upper half (Wlla>Wll, Wll>Ml), and L
The upper shoulder portion 23a of the strap is formed with a predetermined curvature R. This R is set through experiments so that when the lead 22 is bent along it, the lead 22 is bent in a natural shape and no cracks or the like occur in the bent portion of the lead. Further, the width -11a of the lower half of the mold is set so as not to exceed the width of the low space of the printed circuit board on which the package is mounted. FIG. 8 shows a portion of such a package in perspective view.
第９図はモールド工程を説明するための断面図でモール
ド型２７．２８．２９は図に矢印で示す運動をなし、モ
ールド２３は下半部分が前記した構造となるよう形成さ
れる。FIG. 9 is a sectional view for explaining the molding process, in which the molds 27, 28, and 29 move as shown by the arrows in the figure, and the mold 23 is formed so that the lower half has the structure described above.
第１θ図はリード曲げ工程を説明するための断面図で受
は台３２にモールド２３をのせ押え板３１でリードを固
定する。次にリード曲げポンチ３３が図に示す矢印の運
動をなし、リードが点線で示す形状に曲げられる。FIG. 1θ is a cross-sectional view for explaining the lead bending process, and the mold 23 is placed on the stand 32 and the lead is fixed with a holding plate 31. Next, the lead bending punch 33 moves as shown by the arrow in the figure, and the lead is bent into the shape shown by the dotted line.
ここで、モールドの上側肩部分２３ａは前記したＲをも
って形成されているから、リード２２は自然な形で曲げ
られ、曲げ部分２２ａにクランク等が発生することはな
い。モールドは 一般にエポシキ樹脂で作られるから、
前記したリード２２の曲げに対して十分に耐えうる。Here, since the upper shoulder portion 23a of the mold is formed with the above-described radius, the lead 22 is bent in a natural manner, and no crank or the like occurs in the bent portion 22a. Molds are generally made of epoxy resin, so
It can sufficiently withstand the bending of the lead 22 described above.
リード曲げポンチ３３の動きが完了し、リード２２が曲
げられた後に、受は台３２、押え板３１を外すと、第８
図に示されるパッケージが完成する。After the movement of the lead bending punch 33 is completed and the lead 22 is bent, the receiver is removed from the base 32 and the holding plate 31.
The package shown in the figure is completed.
（７）発明の効果
以上、詳細に説明したように、本発明のパッケージによ
ると、寸法が大になったチップを付けた従来よりも大な
るダイアタックをもったリードフレームに樹脂封止をな
し、そのリードはモールドの下半部分のＲをもった上側
肩部分に沿って曲げることにより自然な形で曲げられク
ラック等は発生しないから、産業界の要求する大型チッ
プを内蔵するパッケージが、従来のプリント基板に実装
可能に形成され、産業界の要請に十分対応しうる効果が
ある。(7) Effects of the Invention As explained in detail above, according to the package of the present invention, resin sealing is performed on a lead frame with a larger die attack than the conventional one to which a chip of larger size is attached. By bending the leads along the rounded upper shoulder part of the lower half of the mold, the leads are bent in a natural shape and no cracks occur, so the package that incorporates the large chip required by the industry is not conventional. It is formed so that it can be mounted on a printed circuit board, and is effective enough to meet the demands of the industrial world.
第１図は従来のパッケージをプリント基板に実装した状
態を示す図、第２図は従来のパンケージの断面図、第３
図はパッケージに用いるリードフレームの一部の平面図
、第４図は第３図のパッケージのリードの曲げを説明す
るための断面図、第５図は従来のパッケージの一部の斜
視図、第６図はリードをクランプを用いずに曲げる場合
の断面図、第７図と第８図は本発明のパッケージの断面
図と部分的斜視図、第９図はモールド工程を示す断面図
、第１θ図はリード曲げ工程を示す断面図である。
ｉ−−プリント基板、２・−プリント基板のリード挿入
用の穴、２１−モールドパッケージ、２２−・・アウタ
ーリード、２２ａ−・・アウターリードの曲げ部分、２
３−・モールド、２３ａ−モールドの下半部分の上側肩
部分、２４−・インナーリード、２５・−チップ、２６
−・−ボンディングワイヤ、２７−・・ダイアク・ノチ
、２Ｂ、２９．３０−・・モールド型、３１・−押え板
、３２−受は台、３３−・−リード曲げポンチ
第１図
第２図
第３図
第４図
第５図
第６図
第７図
第８図Figure 1 shows a conventional package mounted on a printed circuit board, Figure 2 is a cross-sectional view of a conventional pan cage, and Figure 3 shows a conventional package mounted on a printed circuit board.
The figure is a plan view of a part of the lead frame used in the package, FIG. 4 is a cross-sectional view for explaining the bending of the leads of the package shown in FIG. 6 is a cross-sectional view when the lead is bent without using a clamp, FIGS. 7 and 8 are a cross-sectional view and a partial perspective view of the package of the present invention, and FIG. 9 is a cross-sectional view showing the molding process. The figure is a sectional view showing the lead bending process. i--Printed board, 2--hole for lead insertion of printed board, 21--mold package, 22--outer lead, 22a--bending portion of outer lead, 2
3--mold, 23a--upper shoulder of lower half of mold, 24--inner lead, 25--chip, 26
---Bonding wire, 27--Diac notch, 2B, 29.30--Mold mold, 31--Press plate, 32-Bonding stand, 33--Lead bending punch Fig. 1 Fig. 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8
Claims (1)
部のモールドの幅に対して大であり、かつ該下部のモー
ルドの上側肩部は所定の曲率をもって形成され、該リー
ドが該肩部に沿って曲げられていることを特徴とする樹
脂封止型半導体装置。 （２）リードの突出面に対して下部のモールドの幅が上
部のモールドの幅よりも大に、かつ該下部のモールドの
上側肩部が所定の曲率を有するように半導体素子を樹脂
封止する工程と、該リードを下部のモールドの上側肩部
分に沿って曲げる工程を含んで成ることを特徴とする樹
脂封止型半導体装置の製造方法。[Claims] (11) The width of the lower mold is larger than the width of the upper mold with respect to the protruding surface of the lead, and the upper shoulder of the lower mold is formed with a predetermined curvature; A resin-sealed semiconductor device characterized in that the lead is bent along the shoulder. (2) The width of the lower mold is larger than the width of the upper mold with respect to the protruding surface of the lead. , and includes the steps of: resin-sealing the semiconductor element so that the upper shoulder of the lower mold has a predetermined curvature; and bending the lead along the upper shoulder of the lower mold. A method for manufacturing a resin-sealed semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57114711A JPS595651A (en) | 1982-07-01 | 1982-07-01 | Resin seal type semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57114711A JPS595651A (en) | 1982-07-01 | 1982-07-01 | Resin seal type semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS595651A true JPS595651A (en) | 1984-01-12 |
Family
ID=14644705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57114711A Pending JPS595651A (en) | 1982-07-01 | 1982-07-01 | Resin seal type semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS595651A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0383955U (en) * | 1989-12-19 | 1991-08-26 | ||
| KR950021459A (en) * | 1993-12-10 | 1995-07-26 | 가나이 쓰토무 | Package semiconductor device having a flange on the side and manufacturing method thereof |
-
1982
- 1982-07-01 JP JP57114711A patent/JPS595651A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0383955U (en) * | 1989-12-19 | 1991-08-26 | ||
| KR950021459A (en) * | 1993-12-10 | 1995-07-26 | 가나이 쓰토무 | Package semiconductor device having a flange on the side and manufacturing method thereof |
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