JPS5951757B2 - Method for manufacturing an amorphous semiconductor device - Google Patents
Method for manufacturing an amorphous semiconductor deviceInfo
- Publication number
- JPS5951757B2 JPS5951757B2 JP54173090A JP17309079A JPS5951757B2 JP S5951757 B2 JPS5951757 B2 JP S5951757B2 JP 54173090 A JP54173090 A JP 54173090A JP 17309079 A JP17309079 A JP 17309079A JP S5951757 B2 JPS5951757 B2 JP S5951757B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- amorphous silicon
- substrate
- phosphorus
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000004065 semiconductor Substances 0.000 title description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 25
- 239000000758 substrate Substances 0.000 claims description 20
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 18
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 229910052698 phosphorus Inorganic materials 0.000 claims description 15
- 239000011574 phosphorus Substances 0.000 claims description 15
- 238000006243 chemical reaction Methods 0.000 claims description 14
- 238000007747 plating Methods 0.000 claims description 11
- 229910052759 nickel Inorganic materials 0.000 claims description 9
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 claims description 2
- 229910001379 sodium hypophosphite Inorganic materials 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 229910052710 silicon Inorganic materials 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 230000007847 structural defect Effects 0.000 description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 5
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 229910001220 stainless steel Inorganic materials 0.000 description 3
- 239000010935 stainless steel Substances 0.000 description 3
- 239000000370 acceptor Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 2
- 229910021586 Nickel(II) chloride Inorganic materials 0.000 description 1
- CDBYLPFSWZWCQE-UHFFFAOYSA-L Sodium Carbonate Chemical compound [Na+].[Na+].[O-]C([O-])=O CDBYLPFSWZWCQE-UHFFFAOYSA-L 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- QMMRZOWCJAIUJA-UHFFFAOYSA-L nickel dichloride Chemical compound Cl[Ni]Cl QMMRZOWCJAIUJA-UHFFFAOYSA-L 0.000 description 1
- ACVYVLVWPXVTIT-UHFFFAOYSA-N phosphinic acid Chemical compound O[PH2]=O ACVYVLVWPXVTIT-UHFFFAOYSA-N 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Electromagnetism (AREA)
- Sustainable Development (AREA)
- Sustainable Energy (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
本発明は非晶質シリコン太陽電池のように導電性基板上
にこれとオーム接触する非晶質シリコン層を備えた光電
変換装置の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a photoelectric conversion device, such as an amorphous silicon solar cell, which includes an amorphous silicon layer on a conductive substrate and in ohmic contact with the amorphous silicon layer.
非晶質シリコンを利用した光電変換装置としては、太陽
電池のほかに、光センサ、画像デバイスなどが検討され
ている。非晶質シリコンは、通常気相成長により得られ
るので、半導体装置に利用するときには、導電性基板の
上に成長せしめられることが多い。第１図はｐｉｎ形太
陽電池の構造を示し、例えばステンレス鋼などの金属基
板１の上に、モノシランガスをグロー放電により分解し
イオン化されたシリコンを析出させることで約１μｍの
厚さの非晶質シリコン層２が形成されている。この非晶
質シリコン層２は、供給モノシランガスの切換によつて
導電形および導電率を変えることで、基板側から順に、
例えば、ｎ形抵抗シリコンのｎ層２Ｌ真性シリコンのｉ
層２２およびｐ形低抵抗シリコンのｐ層２３の三層構造
とされ、ｐｉｎ構造を形成している。この非晶質シリコ
ン層２の上には、例えばＳｎＯ。から成る透明導電層３
を介して、例えばＡｇ−Ｔｉの二層から成る格子状電極
４が設けられている。第２図はショットキー障壁形太陽
電池の構造を示す。ｐｉｎ形と同様に金属基板１の上に
非晶質シリコン層２０が堆積されているが、非晶質シリ
コン層２０はｎ層２１とｉ層２２の二層からなつており
、その上にＰｔ膜５が被着されて非晶質シリコン層２０
との間にショット−障壁を形成している。Ｐｔ膜５の上
はｐｉｎ形と同様に電極４が設けられている。これら２
つの例においてはいずれも基板１の上に最初に低抵抗ｎ
層２１がつ＜られる。ｎ層２１はモノシランガスにホス
フィン（ＰＨ、）を混することによつて得られるもので
、ドナーとして燐を含む。このｎ層は、金属基板との間
に低抵抗のオーム接触を得るためのものである。次につ
くられるｉ層２２は、ドナーやアクセプタを含まない。
太陽電池の特性を決定する一つの要素は、このｉ層の膜
質である。即ちｉ層が構造欠陥を多く含むと光電流を生
成する領域（空間電荷層の厚みと拡散長の和）が狭めら
れ、光電変換効率が低下すθる。しかるに、上述のよう
に非晶質シリコンのｎ層の上に非晶質シリコンのｉ層を
連続的に成長させた場合、該層には多くの構造欠陥が生
じるため、光電流を生成する領域の厚さが理論的に予測
される値である約０．４μｍの１／２程度の約０．２μ
ｍ１５となり、高い光電変換効率を得ることが困難であ
る。本発明は光電変換装置製造のために導電性基板の上
に構造欠陥の少ない非晶質シリコン層を成長させかつそ
のシリコン層と基板との間には低抵抗のオーム接触を形
成する方法を提供することを目的とする。In addition to solar cells, optical sensors and image devices are being considered as photoelectric conversion devices using amorphous silicon. Since amorphous silicon is usually obtained by vapor phase growth, it is often grown on a conductive substrate when used in semiconductor devices. Figure 1 shows the structure of a pin-type solar cell. Monosilane gas is decomposed by glow discharge and ionized silicon is deposited on a metal substrate 1, such as stainless steel, to form an amorphous layer with a thickness of approximately 1 μm. A silicon layer 2 is formed. This amorphous silicon layer 2 is formed in order from the substrate side by changing the conductivity type and conductivity by switching the supplied monosilane gas.
For example, the n-layer 2L of n-type resistive silicon i
It has a three-layer structure including a layer 22 and a p layer 23 of p-type low resistance silicon, forming a pin structure. On this amorphous silicon layer 2, for example, SnO is formed. A transparent conductive layer 3 consisting of
A lattice electrode 4 made of, for example, two layers of Ag-Ti is provided via the lattice electrode 4 . FIG. 2 shows the structure of a Schottky barrier type solar cell. Similar to the pin type, an amorphous silicon layer 20 is deposited on the metal substrate 1, but the amorphous silicon layer 20 consists of two layers, an n layer 21 and an i layer 22, on which a Pt layer is deposited. A film 5 is deposited to form an amorphous silicon layer 20.
A shot barrier is formed between the two. An electrode 4 is provided on the Pt film 5 as in the pin type. These 2
In both examples, a low resistance n
Layer 21 is stretched. The n-layer 21 is obtained by mixing phosphine (PH) with monosilane gas, and contains phosphorus as a donor. This n-layer is for obtaining a low resistance ohmic contact with the metal substrate. The next formed i-layer 22 does not contain donors or acceptors.
One factor that determines the characteristics of a solar cell is the film quality of this i-layer. That is, when the i-layer contains many structural defects, the region in which photocurrent is generated (the sum of the thickness of the space charge layer and the diffusion length) is narrowed, and the photoelectric conversion efficiency decreases. However, when an amorphous silicon i-layer is continuously grown on an amorphous silicon n-layer as described above, many structural defects occur in the layer, resulting in a region that generates photocurrent. The thickness is approximately 0.2 μm, which is about 1/2 of the theoretically predicted value of approximately 0.4 μm.
m15, making it difficult to obtain high photoelectric conversion efficiency. The present invention provides a method for growing an amorphous silicon layer with few structural defects on a conductive substrate for manufacturing a photoelectric conversion device and forming a low resistance ohmic contact between the silicon layer and the substrate. The purpose is to
この目的は基板上に燐を含有する金属層を被着し、その
上に非晶質シリコンのｉ層を成長させ、ｉ層の前記金属
層と接する領域に燐を拡散させてｎ層とすることによつ
て達成される。The purpose of this is to deposit a metal layer containing phosphorus on a substrate, grow an i-layer of amorphous silicon on it, and diffuse phosphorus into the region of the i-layer in contact with the metal layer to form an n-layer. This is achieved by
燐を含む金属被覆は周知の次亜燐酸ソーダＮａＨ，ＰＯ
，を含む浴中での無電解ニツケルめつきによつて容易に
得ることができる。The metal coating containing phosphorus is the well-known sodium hypophosphite NaH, PO.
, by electroless nickel plating in a bath containing .
以下無電解ニツケルめつきによる本発明の実施例につい
て図を引用して説明する。”ニツケルめつ浴としては、
１１の水の中に次の成分を添加した塩基性浴を用いる。Examples of the present invention using electroless nickel plating will be described below with reference to the drawings. ``As a nickel bath,
A basic bath is used in which the following ingredients are added to 11 water.
ＮｉＣｌ２・ ６Ｈ２０２０ｇＮ Ｈ４Ｃ１３０ｇ （ＮＨ．）。NiCl2・6H2020gN H4C130g (NH.).
ＨＣ．Ｈ，Ｏ，４ＯｇＮａＨ２ＰＯ２３Ｏｇ
このような組成のめつき液を１００℃近くまで加熱し、
ＮＨ，ＯＨを適量加えた後、表面平滑なステンレス鋼板
をこのめつき液に浸してめつきする。H.C. H, O, 4OgNaH2PO23Og A plating solution with this composition was heated to nearly 100℃,
After adding appropriate amounts of NH and OH, a stainless steel plate with a smooth surface is immersed in this plating solution and plated.
ニツケルめつきしたステンレス鋼板を洗滌した後、第３
図に示すように、このニツケル層１１を有する鋼板１を
基板として、その上に従来と同様のグロー放電分解法に
よつて非晶質シリコン層を成長させる。たゞし従来と異
なり、基板１の上にｎ形低抵抗層は設けないで、直接ｉ
層２２、つづいてｐ形低抵抗のｐ層２３、透明電極層３
、集電電極４を形成する。ｉ層は、例えば０．１〜 Ｉ
ＴＯＴＴ．に保つたモノシランガスを、高周波電界（１
３．５ＭＨｚ）によるグロー放電で分解することによつ
て、０．５μｍの厚さに形成する。After cleaning the nickel-plated stainless steel plate, the third
As shown in the figure, the steel plate 1 having the nickel layer 11 is used as a substrate, and an amorphous silicon layer is grown thereon by the conventional glow discharge decomposition method. However, unlike the conventional method, an n-type low resistance layer is not provided on the substrate 1, and the i
Layer 22, followed by p-type low resistance p layer 23, and transparent electrode layer 3.
, forming the current collecting electrode 4. The i layer is, for example, 0.1 to I
TOTT. The monosilane gas maintained at
3.5 MHz) to a thickness of 0.5 μm.
この上に設けるｐ層は、ジボラン（ＧＨ）を濃度比で１
％混合したモノシランガスの、高周波電界によるグロ．
一放電を用いて分解することにより、約１００λの厚さ
に形成する。第３図はＰｎ接合形太陽電池の場合を示し
たが、第４図に示すシヨツトキー障壁形太陽電池の場合
も、同様に、ｎ層を形成しないで、ニツケル層１１を有
する基板１の上に、ｉ層う２２、Ｐｔ膜５および集電電
極４を順次形成する。第３図または第４図に示すｉ層２
２あるいはｐ層２３の成長は３００℃前後で行われるた
め、その間にニツケルめつき層１１に含まれている燐が
ｉ層２２の破線で区切つた層２４に拡散して、基板１と
非晶質シリコン層の間に良好なオーム接触が形成される
。本発明に基づくこのような方法ではｉ層は基板の上に
直接成長するが、その膜質は従来の方法によるものにく
らべて著しく改善される。The p-layer provided on this layer contains diborane (GH) at a concentration ratio of 1
% mixed monosilane gas by high frequency electric field.
By decomposing it using one electric discharge, it is formed to a thickness of about 100λ. Although FIG. 3 shows the case of a Pn junction type solar cell, the Schottky barrier type solar cell shown in FIG. , the i-layer 22, the Pt film 5, and the current collecting electrode 4 are formed in this order. i-layer 2 shown in FIG. 3 or 4
2 or the p layer 23 is grown at around 300°C, during which time the phosphorus contained in the nickel plating layer 11 diffuses into the layer 24 separated by the broken line of the i layer 22, causing the substrate 1 and the amorphous layer to grow. A good ohmic contact is formed between the silicon layers. In such a method according to the invention, the i-layer is grown directly on the substrate, and its film quality is significantly improved compared to conventional methods.
これは、従来の方法によｎ層では異種のドナー原子を含
むため構造欠陥が多く、その上に成長するｉ層中にもそ
の欠陥が伸びてｉ層の構造欠陥の原因となつフていたの
に対し、本発明による方法では基板上に直接ｉ層が成長
するので、構造欠陥の少ない膜質のすぐれた非晶質シリ
コン層が得られることによる。上の実施例では、被覆金
属層として、次亜燐酸・ソーダを含むめつき浴を用いて
の無電解ニツケルめつき層を利用したが、蒸発源として
燐を含む金属を使用した蒸着膜も利用することができる
。This is because in the conventional method, the N layer contains many structural defects because it contains different types of donor atoms, and these defects extend into the I layer that grows on top of the N layer, causing structural defects in the I layer. In contrast, in the method according to the present invention, since the i-layer is grown directly on the substrate, an amorphous silicon layer with excellent film quality and fewer structural defects can be obtained. In the above example, an electroless nickel plating layer using a plating bath containing hypophosphorous acid and soda was used as the coating metal layer, but a vapor-deposited film using a metal containing phosphorus as an evaporation source could also be used. can do.
また基板として、例えばガラス板のような絶縁板を用い
その上に蒸着によつて燐を含有する金属層を，設けて太
陽電池の陰極となる導電層とし、その上に直接ｉ層を成
長させることもできる。本発明により燐を含む金属層の
上に成長させる非晶質シリコン層は、上述のようにドナ
ーまたはアクセプタを含まないｉ層であるが、膜質に悪
影響を与えない程度の低濃度で燐を添加されていても差
支えない。In addition, an insulating plate such as a glass plate is used as a substrate, and a metal layer containing phosphorus is deposited on it by vapor deposition to serve as a conductive layer that becomes the cathode of the solar cell, and the i-layer is grown directly on top of it. You can also do that. The amorphous silicon layer grown on the metal layer containing phosphorus according to the present invention is an i-layer that does not contain donors or acceptors as described above, but phosphorus is added at a low concentration that does not adversely affect the film quality. There is no problem even if it is.
それによつて基板との間のオーム接触性がより確実にな
る。勿論そのような低濃度の燐のみでは、金属被覆から
拡散する燐が無ければ、オーム接触が得られないことは
明らかである。本発明による方法は、例えば無電解ニツ
ケルめつきによつて簡単に基板上に燐を含む金属被覆を
設けることによつて、欠陥密度の少ない非晶質シリコン
層を得るものであり、このような非晶質シリコン層を用
いて特性の良好な光電変換装置を製造することができる
。This makes the ohmic contact with the substrate more reliable. Of course, it is clear that with only such a low concentration of phosphorus, ohmic contact cannot be obtained without phosphorus diffusing from the metallization. The method according to the invention obtains an amorphous silicon layer with a low defect density by simply providing a phosphorous-containing metal coating on a substrate, for example by electroless nickel plating. A photoelectric conversion device with good characteristics can be manufactured using an amorphous silicon layer.
一例として、第３図に示す構造の本発明を適用した非晶
質シリコン太陽電池を作製し、模擬太陽光下でその変換
効率を測定したところ、平均６％であつた。これに対し
高濃度で燐を添加したｎ形非晶質シリコンをまず形成し
、その上にｉ層、ｐ層を順に形成した従来構造の太陽電
池の変換効率は約４％であつた。即ち、本発明の適用に
より、変換効率が約５０％向上することが確認された。
本発明は、以上実施例をあげて説明した太陽電池の他に
、光センサあるいは画像デバイスのような光電変換装置
にも応用可能である。As an example, an amorphous silicon solar cell to which the present invention is applied having the structure shown in FIG. 3 was manufactured, and its conversion efficiency was measured under simulated sunlight, and the average conversion efficiency was 6%. On the other hand, the conversion efficiency of a solar cell with a conventional structure in which n-type amorphous silicon doped with phosphorus at a high concentration was first formed, and then an i-layer and a p-layer were sequentially formed thereon was about 4%. That is, it was confirmed that the conversion efficiency was improved by about 50% by applying the present invention.
The present invention can be applied to photoelectric conversion devices such as optical sensors or image devices, in addition to the solar cells described above with reference to the embodiments.
【図面の簡単な説明】
第１図，第２図はそれぞれＰｉｎ形およびシヨツトキ一
障壁形太陽電池の従来例を示す断面図、第３図，第４図
はそれぞれＰｉｎ形およびシヨツトキ一障壁形太陽電池
における本発明の実施例を示す断面図である。
１・・・・・・基板、１１・・・・・・無電解ニツケル
めつき層、２２・・・・・・真性非晶質シリコン層、２
３・・・・・・Ｐ形非晶質シリコン層。[Brief Description of the Drawings] Figures 1 and 2 are cross-sectional views showing conventional examples of pin-type and shot-barrier solar cells, respectively, and Figures 3 and 4 are cross-sectional views of pin-type and shot-barrier solar cells, respectively. 1 is a cross-sectional view showing an embodiment of the present invention in a battery. DESCRIPTION OF SYMBOLS 1...Substrate, 11...Electroless nickel plating layer, 22...Intrinsic amorphous silicon layer, 2
3...P-type amorphous silicon layer.
Claims (1)
ｉ層とを積層した構造を有する光電変換装置の製造方法
において、前記基板に燐を含有する金属層を被着し、該
金属層上に非晶質シリコンのｉ層を成長させ、ｉ層の前
記金属層と接する領域に燐を拡散させてｎ層とすること
を特徴とする光電変換装置の製造方法。 ２ 特許請求の範囲第１項記載の方法において、燐を含
有する金属層が次亜燐酸ソーダを含むめつき浴による無
電解ニッケルめつき層であることを特徴とする光電変換
装置の製造方法。[Scope of Claims] 1. A method for manufacturing a photoelectric conversion device having a structure in which at least an n-layer and an i-layer of amorphous silicon are sequentially stacked on a substrate, the method comprising depositing a metal layer containing phosphorus on the substrate. A method for manufacturing a photoelectric conversion device, characterized in that an i-layer of amorphous silicon is grown on the metal layer, and phosphorus is diffused into a region of the i-layer in contact with the metal layer to form an n-layer. 2. A method for manufacturing a photoelectric conversion device according to claim 1, wherein the phosphorus-containing metal layer is an electroless nickel plating layer using a plating bath containing sodium hypophosphite.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54173090A JPS5951757B2 (en) | 1979-12-27 | 1979-12-27 | Method for manufacturing an amorphous semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54173090A JPS5951757B2 (en) | 1979-12-27 | 1979-12-27 | Method for manufacturing an amorphous semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5694677A JPS5694677A (en) | 1981-07-31 |
| JPS5951757B2 true JPS5951757B2 (en) | 1984-12-15 |
Family
ID=15954005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54173090A Expired JPS5951757B2 (en) | 1979-12-27 | 1979-12-27 | Method for manufacturing an amorphous semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5951757B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5955012A (en) * | 1982-09-24 | 1984-03-29 | Mitsubishi Chem Ind Ltd | Amorphus silicon semiconductor substrate |
| US4639543A (en) * | 1985-02-04 | 1987-01-27 | Richard J. Birch | Semiconductor devices having a metallic glass substrate |
| JPS6281057A (en) * | 1985-10-04 | 1987-04-14 | Hosiden Electronics Co Ltd | Transparent conductive film |
| US4798808A (en) * | 1986-03-11 | 1989-01-17 | Atlantic Richfield Company | Photoconductive device coontaining electroless metal deposited conductive layer |
| US5085711A (en) * | 1989-02-20 | 1992-02-04 | Sanyo Electric Co., Ltd. | Photovoltaic device |
-
1979
- 1979-12-27 JP JP54173090A patent/JPS5951757B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5694677A (en) | 1981-07-31 |
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