JPS5949078A - Rounding processing method of picture display device - Google Patents

Abstract

PURPOSE:To obtain a processing method which is well suited to a picture display device of pattern system, by comparing the data on the picture element to be displayed with the data on each of three picture elements on a line which are displayed immediately before or after the line and applying the half-dot processing to the first or second half of the data to be displayed in response to the result of the above-mentioned comparison of the data. CONSTITUTION:The 1st inverter 4 and the 1st and 2nd D flip-flops 5 and 6 are used to extract simultaneously data D3, D4 and D5 equivalent to each picture element out of the front and back lines within the preceding 2nd shift register 3. While the 2nd inverter 7 and the 3rd and 4th D flip-flops 8 and 9 are used to extract simultaneously data D1, D0 and D2 out of the data on a display line within the preceding 1st shift register 1. Then it is decided whether the half-dot processing is applied to the second 1/2 picture element component of the picture element data D0 on the display line by the 1st AND gate 10 as well as above-mentioned inverters and flip-flops. At the same time, the 2nd AND gate 11 and those inverters and flip-flops decide whether the half-dot processing is applied to the first 1/2 picture element component of the data D0.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a rounding processing method for an image display device such as a teletext receiver.

Is the teletext system a television signal? 1 Direct retrace line Akima 1: Receive multiplexed character information data on the 1st side and +jlii (store it in f4 memory and go to °C, and synchronize with the already stored data τ revision synchronization signal. The image is displayed on a readout picture tube.

Among these teletext systems, especially regarding the Japanese pattern system, 1 (unit) displayed on the picture tube
The pixels have a width of about 175 neec· between 7 squares,
It consists of two trees of scanning lines in the vertical direction. For this reason, if the data read from the image memory described above is directly displayed, the slanted portions such as the letters ``F'' to ``L'' will be
1" Hat. Therefore, the pixel data corresponding to the above-mentioned slope etc. should be expanded and displayed by %iIj'i element in the direction before or after this pixel. has been considered, and this is called rounding treatment on teric acid.

Declining rounding processing has already been adopted in the code-based British Teletext system, but the Teletext method cannot be directly applied to the Japanese pattern-based teletext system. Because, first of all, condolence 1
In addition, in the pattern method, the displayed pattern is not independent for each character, but may be continuous across several display blocks, so unlike the code method, the 1 byte that makes up one character is This is because seven rounding processes cannot be performed in units. Also, since the pattern method can display images with much higher definition than the code method, it is necessary to ensure that the definition is not lost due to the rounding process. .

In view of this, the present invention proposes a rounding processing method suitable for pattern-based image display, and its reputation (2) will be explained below.

FIG. 2 and FIG. 6 show the details of the rounding treatment method of the present invention. That is, in the present invention, when displaying the data of each line sequentially output from the image memory by line scanning, the face tree t (show me) from now on the currently displayed line (hereinafter abbreviated as display line) is displayed. Data (Lee J2 figure (s, l ('bl's DO)), this DO's neJ? line (hereinafter, 1ii1 line father is the back line and 1 interest)
The data (Ds) (D4) (Ds
), and depending on the comparison result, the upper sail data (DO
) N7oma\2Mobo, the first half or the second half of this data! 'M 1jIil 3 is inverted (hereinafter referred to as half-dot processing) and displayed). In the case of 7, in the above-mentioned teletext system, as shown in the above figure Since intermittent projection is used, seven comparisons are made between the data (DO) to (Ds) on the display line and rliJ line in odd-numbered fields, and on the display line and rear line in even-numbered fields. ing.

To explain this point in detail with reference to Figure 246, this figure shows the case of displaying an odd field, and in this case, the data (DO) to be displayed on the display line is subjected to half-dot processing as follows. There are four modes shown in Figure 1, 1al~(dl. That is, for convenience of explanation, there are four modes shown in Figure 1, 1al~(dl).
The 71st part in l corresponds to the character or figure part (binary data "1" (two correspondences)'j2r: indicates,
The unhatched area corresponds to the background data (similarly “O′
For example, in the same figure (al), the data (DO) on the display line is the background data "0", and the data (Dl) on this display line and the data on the eye Q line (D4 ) is the character/graphic data “1” and the data on the display line (Dl) and the data on the previous line (Ds
) is the background data "D" (2. The above data (DO)
In this case, the rounding process is realized by inverting the first half Z of the above data (DO) as shown in the j81 diagram described in 11i1. The same applies to (1) to (dl) in Figure 5, and in the case of an even field not shown, (al to
As can be seen by considering each [11J fin of ldl as a rear fin, the data on the display line (Do) and the data around it (Dl) are the same as in the case of odd-numbered fields.
.about.(Ds) (in and rear lines indicated by i), it is determined whether or not to perform 7-pixel processing on the first half or the second half of the data (DO).

FIG. 4 shows an example of a circuit for obtaining six data sets from an image memory and performing rounding processing according to the principles of the present invention. In the same figure, 1. N, the ratte circuit (1) is used to ratte the data of the previous line or the next line read out in parallel in 1-byte units by a data node (not shown), and in the case of an odd field, the data of the previous line is In the case of an even field, the data of the next line is wrapped.In addition, the foot register (21) is used to wrap the data of the displayed line from the above image memory. This is the same whether it is an odd field or an even field.In this case, data of 1 byte each for the display line and the previous or next line is sequentially read out from the image memory in a time-division manner, and first the previous line or The data of the next line is latched to the lattice circuit m, and then the data of the display line is loaded into the first shift register (21).The data of the display line is then loaded into the first shift register (2). At the same timing, the data of the nIJ line or the next line latched by the latching circuit il+ is loaded into the second shift register (31).
When the serial readout of 1 (3) is performed using the display clock, each pixel data located at the same horizontal position 7 on the previous two lines is simultaneously read out from each register.

Next, the first inverter (4) and the 142D flip-flop f5161 convert the data of the previous line or the subsequent line in the $2 shift register (3) into data for each one pixel (as explained in FIGS. 2 and 3) ( D5) (D4) (D5)a
'It is for taking out at the same time, and also the second inverter (7) and the fifth *<4 D flip-flop 1
8+(91 is the same data for each one pixel from the display line data in the funeral 1 shift register 111 (DI)
(Do) and (D2) are for taking out the images at the same time.

Then, by combining these and the first AND gate (J and (2), the pixel data (D) on the display line.

) whether to perform half-dot processing on the second half of the pixel value? In addition, it is determined by the second AND gate (old) whether or not the data (DO) should be subjected to the data processing for % pixels in the first half. In this case, for the former judgment, the display line data (DI) (DO) (D2
) and the data of the previous or subsequent line (Dl(D4)Y is used,
The reason why the data (D5) of the front or rear line is not used is that the data (D5) is not required for this determination, as seen from FIG. 5 above. Furthermore, the reason why the data (D5) 7 of the previous or subsequent line is not used for the latter determination is also due to the same reason.

Further, a sixth inverter 1121. 5th 6th D flip-flop 1I31+141. The circuit consisting of +151 is the circuit consisting of the above-mentioned judgment output section 1, 2, and 151.
+1011111 and the data (Do) on the display line, that is, the Q output of the 3rd D flip-flop (8), are obtained, and the % pixel backstitch data "O-Z" of the first half or the second half of the data (DO) is obtained. This process inverts the character/graphic data to "1", and the output of this circuit, ie, the output of the OR gate (19), is displayed on the picture tube.

An example of the pixel pattern displayed on one screen of the time chart of each part of Fig. 4 (corresponding to Fig. 5(a) is shown in Fig. 5(1'1) , even indicates each waveform in the case of odd number field and duck number field, respectively)
There is 'c. For example, at the end of this 5th diagram (t)l,
Pixel data CDI) (D
Considering o) (D2) and (DI) (D4) (D5) Y, from (a) (0) in the same figure, DI=DO=-〇・, D2=-
Since the first wheel is the eye, D5-D5=-0" and D4="1, the data from the first shift register (21)
During the ta-tb period, which is aimed at the timing of 2), the odd) of 2 ant game) + 111 (7) output (same as C)) is “
It becomes 1. At this time, the first antoge +) 11111
The output of (1/Odd in the same figure) is "0."Then, the output of the second AND gate (old) is delayed by one pixel in the fifth D flip-flop (1+3).

The output of this flip-flop 11 becomes 11 in the next tb-tc period, and even in this period, the output of 11tll becomes "Oo" (1
41. - 10,000, the Q output of g6D flip Flora A lags its input by A pixels, 1 4 s D
Since it is further delayed by one pixel than the display/twin data (li, 10)) due to the 75-tube flop 18), it ends up being "1" between td and te as shown in the same figure (e).
It has become. And the first funeral 1 anime game!・(10)
Output (same figure (c)) and = J5D flip flow 7b1
Since the output of the OR gate 131 and the output of the sixth flip-flop 114 (1+jtl in the same figure) are combined in the OR gate 1153, the output of this OR gate 119 (odd in the same figure) is "1', and this output is delayed by one pixel from the display line data mentioned above (-)), so as can be seen from the comparison in the same figure (-), The part corresponding to the purple tail picture in the first half of the data (DO) is reversed from "1] to "1 degree (the same figure (
-, the Hannung part of I). Im data and 391 cases of even field (it is the same even if there are two and shifted. Therefore, in the end, in the operation model of Figure 5, the same figure (the reverse hatched part shown in al is 8-fold), I
, I! This means that it will be handled by L.

As explained above, in the rounding processing method of the present invention, the data (DO) for one pixel to be displayed in the display line 1 is divided into two adjacent pixels, respectively, before and after that pixel. Compare the 1 minute data (DI) (D2) with the data (D5) (D4) (D5.) located at the same horizontal position as each of the previous 6 pixels on the front or rear line, and compare the results. In IS, the first half or the second half of the data (DO) is processed quickly, so that the image data of each fin read from the image memory does not represent continuous characters or figures. Even if there is, IE precision (-half dot processing can be applied only to necessary parts such as the sloped parts of characters and figures. Therefore, it is suitable for image display such as pattern-based teletext reception 1'J4 etc.) be.

[Brief explanation of the drawing]

Figure 1 is a display pattern diagram for explaining the crawling landing process, Figure 432 and Figure 6 are diagrams for explaining the process of the rounding process method of the present invention, and Figure 4 is an example of an actual Mli of the present invention. Figure 5 is a circuit block diagram showing a time chart of each part along with a display pattern. (1)...Wrap circuit, +21t3+...Shift register, f516! ...D flip-flop. 2nd Generation 4s Procedural Amendment (Method) February 1980 1S Nippon Special π ``Dear Director-General -11,...1, Incident Display tlLt flll 57. Year 7rlj ￥ ``Publication No. 16''
No. 0021 No. 2 Name of the invention Louding processing method for image display device 6 Person who makes correction! Chamberlain Applicant Address 2-18 Keihan Hondori, Moriguchi City Name (188) Sanyo Electric Co., Ltd. Representative Tsuki Ue Kaoru 4, Agent Address 2-18 Keihan Hondori, Moriguchi City Contact Number (Tokyo) 835- 1111 Patent Center Resident Kamata January 25, 1980 /-Il
,,B7.6 "Figure 1" and "Figure 2" of the drawings subject to correction. 7 As per the revised internal medicine appendix. 2nd figure Sai' kidney pelvis in b phrase (0) sword 1 ma 1 line f5 front (bl

Claims (1)

[Claims] (1) An image memory χ storing pixel data of each line is provided, and the data read out from this memory are displayed by horizontal line scanning, and the line (in the image display device, the line t read out from the memory) is displayed.・The data of the pixel that is about to be rewarded, each data of the 11j pixels adjacent before and after the 7th ll1ii, respectively, and those 5
The direct cutting edge of the above line, which is located at the same horizontal position as each pixel, is compared with the data of each of the 6 pixels on the line to be displayed immediately after, and depending on the comparison result, the data to be displayed is niJ and a half or This is a rounding processing method for an image display device characterized in that the latter half Z half dot processing is performed.