JPS5948735A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPS5948735A
JPS5948735A JP57158126A JP15812682A JPS5948735A JP S5948735 A JPS5948735 A JP S5948735A JP 57158126 A JP57158126 A JP 57158126A JP 15812682 A JP15812682 A JP 15812682A JP S5948735 A JPS5948735 A JP S5948735A
Authority
JP
Japan
Prior art keywords
liquid crystal
display device
crystal display
insulating substrate
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57158126A
Other languages
Japanese (ja)
Other versions
JPH0473568B2 (en
Inventor
Makoto Matsui
誠 松井
Eiichi Maruyama
瑛一 丸山
Yasuhiro Shiraki
靖寛 白木
Junichi Owada
淳一 大和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57158126A priority Critical patent/JPS5948735A/en
Publication of JPS5948735A publication Critical patent/JPS5948735A/en
Publication of JPH0473568B2 publication Critical patent/JPH0473568B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

PURPOSE:To improve response characteristics and to reduce defects such as a short- circuit of electrode, by reducing the intervals between insulating substrates which face each other at a picture element electrode part. CONSTITUTION:The insulating substrate 1 is formed in an projection shape 21 such as an island or knot shape where picture element electrodes 4 are formed. For this purpose, the insulating substrate 1 is worked by normal photolithography so that the height H of the park of a projection mode 21 as picture element electrodes 4 is greater than the height (h) of a thin film transistor 3. Thus, the trouble originating from the projection shape of a field effect transistor structure part is solved to improve the response characteristics and also reduce defects such as an electrode short-circuit

Description

【発明の詳細な説明】 本発明は、液晶表示装［ｄに光り、特に、ｌ′Ｊ４−膜
トランジスタによるアクティブ・マトリクス駆動方式の
液晶表示装置ｄとして好適な液晶表示装置ａに関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a liquid crystal display device (a) that emits light in a liquid crystal display device (d) and is particularly suitable as a liquid crystal display device (d) of an active matrix drive type using l'J4-film transistors.

第１図を参照して従来技術について説明する。The prior art will be explained with reference to FIG.

第１図は、従来の薄膜トランジスタ・７トリクス、駆動
方式の液晶表示装置の構成を示す断面図であるが、平坦
な絶縁性基板１の上に、島状もしくは篩状に半導体薄膜
２が形成されており、この半導体薄ｌＩＯ２を用いて薄
膜トランジスタ３が形成されている。薄膜トランジスタ
３のソース電極１３もしくはドレイン電極１５と電気的
に接触するように画素電極４が設けられている。画素電
極４に対向する共通電極５ｆ：設けたもう一枚の絶縁性
基板６と６″ｌＩ述した絶縁性基板１との間には液晶７
が封入さ扛ている。なお、表示方式によっては、第１図
に示すごとく、配向膜８や偏光板９が備えられている。FIG. 1 is a cross-sectional view showing the structure of a conventional thin film transistor/7trix drive type liquid crystal display device, in which a semiconductor thin film 2 is formed in an island or sieve shape on a flat insulating substrate 1. The thin film transistor 3 is formed using this semiconductor thin lIO2. A pixel electrode 4 is provided so as to be in electrical contact with the source electrode 13 or drain electrode 15 of the thin film transistor 3. Common electrode 5f facing the pixel electrode 4: A liquid crystal 7 is placed between another insulating substrate 6 provided and the insulating substrate 1 described above.
is enclosed. Note that, depending on the display method, as shown in FIG. 1, an alignment film 8 and a polarizing plate 9 are provided.

第１図で示した薄膜トランジスタ３はＭＯＳ（金属−酸
化物一半導体）Ｉｉ’ＥＴ（′電界効果トランジスタ）
構造のものであり、半導体薄膜２の内部に、ソースおよ
びドレインのｎ＋　　（もしくはｐ”　）！曽１０がＩ
ｌｉコえられ、ゲート峻化膜１１およびフィールド酸化
膜１２の上に、ソース電極１３、ゲート電極１４及びド
レイン電極１５がそれぞれ形成されている。燐ガラス１
６は、薄膜トランジスタの劣化防止用として、また、二
喘配線のための層間絶縁用として設けられる。かような
構成であるから、薄膜トランジスタ３の部分は画素磁極
４の部分に較べて、１〜５７ｚｍｌｑ度凸状になってい
る。薄膜）・ランジスタの構造とじてに、第１図に示し
たへ■０８ＦＥＴ構造のほか、種々多様の構造があるが
、どのような構造のもの全採用しても、第１図に示した
ような平坦な絶（７φ性基板を用いる限りにおいては、
薄膜トランジスタの部分が画素磁極の部分よりも凸状に
なってし−まうことは赴けられない。従って、このよう
な薄膜トランジスタ・マトリクスと一体化し−ｉ？＆晶
索子においては、簿膜トランジスタの部分の凸状部の高
さｂよりも、電極間隔ｄを大きくしないと、薄膜トラン
ジスタの部分で知略してし止うこととなる。ところで、
電極間隔ｄは、液晶の厚みであるわけであるが、液晶の
厚みｄと液晶の応答時間τとの間には、一般に（ネマチ
ック液晶を用いた場合に）、τ＝ｄ２の関係があること
が知られている。従って、ｄを大とすると液晶の応答が
著しり遅くなるという欠点が不可避であったのである。The thin film transistor 3 shown in FIG. 1 is a MOS (metal-oxide-semiconductor) Ii'ET ('field effect transistor).
structure, inside the semiconductor thin film 2, the source and drain n+ (or p'')!
A source electrode 13, a gate electrode 14, and a drain electrode 15 are formed on the gate thickening film 11 and the field oxide film 12, respectively. phosphorus glass 1
6 is provided for preventing deterioration of the thin film transistor and for interlayer insulation for the second wiring. With such a configuration, the portion of the thin film transistor 3 is convex by an angle of 1 to 57 zmlq compared to the portion of the pixel magnetic pole 4. In addition to the FET structure shown in Figure 1, there are a variety of other structures for transistors (thin film) and transistors, but no matter what structure is adopted, the result will be as shown in Figure 1. flat surface (as long as a 7φ substrate is used,
It is unavoidable that the thin film transistor portion be more convex than the pixel magnetic pole portion. Therefore, by integrating with such a thin film transistor matrix -i? In the &crystal line, if the electrode spacing d is not made larger than the height b of the convex portion of the thin film transistor part, the problem will end in the thin film transistor part. by the way,
The electrode spacing d is the thickness of the liquid crystal, and there is generally a relationship between the thickness d of the liquid crystal and the response time τ of the liquid crystal (when a nematic liquid crystal is used): τ = d2. It has been known. Therefore, when d is increased, the response of the liquid crystal becomes extremely slow, which is unavoidable.

本発明は、上述したような従来技術の欠点を改善したも
のであり、応答特性が良好で、かつ、醒極知略等の不良
が生じることが少ない、夜晶表示装置ａヲ提供すること
を目的とするものである。An object of the present invention is to provide a night crystal display device (a) which improves the drawbacks of the prior art as described above, and which has good response characteristics and is less likely to suffer from defects such as shortness of notice. That is.

本発明はこの目的を達成するために、液晶を封入する空
間を画成する二枚の絶縁性基様のうちの一枚について、
画素電極の形成される部分が、島状もしくけ篩状に凸状
形態になっているような基板を用いることにより、もう
一枚の平坦な基板を対向させたときに、画素電極の部分
とこの平坦な基板との間隔が小さくなるように構成し、
もって画素電極の部分の液晶の厚みを薄くして応答特性
を改善したものである。In order to achieve this object, the present invention provides for one of the two insulating substrates defining the space in which the liquid crystal is enclosed.
By using a substrate in which the part on which the pixel electrode is formed is convex in the form of an island or a screen sieve, when another flat substrate is placed facing the pixel electrode part, The structure is configured so that the distance from this flat substrate is small,
This improves response characteristics by reducing the thickness of the liquid crystal at the pixel electrode.

以下、図面に従って本発明の実施例について説明する。Embodiments of the present invention will be described below with reference to the drawings.

第２図を参照すると、本発明の一実殉例である液晶光示
装置の構成が断面で示されている。第１図と同じ符号は
、同じまたは同等の部分を示している。この実施例にお
いては、絶縁性基板１のうち画素電極４の形成される部
分が島状もしくは篩状に、凸状形、態に形成されている
点を除けば、他の点は第１図で説明した従来技術による
液晶表示装置と変わりがない。本発明のこの実施例の絶
縁性基板１の例は、第３図及び第４図において詳細に示
されているところであって、第３図は絶縁性基板１の一
つの列℃示す平面図であり、第４図は絶縁性基板１の別
の例を示す平面図である。これらの図において、凸状形
態となる部分は符号２１で、凹状形態となる部分は符号
２２で示しである。Referring to FIG. 2, the structure of a liquid crystal display device, which is an example of the present invention, is shown in cross section. The same reference numerals as in FIG. 1 indicate the same or equivalent parts. In this embodiment, except that the portion of the insulating substrate 1 on which the pixel electrode 4 is formed is formed in an island shape, sieve shape, or convex shape, the other points are as shown in FIG. There is no difference from the liquid crystal display device according to the prior art described in . An example of the insulating substrate 1 of this embodiment of the invention is shown in detail in FIGS. 3 and 4, where FIG. 3 is a plan view showing one row of the insulating substrate 1. 4 is a plan view showing another example of the insulating substrate 1. In these figures, the convex portion is designated by 21, and the concave portion is designated by 22.

通常のホトリソグラフィにより、画＊電ｉ＋４１４４の
部分となる凸状形態の部分の高さＨが、薄膜トランジス
タ３の高さｂ　’よりも大きくなるように絶縁性基板１
に加工することによって、本発明を好適に具現し得る。By normal photolithography, the insulating substrate 1 is formed so that the height H of the convex portion that becomes the pixel i+4144 is larger than the height b' of the thin film transistor 3.
The present invention can be suitably implemented by processing the material.

通常のウェット・エツチングによると、凸状形態をなす
部分の外縁部は、急激な段差を形成することなく緩やか
な台形状となる−ので、絶縁性基板ｌをこのように加工
１．たことによって透明画素電極４がこの外縁部で断線
することはない。もつとも、本発明は凸状形態にする形
成方法を特に限定するものでないことは言う壕でもない
。According to normal wet etching, the outer edge of the convex portion becomes a gentle trapezoidal shape without forming a sharp step. Therefore, the insulating substrate l is processed in this way. Therefore, the transparent pixel electrode 4 will not be disconnected at this outer edge. However, the present invention does not specifically limit the method of forming the convex shape.

以上説明したように、本発明によれば、画素１ｄ極の、
Ｎｌ２分において、対向する縦隊性基板との間の間隔ケ
小さくすることができるので、実際に動作する液晶の厚
みｄを最適化するに際して、ＦＥＴ構造７５（４分が凸
状になってしまうことによってもたらされる不都合ばＷ
４消され、もって液晶の応答速度を速くすることができ
、筐た、覗極短絡などの不良を阻止し得るという種々の
効果全会する。また、本発明の好適な実施例によれば、
かかる〆成品表示装置を容易に製作し得ることができる
。As explained above, according to the present invention, the pixel 1d pole
Since the distance between the facing columnar substrates can be reduced in N12, when optimizing the thickness d of the liquid crystal that actually operates, the FET structure 75 (4) has a convex shape. If the inconvenience caused by W
4, the response speed of the liquid crystal can be increased, and defects such as short circuits between the housing and the viewing pole can be prevented. Also, according to a preferred embodiment of the present invention:
Such a finished product display device can be easily manufactured.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、従来のイ′Ｗ膜トランジスタ・マトリクス、
駆１ｉｉ１１方式の液晶表示装置δの構成を示す断面図
、第２図は本発明の一実施例である液晶表示装置の構成
を示す断面図、第３図は本発明で用いる絶縁性基板の１
例を示すＥＦ面図、第４図は本兜町で用いる絶縁性基板
の他のしｌＪケ示す平面図である。 １・・・絶縁性基板、２・・・半導体薄膜、３・・・ｇ
膜トランジスタ、４・・・画素′ば唖、５・・・共通電
権、６・・・絶縁性基板、７・・・液晶、８・・・配向
膜、９・・・１１１４光板、１０・・・ｎ９層又ｉ、１
：　ｐ　”　、層、１１・・・ゲートｊ１ノ化膜、１２
・・・フィールド １４・・・ゲーｌ−Ｌ［」柩、１５・・・ドレイン電接
、１６・・・燐ガラス、２１・・・凸状形，暢をなす部
分、２２・・・凹状形態をなす部分。 代理人　弁理±　７ｊ１７田利幸 第　１　　図 ３２図 葛３図Figure 1 shows a conventional I'W film transistor matrix,
FIG. 2 is a cross-sectional view showing the structure of a liquid crystal display device δ of the drive 1ii11 method. FIG. 3 is a cross-sectional view showing the structure of a liquid crystal display device according to an embodiment of the present invention. FIG.
EF side view showing an example, and FIG. 4 is a plan view showing another example of the insulating substrate used in Honkabuto-cho. 1... Insulating substrate, 2... Semiconductor thin film, 3... g
Film transistor, 4... Pixel base, 5... Common power source, 6... Insulating substrate, 7... Liquid crystal, 8... Alignment film, 9... 1114 light plate, 10...・・n9 layer or i, 1
: p'', layer, 11...gate j1 diode film, 12
. . . Field 14 . . . Game l-L[” coffin, 15 . . . Drain electrical contact, 16 . . . Phosphorus glass, 21 . . . Convex shape, smooth part, 22 . The part that makes up. Agent Patent Attorney ± 7j17 Toshiyuki Den No. 1 Figure 32 Figure Kuzu 3

Claims (1)

【特許請求の範囲】 １、液晶全介在させて対向する絶縁性基板の一方に配列
された浅数閘の画素電極を有する液晶表示装置において
、前記一方の絶縁性基板のうち少なくとも画素電極の形
成されている部分が、島状もしくけ篩状Ｖこ、凸状形態
を有していることを特徴とする液晶表示装置１ｆｆｉ。 ２、前ｉ己−万の絶縁性基板のうち凸状形態をなす部分
以外の凹状形態金なす部分に薄膜トランジスタが形成さ
れていることを特徴とする特許請求の範囲第１項記載の
液晶表示装置θ。 ３、前記絶、脈性基板が透明基板であることを特徴とす
る特許請求の範囲第１項又は第２項記載の液晶ヱぐ爪装
置。 ４、表示方式が透過型であることを特６′ｉとする特許
請求の範囲・４）３項記載の液晶表示装置。[Scope of Claims] 1. In a liquid crystal display device having pixel electrodes in shallow columns arranged on one side of opposing insulating substrates with liquid crystal entirely interposed therebetween, formation of at least the pixel electrodes of the one insulating substrate; A liquid crystal display device 1ffi characterized in that the portions shown in FIG. 2. The liquid crystal display device according to claim 1, wherein a thin film transistor is formed on a concave portion of the insulating substrate other than the convex portion. θ. 3. The liquid crystal display device according to claim 1 or 2, wherein the pulsed substrate is a transparent substrate. 4. Claim 6'i, characterized in that the display method is a transmissive type. 4) The liquid crystal display device according to item 3.
JP57158126A 1982-09-13 1982-09-13 Liquid crystal display device Granted JPS5948735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57158126A JPS5948735A (en) 1982-09-13 1982-09-13 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57158126A JPS5948735A (en) 1982-09-13 1982-09-13 Liquid crystal display device

Publications (2)

Publication Number Publication Date
JPS5948735A true JPS5948735A (en) 1984-03-21
JPH0473568B2 JPH0473568B2 (en) 1992-11-24

Family

ID=15664853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57158126A Granted JPS5948735A (en) 1982-09-13 1982-09-13 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS5948735A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000081636A (en) * 1998-09-03 2000-03-21 Seiko Epson Corp Electrooptical device and its manufacture and electronic instrument
US6703643B2 (en) 1995-02-15 2004-03-09 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device with an integrated circuit covered with a sealing material

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58186720A (en) * 1982-04-26 1983-10-31 Seiko Epson Corp Electrooptic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58186720A (en) * 1982-04-26 1983-10-31 Seiko Epson Corp Electrooptic device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6703643B2 (en) 1995-02-15 2004-03-09 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device with an integrated circuit covered with a sealing material
US7538849B2 (en) 1995-02-15 2009-05-26 Semiconductor Energy Laboratory Co., Ltd. Active matrix display and forming method thereof
US7924392B2 (en) 1995-02-15 2011-04-12 Semiconductor Energy Laboratory Co., Ltd. Active matrix display and forming method thereof
JP2000081636A (en) * 1998-09-03 2000-03-21 Seiko Epson Corp Electrooptical device and its manufacture and electronic instrument

Also Published As

Publication number Publication date
JPH0473568B2 (en) 1992-11-24

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