JPS5948090U - Memory unit of sequence control device - Google Patents

Memory unit of sequence control device

Info

Publication number
JPS5948090U
JPS5948090U JP14870182U JP14870182U JPS5948090U JP S5948090 U JPS5948090 U JP S5948090U JP 14870182 U JP14870182 U JP 14870182U JP 14870182 U JP14870182 U JP 14870182U JP S5948090 U JPS5948090 U JP S5948090U
Authority
JP
Japan
Prior art keywords
control device
memory unit
sequence control
memory
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14870182U
Other languages
Japanese (ja)
Other versions
JPH0346552Y2 (en
Inventor
小野木　俊郎
与田　健一
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP14870182U priority Critical patent/JPS5948090U/en
Publication of JPS5948090U publication Critical patent/JPS5948090U/en
Application granted granted Critical
Publication of JPH0346552Y2 publication Critical patent/JPH0346552Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Semiconductor Memories (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図乃至第４図は本考案の実施例を示し、第１図は分
解斜視図、第２図は斜視図、第３図は回路図、第４図は
コントロールユニットの斜視図、第５図はケース１５を
外した状態のメモリユニットの斜視図である。 ３′・・・コネクタ、ｌ　ｌ−Ｅ−Ｐ−ＲＯＭ、　　ｌ
　ｌａ−消去部、１５．２０・・・ケース、１６．１７
・・・窓、Ｐ・・・プリント板、Ｃ・・・コンデンサ、
Ａ・・・装置本体。1 to 4 show an embodiment of the present invention, in which FIG. 1 is an exploded perspective view, FIG. 2 is a perspective view, FIG. 3 is a circuit diagram, FIG. 4 is a perspective view of a control unit, and FIG. The figure is a perspective view of the memory unit with the case 15 removed. 3'... Connector, l l-E-P-ROM, l
la-erasure section, 15.20... case, 16.17
...Window, P...Printed board, C...Capacitor,
A...Device main body.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ＲＯＭのようなメモリとノイズ吸収用コンデンサと装置
本体側の雄側コネクタに対応する雌側コネクタとをプリ
ント板上に装着かつ接続してケースに収納して成るシー
ケンス制御装置のメモリユニット。A memory unit for a sequence control device, in which a memory such as a ROM, a noise absorbing capacitor, and a female connector corresponding to a male connector on the device main body are mounted on a printed board, connected, and housed in a case.
JP14870182U 1982-09-30 1982-09-30 Memory unit of sequence control device Granted JPS5948090U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14870182U JPS5948090U (en) 1982-09-30 1982-09-30 Memory unit of sequence control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14870182U JPS5948090U (en) 1982-09-30 1982-09-30 Memory unit of sequence control device

Publications (2)

Publication Number Publication Date
JPS5948090U true JPS5948090U (en) 1984-03-30
JPH0346552Y2 JPH0346552Y2 (en) 1991-10-01

Family

ID=30330302

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14870182U Granted JPS5948090U (en) 1982-09-30 1982-09-30 Memory unit of sequence control device

Country Status (1)

Country Link
JP (1) JPS5948090U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007073020A (en) * 2005-09-08 2007-03-22 Ee Ii Syst Kk System for transmitting measurement signal for humidity and temperature sensor via wireless lan

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53128543U (en) * 1977-03-18 1978-10-12
JPS5662354A (en) * 1979-10-25 1981-05-28 Chiyou Lsi Gijutsu Kenkyu Kumiai Hybrid type semiconductor integrated circuit device
JPS56105268U (en) * 1980-01-16 1981-08-17

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53128543U (en) * 1977-03-18 1978-10-12
JPS5662354A (en) * 1979-10-25 1981-05-28 Chiyou Lsi Gijutsu Kenkyu Kumiai Hybrid type semiconductor integrated circuit device
JPS56105268U (en) * 1980-01-16 1981-08-17

Also Published As

Publication number Publication date
JPH0346552Y2 (en) 1991-10-01

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