JPS58170097U - Memory unit of sequence control device - Google Patents
Memory unit of sequence control deviceInfo
- Publication number
- JPS58170097U JPS58170097U JP14870282U JP14870282U JPS58170097U JP S58170097 U JPS58170097 U JP S58170097U JP 14870282 U JP14870282 U JP 14870282U JP 14870282 U JP14870282 U JP 14870282U JP S58170097 U JPS58170097 U JP S58170097U
- Authority
- JP
- Japan
- Prior art keywords
- control device
- memory unit
- sequence control
- case
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図乃至第4図は本考案の実施例を示し、第1図は分
解斜視図、第2図は斜視図、第3図はメモリユニットの
要部回路図、第4図はシーケンス制御装置のコントロニ
ルユニットの斜視図、第5図はケース15を取り外した
状態のメモリユニットの斜視図である。3:コネクタ、
l l :E−P−ROM、l la:消去部、15.
20:ケース、16゜17:開口部。1 to 4 show an embodiment of the present invention, FIG. 1 is an exploded perspective view, FIG. 2 is a perspective view, FIG. 3 is a main circuit diagram of a memory unit, and FIG. 4 is a sequence control device. FIG. 5 is a perspective view of the memory unit with the case 15 removed. 3: Connector,
l l: E-P-ROM, l la: erasing unit, 15.
20: Case, 16° 17: Opening.
Claims (1)
上に装着して接続してケースに収納する−とともに、ケ
ースに設けた開口部にメモリの上面とコネクタの挿着口
とを対応させ、ケース外側面には挿脱時のつまみ用つば
を突設して成るシーケンス制御装置のメモリユニット。 ゛[Scope of claim for utility model registration] A memory such as a ROM and a female connector are mounted on a printed board, connected, and stored in a case. A memory unit for a sequence control device that corresponds to the insertion slot and has a protruding tab on the outer surface of the case for use in insertion and removal.゛
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14870282U JPS58170097U (en) | 1982-09-30 | 1982-09-30 | Memory unit of sequence control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14870282U JPS58170097U (en) | 1982-09-30 | 1982-09-30 | Memory unit of sequence control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58170097U true JPS58170097U (en) | 1983-11-12 |
Family
ID=30101732
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14870282U Pending JPS58170097U (en) | 1982-09-30 | 1982-09-30 | Memory unit of sequence control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58170097U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6230095A (en) * | 1985-07-31 | 1987-02-09 | 三菱電機株式会社 | Integrated circuit card |
JPS62138395U (en) * | 1986-02-20 | 1987-09-01 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5588102A (en) * | 1978-12-27 | 1980-07-03 | Omron Tateisi Electronics Co | Sequence programmer |
-
1982
- 1982-09-30 JP JP14870282U patent/JPS58170097U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5588102A (en) * | 1978-12-27 | 1980-07-03 | Omron Tateisi Electronics Co | Sequence programmer |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6230095A (en) * | 1985-07-31 | 1987-02-09 | 三菱電機株式会社 | Integrated circuit card |
JPS62138395U (en) * | 1986-02-20 | 1987-09-01 |
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