JPS5947980A - Voltage type inverter - Google Patents

Abstract

PURPOSE:To enable to stably drive an induction motor which suppresses the fluctuation of the output voltage and drives the motor by providing an FF circuit which receives as a clock the input pulse signal of a time integration counter between an address designating counter and a converter and synchronizing two pulse signals. CONSTITUTION:An FF circuit 36 which employs as clock the output pulse signal of an oscillator 11, i.e., the input pulse signals of time integration counters 9a, 9b and 10a, 10b between an address designating counter 4 and a voltage-to-frequency converter 3, thereby synchronizing two pulse signals. Thus, the input signal of the counter 4, i.e., the output signal of the FF circuit 36 always varies when the output pulse signal of the oscillator 11 falls. Accordingly, the pulse width of the output signal of the comparator 8a always becomes constant, and the inverter output voltage becomes constant. Consequently, the vibration of the induction motor can be reduced, and can be stably driven.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a voltage source inverter using voltage time product comparison control, and more particularly to a voltage source inverter capable of suppressing fluctuations in output voltage.

[Technical background of the invention]

Generally, the output voltage waveform of a voltage source inverter is preferably a sinusoidal waveform, and as one type of this, a sinusoidal approximation pulse width modulation (hereinafter referred to as PWM) inverter using voltage time product comparison control has been proposed.

FIG. 1 shows an example of a sine wave approximation PWM inverter using this type of conventional voltage-time product comparison control.

In the figure, 1 is a variable resistor for frequency setting, 2 is an acceleration/deceleration limiting circuit, 3 is a voltage-frequency converter, and 4 is an address designation counter.This address designation counter 4 is composed of 4-bit up counters 4a and 4b. It has become. 5 is a hexadecimal ring counter, 6a and 6b are read-only memories as function generators (hereinafter, ROM 6a contains electrical angle 3
Data regarding the voltage-time product value of the line voltage in the 0° to 90° interval is stored.

The data in ROM6a and 6b are 30° to 90° and 90°.
The section from 150 DEG to 150 DEG is divided into equal parts, and the cumulative voltage-time product value up to that section is stored.

Figure 2 (a), (b) and the table below show ROM6g,
6b shows a data example in which the electrical angle sections of 30° to 90° and 90' to 150° are each divided into six equal parts. The data stored in the ROMs 5m and 6b are transferred to the ROMs by addressing counters 4a and 4b.
Addresses 6a and 6b are specified and read. ROM
The output of 6a is input to comparators 7a and 8m, respectively, and R
The output of OM6b is input to comparators 7b and 8b, respectively.

On the other hand, pulses of a fixed period emitted from the oscillator 11 are input to an AND gate (hereinafter referred to as AND) 13, and the pulses outputted from this are fed to time integration counters 9a, 1Oa, and 9, each consisting of, for example, 4 pit-up counters.
b and 10b are integrated. The integrated values of the time integration counters 9 and 10 and the output values of the ROMs 6a and 6b are
They are compared in comparators 7.8. That is, R
The output value of the ROM 6a and the count numbers of the time integration counters 9a and 10a are compared in magnitude by the comparators 7a and 8a, respectively, and the output value of the ROM 6b and the count numbers of the time integration counters 9b and 10b are compared by the comparator 7b, respectively.
, Rh are compared in size. And (RO
M/; output values of a, 6b)> (time integration counter 9a
, 9b, 10a.

1θb count number), comparator 7a17blB
The output of B, 8b becomes 11 lvl, and (ROM6a
, eb output value)<(time integration counters 9a, 9b,
10B, the color y) number of 10b), the comparator 7a,
The output of 7b, 8m, and 8b becomes 10 lebel. When the comparators 7a, 7b, 8a, 8b are outputting IQ #v bell, the related comparators (7a, 7b
, 8a, 8h)
9a, 9b, 10B, 7θb.

) will stop counting.

Then, the hexadecimal shilling counter 5 advances by one in response to the count-up signals of the address designation counters 4a and 4b.
It goes around once with a pulse. In addition, an address designation counter 4a,
The count-up signal 4b is output every 60 degrees in electrical angle. That is, the maximum output value of the address designation counters 4m and 4b indicates the value for 60 degrees of electrical angle, and the ROM
This is the address value for 60 degrees of electrical angle of the data stored in 6a6b.

In the figure, 11 is an oscillator, 13 is an AND circuit, and 14.1
5 is an inverter, I'i, 1B is a latch circuit, 19 is a distribution circuit, 20 is a transistor drive circuit, 21.22, 2
．． 1, 24, 25.26 are transistors, 27.2B,
29, 30. ．． 91.32 is a rectifier, 33 is an induction motor, 1.94 is a DC power supply, and 35 is a one-shot circuit.

In such a configuration, the output signal input from the ring counter 5 to the distribution circuit 19 is as shown in FIG. will be as shown in Figure 3 B and C. From the distribution circuit 19, the transistor drive circuits 20-10 receive U, U, and V as shown in the third diagram.

V, W, and W are added, thereby sequentially operating the transistors 21 to 26 of the inverter main circuit.

The resulting three-phase AC voltage causes the induction motor 33 to
drives the rotation.

[Problems with background technology]

By the way, in the conventional voltage source inverter described above, the voltage - Output pulse signal A of frequency converter 3 and output pulse signal B of oscillator 11
The pulse width of the output pulse signal C of the comparator 8a is not constant even if the ROM data is the same, and the ROM data in FIG.
In this case, the pulse width of the output pulse signal C of the comparator 8a is between four and five times the period of the output pulse signal B of the oscillator 11. Generally, the pulse width of the output pulse signal C of the comparator 8a is (N-1)xTp<(pulse width of the pulse signal of the comparator 8a)≦NXTp. Here, N is the ROM data value, and Tp is the frequency of the oscillator 1. From this relationship, in order to reduce the fluctuation in the pulse width of the comparison aSa pulse signal with the same pulse width, it is necessary to increase the ROM data and shorten the period of the oscillator 11, that is, increase the oscillation frequency, but the operation of the circuit Since there is a limit to the speed, it is not possible to set the oscillation frequency high enough, and this is not a sufficient solution.

As described above, in the conventional voltage source inverter, the output pulse width of the comparator 8a fluctuates, so the inverter output voltage fluctuates, and this fluctuation occurs as a tri-ripple in the induction motor 33 that is rotationally driven by the inverter. There is a drawback that it is not possible to increase the vibration of the induction motor 33 and achieve stable driving.

[Purpose of the invention]

The present invention has been made in order to solve the above-mentioned drawbacks, and its purpose is to suppress fluctuations in the output voltage, reduce vibrations of the induction motor to be driven, and achieve stable driving. The objective is to provide a type inverter.

[Summary of the invention]

In order to achieve the above object, the present invention uses a voltage source inverter that obtains an alternating current voltage from a direct current 'N source by controlling on/off switches to drive an induction motor. Divide into electrical angles 1-5 A function generator that stores in advance a numerical value corresponding to the cumulative voltage-time product value of the sinusoidal AC voltage waveform up to this divided section as a guitar for each divided section, and a function generator that stores it in this function generator. an address designation counter that reads out the data, a time integration counter that counts pulse signals of a constant period and integrates the time, and compares the output signal of the function generator with the output signal of the time integration counter and responds to the comparison value. and a circuit for synchronizing the two pulse signals by using the input pulse of the addressing counter as a clock and the input pulse signal of the time integration counter. It is characterized by:

[Embodiments of the invention]

An embodiment of the present invention shown in the drawings will be described below.

FIG. 5 shows an example of the configuration of a PWM voltage source inverter according to the present invention, and the same parts as in FIG. That is, in FIG. 5, an output pulse signal of the oscillator 11, that is, a time integration counter 9g, 9b is provided between the addressing counter 4 and the voltage-frequency converter q, which is different from the first page.

A flip-flop circuit 96 clocked by input pulse signals of 1 os and 1 ob is provided to synchronize the two pulse signals.

By having such a circuit configuration, the voltage-frequency converter 3, oscillator 11, flip-flop circuit 36 and comparison ? As shown in an example of the timing chart when all ROM data of each output of 5sa is 15', the rear address designation counter 4, which is different from the conventional one,
Since the input signal of , that is, the output signal C of the flip-flop circuit 36 always changes at the falling edge of the output signal B of the oscillator 11, the pulse width of the output signal of the comparison Z8B is always constant (in the example of FIG. (always 5 times the pulse synchronization of oscillator 11)
Therefore, the inverter output voltage becomes constant. in this case,
If the oscillation frequency of the oscillator II itself fluctuates, the pulse width of the output signal of the comparator 8a will also fluctuate, but since the fluctuation in the oscillation frequency of the oscillator JI itself is very small, the inverter output The voltage can be considered to be constant. Also, it is important that the rising edge of the output pulse signal of the comparator 8a (1) is at the same time as the rising edge of the output signal A of the voltage-frequency converter 3. In the circuit shown in @5, the voltage-frequency a flip-prop circuit 3 in which the output signal A of the converter 3 is clocked by the output signal B of the oscillator 11;
I am passing through 6. Therefore, as shown in FIG. 6, the rise of the output pulse D of the comparator 8a is delayed from zero to the maximum cycle of the output pulse B of the oscillator 11 compared to the rise of the output pulse A of the voltage-frequency converter 3. After some time)
As a result, the sine wave approximation of the inverter output voltage waveform decreases, and the current flowing through the induction motor 33 slightly deviates from the sine wave. If you raise the frequency to a certain extent, there is almost no problem.

FIG. 7 compares the time variation of the output voltage with the circuit configuration of FIG. 1 and the time variation of the output voltage B with the circuit configuration of FIG. 5. In other words, in the conventional diagram A-,
The output voltage fluctuates at the beat frequency of the difference between the oscillation frequency of the voltage-frequency converter 3 and the oscillation frequency of the oscillator 11, but as shown in figure B, the output voltage is caused by a zero-voltage inverter.
Almost constant changes over time can be obtained.

In this way, the DC power supply, 9
In a PWM voltage-type inverter that obtains an AC voltage from 4 (which drives the induction motor 33), the voltage waveform of the sine wave AC voltage is divided into electrical angles of a constant width, and the voltage waveform of the sine wave AC voltage up to this divided section is ROM6a, 5b as a function generator that stores in advance a numerical value corresponding to the cumulative voltage-time product value as data for each divided section, and an address for reading the data stored in the ROM6a, 5b as a function generator. With designated counter 4.

Time integration counters 9a, 9b, IOa, 10b that count pulse signals of a constant period and integrate time; output signals of the ROMs 6m, 6b as function generators; and the time integration counters 9a, 9b, 10a.

10b A comparator 73 that compares the output signal with the output signal and sends out an output that determines whether the switch is on or off according to the comparison value.
g 7 bl 8 a t 8b and the heka pulse of the address designation counter 4 is transferred to the time integration counter 9.
A PWM characterized by comprising a flip-flop circuit 36 which synchronizes the two pulse signals using the input pulse signals of a, 9b, 10a and 10b as a clock.
This is a voltage source inverter.

Therefore, by using a zero-voltage inverter, vibrations were generated in the induction motor 33 driven by fluctuations in the output power, but by eliminating fluctuations in the output voltage, vibrations in the induction motor 33 driven can be suppressed to an extremely low level. , stable driving can be performed.

In addition, in the above, the characteristics of the time integration counter and the ROM
If the frequency of the vibrator 11 cannot be increased sufficiently due to the amount of g, etc., a frequency divider circuit 37 is provided between one terminal of the input of the AND gate 13 and the oscillator 1 as shown in FIG. Then, the oscillation frequency of the oscillator 11 may be set high, and the flip-flop circuit 36 may be clocked by pulses of the high frequency. In this way, although the output pulse width of the comparator 8a varies slightly compared to the circuit shown in FIG. 5, the phase of each output pulse of the inverter is improved compared to the circuit shown in FIG. Or you can get performance that is extremely close to that.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to provide an extremely reliable voltage type inverter that can suppress fluctuations in the output voltage, reduce vibrations of the driven induction motor, and perform stable driving.

[Brief explanation of drawings]

Figure 1 shows sine wave PWM using conventional voltage-time product comparison control.
A circuit diagram showing an inverter, Figure 2 (a) (bl is a diagram showing an example of ROM data in the conventional method, and Figure 3 is a diagram showing an example of ROM data in the conventional system.
4 is a timing chart diagram of a conventional waveform shaping circuit, FIG. 5 is a circuit diagram showing an embodiment of the present invention, and FIG. 6 is a circuit diagram of the present invention. FIG. 7 is a timing chart diagram of a waveform shaping circuit according to the present invention, and FIG.
The figure is a circuit diagram showing another embodiment of the present invention. 1... Variable resistor for frequency setting 2... Acceleration/deceleration circuit, 3... Voltage-frequency converter 4.
...Address specification counters 4a, 4b...4 pit-up counters 5...hex ring counters 6a, 6b---Read-only memory (R
OM) 7a, 7b, 1? a, 8b..., comparator 9a, 9
b, 10a, 10b one-hour integration counter II...oscillator, 1,9...asodo gate 14.15...inverter gate 17.18...latch circuit, I9...distribution circuit 20...transistor Drive circuits 21-26...transistor, 27-32...rectifier 33...induction motor, 94...DC current 3
5... One-shot circuit 36... Flip-flop, 37... Frequency divider circuit. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 (a) (b) □ Electricity Figure 3 Figure 4 Prisoner A Figure 5 Figure 6 Cause Figure 7 Figure 8

Claims (1)

[Claims] In a voltage source inverter that controls on/off switches to obtain AC voltage from a DC power source and drive an induction motor, the voltage waveform of the sine wave AC voltage is divided into electrical angles of a certain width, and the voltage waveform of the sine wave AC voltage is divided into electrical angles of a certain width, and the voltage waveform of the sine wave AC voltage is generated up to this divided section. A function generator that stores in advance a numerical value corresponding to the cumulative voltage-time product value of the voltage waveform as data for each divided section, an addressing counter that reads out the data stored in this function generator, and a constant-cycle pulse signal. a time integration counter that counts and integrates the time, and a comparison that compares the output signal of the function generator with the output signal of the time integration counter and sends out an output that determines whether the switch is on or off according to this comparison value. and the input pulse of the addressing counter is clocked by the input pulse signal of the time integration counter.
A voltage source inverter comprising: a circuit for synchronizing two pulse signals.