JPS5946443B2 - Manufacturing method of surface acoustic wave wafer - Google Patents

Manufacturing method of surface acoustic wave wafer

Info

Publication number
JPS5946443B2
JPS5946443B2 JP54040507A JP4050779A JPS5946443B2 JP S5946443 B2 JPS5946443 B2 JP S5946443B2 JP 54040507 A JP54040507 A JP 54040507A JP 4050779 A JP4050779 A JP 4050779A JP S5946443 B2 JPS5946443 B2 JP S5946443B2
Authority
JP
Japan
Prior art keywords
acoustic wave
surface acoustic
manufacturing
substrate
group delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54040507A
Other languages
Japanese (ja)
Other versions
JPS55133118A (en
Inventor
勝義 福田
均 平野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP54040507A priority Critical patent/JPS5946443B2/en
Publication of JPS55133118A publication Critical patent/JPS55133118A/en
Publication of JPS5946443B2 publication Critical patent/JPS5946443B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/08Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of resonators or networks using surface acoustic waves

Description

【発明の詳細な説明】 本発明は弾性表面波素子の群遅延時間温度特性の向上と
、電気機械結合係数の増大をはかり得る弾性表面波用ウ
ェハの製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a surface acoustic wave wafer that can improve the group delay time temperature characteristics of a surface acoustic wave element and increase the electromechanical coupling coefficient.

弾性表面波素子には群遅延時間温度特性の良好な、つま
り広範囲な温度変化に対して群遅延時間変化の少ない性
能と、電気機械係数の大なることが要求される。
Surface acoustic wave elements are required to have good group delay time-temperature characteristics, that is, to have little change in group delay time over a wide range of temperature changes, and to have a large electromechanical coefficient.

上記群遅延特性の良好なるものにSTカット水晶板を用
いたもの等があるが、電気機械結合係数が非常に小さく
、全く実用化に適していない。
Although there are those using an ST-cut quartz crystal plate that have good group delay characteristics, the electromechanical coupling coefficient is very small and they are not suitable for practical use at all.

この為、一般的にはLiNbO3単結晶やLiTaO3
1jlL結晶を基板として用いているが、群遅延特性が
さほど良くないと云う欠点を有している。
For this reason, LiNbO3 single crystal or LiTaO3
Although a 1jlL crystal is used as a substrate, it has the drawback that group delay characteristics are not very good.

そこで群遅延特性の向上をはかる為、例えば米国特許第
3965444号に詳記されるように、弾性表面波基板
上にこの弾性表面波基板とは異質の材料を装置したもの
が提供されるに至っている。
In order to improve group delay characteristics, for example, as detailed in U.S. Pat. No. 3,965,444, a surface acoustic wave substrate has been provided with a material different from that of the surface acoustic wave substrate. There is.

これし\Yカットz方向表面波伝搬のLiTaO5単結
晶基板上にターゲットとして溶融石英を用いた高周波ス
パッタによってSiO2を装着したものである。
This is a LiTaO5 single-crystal substrate with Y-cut and Z-direction surface wave propagation, on which SiO2 is mounted by high-frequency sputtering using fused silica as a target.

ところが上記構造の製造工程において高周波スパッタに
よるSiO□の装着に多大な時間(40〜80時間程度
)を要し、しかも高周波スパッタは一般に10−8 )
−ル程度の真空炉内に酸素を封入して行われるので、そ
の作業が非常に煩雑であると云う問題を有していた。
However, in the manufacturing process of the above structure, it takes a long time (approximately 40 to 80 hours) to attach SiO□ by high-frequency sputtering, and the high-frequency sputtering is generally 10-8).
Since the process is carried out by sealing oxygen in a vacuum furnace of about 100 lbs., the problem is that the work is very complicated.

これが為に生産性が悪く、量産できなかった。Because of this, productivity was low and mass production was not possible.

本発明はこのような事情を考慮してなされたもので、そ
の目的とするところは、電気機械結合係数が高く、しか
も群遅延時間温度特性の良好なる弾性表面波素子、つま
り弾性表面波用ウェハを短時間に簡易にして製造するこ
とのできる弾性表面波用ウェハの製造方法を提供するこ
とにある。
The present invention has been made in consideration of these circumstances, and its purpose is to provide a surface acoustic wave element, that is, a surface acoustic wave wafer, which has a high electromechanical coupling coefficient and good group delay time temperature characteristics. An object of the present invention is to provide a method for manufacturing a surface acoustic wave wafer that can be manufactured easily and in a short time.

以下、図面を参照して本発明に係る製造方法の一実施例
を説明する。
An embodiment of the manufacturing method according to the present invention will be described below with reference to the drawings.

第1図a ” gは同実施例の製造工程を分解して模式
的に示したものである。
Figures 1a and 1g schematically show an exploded view of the manufacturing process of the same example.

タンタル酸リチウム(LiTa03)単結晶をXカット
、112°Y方向表面波伝搬として切出された弾性表面
波基板1は、第1図aに示すようにその上面を鏡面研磨
処理される。
A surface acoustic wave substrate 1, which is cut out from a lithium tantalate (LiTa03) single crystal by X-cutting and 112° Y-direction surface wave propagation, has its upper surface mirror-polished as shown in FIG. 1a.

この鏡面研磨処理された基板1の上面に第1図すに示す
ように1μm程度の厚さにアルミニウム2を真空蒸着に
て形成する。
As shown in FIG. 1, aluminum 2 is formed to a thickness of about 1 μm on the mirror-polished upper surface of the substrate 1 by vacuum evaporation.

しかるのち上記アルミニウム2を所定の櫛歯状パターン
に、例えばPEP(頷蝕亥Ill : Photo
Etching Process)により加工して第1
図Cに示すようにインターデジタル電極3を形成する。
After that, the aluminum 2 is formed into a predetermined comb-like pattern, for example by PEP (Photo
Etching Process)
Interdigital electrodes 3 are formed as shown in Figure C.

これにより従来の一般構造を有する弾性表面波素子が形
成される。
As a result, a surface acoustic wave element having a conventional general structure is formed.

ところで本方法にあっては、インターデジタル電極3を
配設した基板1上に化学蒸気堆積法(CV D : C
hemical Vapor Deposition
)により第1図dに示す如く燐(ロ)を含む二酸化硅素
(5102)4が略2μm程度の厚さに堆積形成される
By the way, in this method, a chemical vapor deposition method (CVD: C
chemical vapor deposition
), silicon dioxide (5102) 4 containing phosphorus (b) is deposited to a thickness of about 2 μm as shown in FIG. 1d.

このCVDによるSiO□4の堆積は、高温における基
板1表面での熱化学反応によりなされるもので、例えば
シラン(SiH4)に少量のホスフィン(PH3)を混
入し、酸素(0□)と熱化学反応させてPSG(リン、
シリケラト・ガラス)と水とを生成することにより燐(
P)を含む二酸化シリコン膜を形成することによりなさ
れる。
This deposition of SiO□4 by CVD is performed by a thermochemical reaction on the surface of the substrate 1 at high temperatures. For example, silane (SiH4) is mixed with a small amount of phosphine (PH3), and oxygen (0□) and thermochemical PSG (phosphorus,
phosphorus (silicerate glass) and water.
This is accomplished by forming a silicon dioxide film containing P).

しかるのち、上記5iO24上にレジスト(Az−13
50J)5を塗布し、回路接続用電極部上方に位置する
上記レジスト5を第1図eに示すように除去し、窓をあ
ける。
After that, a resist (Az-13
50J) 5 is applied, and the resist 5 located above the circuit connection electrode portion is removed as shown in FIG. 1e, and a window is opened.

しかしてS i O24の腐蝕除去処理を施せば第1図
fに示すようにレジスト5により被覆されていない領域
の5iO24のみが除去さね、向路接続用電極3aのみ
が露−出する。
If the S i O 24 is subjected to the corrosion removal process, only the 5 iO 24 in the area not covered with the resist 5 is removed, and only the direction connection electrode 3a is exposed, as shown in FIG. 1f.

その後、第1図gに示すように”レジスト5をに去し、
洗浄することによって弾性表面波用ウェハが形成され、
ボンディング等により電極3aにリード線(図示せず)
を配設して弾性表面波素子が第2図一部切欠断面斜視図
に示すように製作される。
Thereafter, as shown in FIG. 1g, the resist 5 is removed.
A surface acoustic wave wafer is formed by cleaning,
A lead wire (not shown) is connected to the electrode 3a by bonding etc.
A surface acoustic wave element is manufactured by arranging the above elements as shown in the partially cutaway perspective view of FIG. 2.

伺、従来は、 ′ □S
iH4+202−8iO□+2H20 なる熱化学反応により二酸化シリコン膜を形成していた
In the past, ′ □S
A silicon dioxide film was formed by a thermochemical reaction: iH4+202-8iO□+2H20.

ところが二酸化シリコン膜はその性質上、剥離やクラッ
クの発生がある為、弾性表面波I4砂を十分に確保し得
る厚みを得ることが非常に困難であつ島りかもその表面
が粗く、ff、−緻密な構造を有しないが為に表面波特
性があまり良くなかつへ□然るに上記の如ズPSGを形
成することにより二酸化シリコシ膜に付随する箋を解決
等ることが可能となる。
However, due to the nature of silicon dioxide film, it is prone to peeling and cracking, so it is very difficult to obtain a sufficient thickness to secure surface acoustic wave I4 sand, and the surface is rough, ff, -. Since it does not have a dense structure, its surface wave characteristics are not very good.However, by forming PSG as described above, it becomes possible to solve the problems associated with silicon dioxide films.

即sp Sa自体その構造が緻密で表面が滑らかなるが
故□に表面波特性が良く、また剥離やクラックが生じ難
い為に所望とする厚みに容易に形成できる。
Because SP Sa itself has a dense structure and a smooth surface, it has excellent surface wave characteristics, and since peeling and cracking are less likely to occur, it can be easily formed to a desired thickness.

従って従来のものに比して良好なる特性を簡易に得るこ
とが可能となる。
Therefore, it is possible to easily obtain better characteristics than conventional ones.

上記製造方法は具体的には、例えば次のように実施され
る。
Specifically, the above manufacturing method is carried out, for example, as follows.

伺、この例にあってはCVD装置として東京芝浦電気株
式会社製:型式VG−I4を用いて行われる。
In this example, a CVD apparatus manufactured by Tokyo Shibaura Electric Co., Ltd., Model VG-I4 is used.

先ずインターデジタル電極3を配設形成した弾性表面波
基板1をトリクロルエチレンにて5分間程度煮沸し、そ
の表面を洗浄したのちCVD装置のベース上に並べて載
置する。
First, the surface acoustic wave substrates 1 on which the interdigital electrodes 3 are formed are boiled in trichlorethylene for about 5 minutes, and after cleaning the surface, they are placed side by side on the base of a CVD apparatus.

そして上記ベースを10℃/1分間程度の温度上昇率で
450℃に加熱し、前記弾性表面波基板1を高温化する
Then, the base is heated to 450° C. at a temperature increase rate of about 10° C./minute, and the surface acoustic wave substrate 1 is heated to a high temperature.

この状態にて濃度3%のシラン(SiH,)を1分間当
300cc、またホスフィン(PH3)を1分間当り1
.5cc、同時に酸素(02)を1分間当り300 c
c供給してCVDによる基板1上への5i024の堆積
を行わしめる。
In this state, silane (SiH,) with a concentration of 3% was applied at 300 cc per minute, and phosphine (PH3) was applied at 1 minute per minute.
.. 5cc and at the same time oxygen (02) at 300c per minute
5i024 is deposited on the substrate 1 by CVD.

この堆積処理CVDを30分間続ける。This deposition process CVD continues for 30 minutes.

その後上記SiH4。PH3,0□の供給を停止し、C
VD装置内を10℃/1分間程度の割合で常温に戻し、
前記5i02を表面に堆積した基板1を取り出す。
Then the above SiH4. Stop the supply of PH3,0□, and
Return the inside of the VD device to room temperature at a rate of about 10℃/1 minute,
The substrate 1 with the 5i02 deposited on its surface is taken out.

尚、上記作動中にはキャリアガスとしてチッ素ガスを常
時10A/1分間程度流している。
Note that during the above operation, nitrogen gas is constantly flowing at about 10 A/minute as a carrier gas.

゛ このようにして製造される弾性表面波ウェハ哄基板
1上にPSG(リン・シリケイト・ガラス)を被覆した
構造となる。
゛ The surface acoustic wave wafer substrate 1 manufactured in this manner is coated with PSG (phosphorus silicate glass).

つまり弾性表面波ウェハはその表面を前記ホスフィン(
PH3)によって燐(至)がドープされたSiO□によ
り覆われたものとなる。
In other words, the surface acoustic wave wafer has its surface covered with the phosphine (
It is covered with SiO□ doped with phosphorus (PH3).

この為、弾性表面波基板1の有する群遅延時間の温度特
性とかドープされた5i024の有する群遅延時間の温
度特性とが互いに相殺し、これにより群遅延時間温度特
性の向上をはかり得る。
Therefore, the temperature characteristics of the group delay time of the surface acoustic wave substrate 1 and the temperature characteristics of the group delay time of the doped 5i024 cancel each other out, thereby improving the group delay time temperature characteristics.

この点、従来の二酸化シリコン膜では上記効果が全く期
待できない。
In this respect, the above effects cannot be expected at all with conventional silicon dioxide films.

例えば上記実施例にて製造されたものの群遅延時間の温
度特注は5 /’C程度であり、従来20 ppm
/ ’Cであったものに比して格段に良好な特性を示す
For example, the temperature customization of the group delay time of the product manufactured in the above embodiment is about 5/'C, and the conventional temperature is 20 ppm.
/ 'C exhibits much better characteristics.

しかも電気機械結合係数法測定周波数100MHzにお
いて1.4チと、5i024を装着しないものの0.8
%に比して向上している。
Moreover, at the electromechanical coupling coefficient method measurement frequency of 100 MHz, it was 1.4 and 0.8 without installing 5i024.
%.

つ捷り電気機械結合係数の向上をも同時にはかり得る。It is also possible to simultaneously improve the switching electromechanical coupling coefficient.

また二次的には、従来方法により製造されたものに比し
て弾性表面波用ウェハのそりを20%程度減少すること
ができ、そりの少ない均一なウェハを量産することが可
能となった。
Additionally, as a secondary benefit, the warpage of surface acoustic wave wafers can be reduced by approximately 20% compared to those manufactured using conventional methods, making it possible to mass-produce uniform wafers with less warpage. .

また高周波スパッタを用いることがなく、同時に燐をド
ープした5i02’&被覆するのでその表面が非常に滑
らかとなり、所謂ひθ割れやS io2膜のはがれ等の
不慮の事態を生じることがなくなる。
Further, since high frequency sputtering is not used and the phosphorus-doped 5i02' coating is applied at the same time, the surface becomes very smooth, and unexpected situations such as so-called θ cracking and peeling of the Sio2 film do not occur.

これは5iQ2を被覆しただけでは、その表面がポーラ
スな状態となるに対し一項ドープによる滑らかさが生じ
たことに起因する。
This is because the surface becomes porous when only coated with 5iQ2, but smoothness occurs due to single-term doping.

更には本方法において最も特徴的なことは製造処理時間
が非常に短いことである。
Furthermore, the most characteristic feature of this method is that the manufacturing processing time is extremely short.

即ち従来の高周波スパッタにより5i02膜を2μm程
程の厚さに形成するには40〜80時間をも要する。
That is, it takes 40 to 80 hours to form a 5i02 film to a thickness of about 2 μm using conventional high-frequency sputtering.

これに対してCVDによれば2時間程度で2μm程度の
厚さのPSG膜を形成することができる。
On the other hand, with CVD, a PSG film with a thickness of about 2 μm can be formed in about 2 hours.

これは基板10表面加熱と相俟ってPSGが容易に基板
1表面に堆積する為である。
This is because PSG is easily deposited on the surface of the substrate 1 together with the heating of the surface of the substrate 10.

従って、短時間にて製造工程を終了でき、量産性の向上
をはかり得、捷だPSGの成長速度が速く、その制御も
簡易である為に取り扱いが容易である。
Therefore, the manufacturing process can be completed in a short time, mass productivity can be improved, and since the growth rate of the thin PSG is fast and its control is simple, it is easy to handle.

以上説明したように本発明によれば群遅延時間温度特性
の向上と電気機械結合係数の増大をはかり得る等の利点
を奏する弾性表面波用ウエノ・をCVD法を有効利用し
て簡易な制御でしかも短時間で製造できると云う優れた
効果を発揮し、量産性に優れている等の利点を奏する。
As explained above, according to the present invention, surface acoustic wave wafers, which have advantages such as improved group delay time temperature characteristics and increased electromechanical coupling coefficient, can be easily controlled by effectively utilizing the CVD method. Furthermore, it exhibits the excellent effect of being able to be manufactured in a short time, and has advantages such as being excellent in mass productivity.

伺、本発明は上記実施例にのみ限定されるものではなX
、)例えば各工程に要する処理時間等は設計仕様に応じ
て定めればよく、つまり電極の厚さ、PSG膜の厚さ等
は例えば2〜10μm程度と適宜定めればよい。
Please note that the present invention is not limited only to the above embodiments.
,) For example, the processing time required for each step may be determined according to the design specifications, that is, the thickness of the electrode, the thickness of the PSG film, etc. may be determined as appropriate, for example, about 2 to 10 μm.

またCVDによる条件設定等も適宜定めればよいことは
勿論である。
It goes without saying that conditions for CVD may also be determined as appropriate.

更には基板1として圧電性のものを用いればよく、Li
NbO3単結晶等に対しても同様に適用できる。
Furthermore, a piezoelectric material may be used as the substrate 1, and Li
It can be similarly applied to NbO3 single crystals and the like.

要するに本発明方法は、その要旨を逸脱しない範囲で種
々変形して実施することができる。
In short, the method of the present invention can be implemented with various modifications without departing from the gist thereof.

【図面の簡単な説明】[Brief explanation of drawings]

第1図a ”−’ gは本発明方法の一実施例を示す製
造1造を模式的に示した図、第2図は本方法により製造
された弾性表面波用クエハの一部切欠断面斜視図である
。 1・・弾性表面波基板、2・・・アルミニウム(電極用
)、3・・・電極、4・・・5iO2(PSG)、 5
・・・レジスト。
Figures 1a and 1g are diagrams schematically showing a manufacturing structure showing an embodiment of the method of the present invention, and Figure 2 is a partially cutaway cross-sectional perspective view of a surface acoustic wave quencher manufactured by the method of the present invention. It is a diagram. 1... Surface acoustic wave substrate, 2... Aluminum (for electrode), 3... Electrode, 4... 5iO2 (PSG), 5
...Resist.

Claims (1)

【特許請求の範囲】[Claims] 1 弾性表面波基板上にシラン(SiH,)と酸素(0
)との反応物を主成分とした熱化学反応生成物からなる
燐(0を含む二酸化シリコンを化学蒸気堆積法により装
着することを特徴とする弾性表面波用ウェハの製造方法
1 Silane (SiH, ) and oxygen (0
1. A method for manufacturing a surface acoustic wave wafer, characterized in that silicon dioxide containing phosphorus (0), which is a thermochemical reaction product whose main component is a reaction product with phosphorus (0), is attached by a chemical vapor deposition method.
JP54040507A 1979-04-04 1979-04-04 Manufacturing method of surface acoustic wave wafer Expired JPS5946443B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54040507A JPS5946443B2 (en) 1979-04-04 1979-04-04 Manufacturing method of surface acoustic wave wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54040507A JPS5946443B2 (en) 1979-04-04 1979-04-04 Manufacturing method of surface acoustic wave wafer

Publications (2)

Publication Number Publication Date
JPS55133118A JPS55133118A (en) 1980-10-16
JPS5946443B2 true JPS5946443B2 (en) 1984-11-13

Family

ID=12582453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54040507A Expired JPS5946443B2 (en) 1979-04-04 1979-04-04 Manufacturing method of surface acoustic wave wafer

Country Status (1)

Country Link
JP (1) JPS5946443B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112007002083B4 (en) * 2006-09-21 2018-05-30 Murata Manufacturing Co., Ltd. Boundary acoustic wave device

Also Published As

Publication number Publication date
JPS55133118A (en) 1980-10-16

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