JPS594243A - Code generator for frequency selection - Google Patents

Code generator for frequency selection

Info

Publication number
JPS594243A
JPS594243A JP57112063A JP11206382A JPS594243A JP S594243 A JPS594243 A JP S594243A JP 57112063 A JP57112063 A JP 57112063A JP 11206382 A JP11206382 A JP 11206382A JP S594243 A JPS594243 A JP S594243A
Authority
JP
Japan
Prior art keywords
frequency
series
bit
circuit
sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57112063A
Other languages
Japanese (ja)
Other versions
JPH0427741B2 (en
Inventor
Takemi Adachi
安達 竹美
Keiji Mori
森 啓次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57112063A priority Critical patent/JPS594243A/en
Publication of JPS594243A publication Critical patent/JPS594243A/en
Publication of JPH0427741B2 publication Critical patent/JPH0427741B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W84/00Network topologies

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To increase remarkably the number of frequency selecting codes led out from one kind of M series formed with an n-stage in series connection shift register, by extracting a consecutive n-bit at each m-bit of the generated M series (where; m is a natural number being prime number with 2n-1 and smaller than 2n-1). CONSTITUTION:A frequency-divided signal is applied to an M series generating circuit 13 consisting of n-stage of shift registers of series connection, and the n- bit signal generated from the generating circuit 13 is applied to a latch circuit 14. On the other hand, a signal outputted from a basic clock generating circuit 11 is applied to the 2nd frequency dividing circuit 15 and frequency-givided into a period, e.g., m-times the period of the 1st frequency division circuit 12. This signal is applied to the latch circuit 14, from which the consective n-bit at each m-bit is extracted from the M series, and the frequency selecting code is produced. Thus, the number of channels possible for simultaneous communication is increased in the spread spectrum communication system using the frequency hopping system.

Description

【発明の詳細な説明】 この発明は周波数ホラぎング方式によるスプレッド・ス
ペクトラム通信(以下、5SFH通信方式と称す)にお
いて使用される周波数選択用符号発生装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency selection code generator used in spread spectrum communication using a frequency hollaging method (hereinafter referred to as 5SFH communication method).

周知のように、5SFH通信方式にお・いて、ホッピン
グにしたがって順次選択される周波数を出現順に並べた
ものを「周波数列」と呼ぶことにすれば、この周波数列
は次に示す性質をもっていることが必要である@ 性質1)単独の周波数列の性質として、その−周期の間
に総べての使用周波数が一 様かつランダムに選び出されていなけ ればならない。
As is well known, in the 5SFH communication system, if frequencies that are sequentially selected according to hopping are arranged in the order of their appearance and are called a "frequency sequence," this frequency sequence has the following properties. @Property 1) As a property of a single frequency sequence, all frequencies used must be uniformly and randomly selected during its cycle.

性質2)複数の11j4信路間での混信・干渉を避ける
ため、両道話路で使用される周波 数列同志には相関があってはならない。
Property 2) To avoid crosstalk and interference between multiple 11j4 channels, there must be no correlation between frequency sequences used in both channels.

性質2)は実質的な意味で考えると、次の判定条件を満
たずことと考えられる。即ち、化1図に示す参1.寺2
という周波数列同志で、[対応するホップ時点での周波
数差111”−f:” I PI f2”−f2+21
 、・・・を周波数りの一周期にわたって順次求めた場
合、この周波数差がある一定値;fs未満になる時点が
連続したシ、多発したシしないことが÷1を固定し、÷
2を時間軸上で1ホツプずつスライドさせた総べての場
合に成立すること」と考えられる。但し、f、は運用方
式によシ決まる。
When property 2) is considered in a practical sense, it can be considered that the following judgment condition is not satisfied. That is, reference 1. shown in Figure 1. temple 2
For the frequency strings, [frequency difference at the corresponding hop point 111"-f:"I PI f2"-f2+21
, .
2 on the time axis by one hop at a time.'' However, f is determined depending on the operating method.

従来、スプレ、ド・スペクトラム通信において使用され
る周波数選択用符号(疑似ランダムコード)としては、
n段のシフトレノスタヲ直列接続し、この各シフトレジ
スタよ多出力される信号の排他的論理和を初段のシフト
レジスタの入力に帰還する装置により得られるところの
M系列が考えられている。このM系列を周波数選択用符
号として用いた基本的な例を説明する。
Conventionally, the frequency selection code (pseudorandom code) used in spray and spectrum communications is as follows:
An M-sequence is being considered which is obtained by a device in which n stages of shift registers are connected in series and the exclusive OR of the signals outputted from each of the shift registers is fed back to the input of the first stage shift register. A basic example in which this M sequence is used as a frequency selection code will be explained.

第2図(、)はn = 7とし7段直列接続シフトレジ
スクの2.4,6.7段目の出力信号の排他的論理和を
初段に帰還することによシ得られる27−1の符号長を
もつM系列である。このM系列から連続する7ビツトを
順次取り出すことによシ、同図(b)に示す63,31
,79・・・という順で1〜127の周波数を選択する
ことができる。この周波数列(一般に、(fi)と表わ
す)はM系列の性質から周知のように前記性質l)を満
たす。この方法で性質2)を満足する他の周波数列を作
る手段としては、帰還部分を構成する各段の出力の組合
せを変え、異るM系列を作る方法が考えられる。しかし
、同じ段数のシフトレジスタを用いて作シ出し得るM系
列の種類は非常に少なく、例えば7段の場合9種類しか
存在しない。したがって、この周波数帯で同時に通信可
能なチャンネル数は9チヤンネルしか存在しないことに
なる。
Figure 2 (,) shows a code of 27-1 obtained by setting n = 7 and feeding back the exclusive OR of the output signals of the 2.4th and 6.7th stages of the 7-stage series-connected shift register to the first stage. It is an M sequence with length. By sequentially extracting 7 consecutive bits from this M series, 63, 31 as shown in FIG.
, 79, . . . frequencies 1 to 127 can be selected in this order. This frequency sequence (generally expressed as (fi)) satisfies the above-mentioned property 1, as is well known from the properties of the M sequence. As a means of creating another frequency sequence that satisfies property 2) using this method, it is possible to create a different M sequence by changing the combination of the outputs of each stage that constitutes the feedback section. However, there are very few types of M-sequences that can be created using shift registers with the same number of stages; for example, in the case of seven stages, there are only nine types. Therefore, there are only nine channels that can communicate simultaneously in this frequency band.

この発明は上記事情に基づいてなされたもので、その目
的とするところはn段の直列接続シフトレジスタによシ
作られる一種類のM系列から導出される周波数選択用符
号の数を飛躍的に増大することができ、5SFH通信方
式における同時通信可能なチャンネル数を増大すること
が可能な周波数選択用符号発生装置を提供しようとする
ものである。
This invention was made based on the above circumstances, and its purpose is to dramatically increase the number of frequency selection codes derived from one type of M sequence created by n-stage series-connected shift registers. The present invention aims to provide a frequency selection code generator capable of increasing the number of channels capable of simultaneous communication in the 5SFH communication system.

以下、この発明の一実施例について図面を参照して説明
する。
An embodiment of the present invention will be described below with reference to the drawings.

この発明においても基本的には前述したn段の直列接続
シフトレジスタによるM系列を利用するものである。し
かし、とのM系列から周旋数選択用のnビ、トを取シ出
す際、前述の方法では1ホ、ゾ毎に1ビツトずらした連
続するnビットを取シ出していだのに対し、この発明で
は1ホツグ毎にmビットずらした連続するnビットを取
り出すようにしている。但し、mは(2”−1)と互い
に素で、且つ(2”−1)よシ小さい自然数でなければ
ならない。
This invention also basically utilizes the M series formed by the aforementioned n-stage series-connected shift registers. However, when extracting n bits and gs for selecting the rotation number from the M series of In this invention, consecutive n bits shifted by m bits are taken out for each hog. However, m must be a natural number that is coprime to (2''-1) and smaller than (2''-1).

即ち、第2図(c)は同図(b)における基本周波数列
(fl)を生成するのに用いたM系列に対して、例えば
rn = 2として周波数例(f’tlを示したもので
ある。この周波数例において、周波数は63゜79.1
15.・・・のようにホッグすることになる。つまシ新
たに得られた周波数列の1番目の周波数f/、は第2図
(b)の周波数列(f+)の要素を用いて 八=fM。
That is, Fig. 2(c) shows an example frequency (f'tl) with rn = 2 for the M sequence used to generate the fundamental frequency sequence (fl) in Fig. 2(b). In this frequency example, the frequency is 63°79.1
15. You will end up with a hog like... The first frequency f/ of the newly obtained frequency sequence is 8=fM using the elements of the frequency sequence (f+) in FIG. 2(b).

但し、 Ml = 〔(1−1)・m)Mod(z”−1)+ 
1−(1)と表わされる。この時、t=i、つま、b 
i初ノ時点で選択された周波数が再び現われる時点を工
番目のホップ時点とすると (I−1) ・m=(2”−1) ・P−・(2)(但
し、Pは自然数) が成立する。(2)式を満足するlとPの組合せの中で
最小の■は、mと(2”−1)が互いに素であることか
ら2nである。これは周波数列の一周期が終った時点に
相当する。したがって、周波数列の一周期内で同じ周波
数が2度出現することはなく、総べての使用周波数が一
様に選択され、しかも、基本周波数列と同程度に無作為
に選択される。即ち、この発明で作られた周波数列は性
質1)を満足し、性質2)に関しては得られた周波数列
同志に実際に判定条件を適用して検鉦を行なう必要があ
る。結局この実施例によれば、1種類のM系列から最大
で2n−1よシ小さく、2n−1と互いに素な自然数の
個数分だけの周波数列を生成することができ、同時に通
信可能なチャンネル数を増大することができる。
However, Ml = [(1-1)・m) Mod(z”-1)+
It is expressed as 1-(1). At this time, t=i, Tsuma, b
If the time point at which the frequency selected at the i-first time point appears again is the hop time point, then (I-1) ・m=(2”-1) ・P-・(2) (where P is a natural number) This holds true. Among the combinations of l and P that satisfy equation (2), the smallest ■ is 2n because m and (2''-1) are relatively prime. This corresponds to the end of one cycle of the frequency sequence. Therefore, the same frequency does not appear twice within one cycle of the frequency sequence, and all frequencies used are uniformly selected, and moreover, they are selected at random to the same degree as the basic frequency sequence. That is, the frequency string created according to the present invention satisfies property 1), and regarding property 2), it is necessary to perform a test by actually applying a judgment condition to the obtained frequency strings. After all, according to this embodiment, it is possible to generate as many frequency sequences as natural numbers that are smaller than 2n-1 at most and coprime to 2n-1 from one type of M sequence, and to use channels that can communicate simultaneously. The number can be increased.

第3図は上記原理に基づく回路構成例である。FIG. 3 shows an example of a circuit configuration based on the above principle.

11は基本クロック発生回路であり、この回路11より
出力される信号は第1の分周回路12に供給され所定周
期に分周される。この分周された信号はn段の直列接続
されたシフトレノスタ等からなるM系列発生回路13に
供給され、この発生回路13において発生されたnビッ
トの信号はラッチ回路14に供給される。一方、前記基
本クロック発生回路11よシ出力される信号は第2の分
周回路15に供給され、前記第1の分周回路12の例え
ばm倍の周期に分周される。この信号は前記ラッチ回路
14に供給され、このラッチ回路14よりM系列からm
ビット毎に連続するnビットが取り出され、周波数選択
用符号が生成される。
11 is a basic clock generation circuit, and the signal output from this circuit 11 is supplied to a first frequency dividing circuit 12 and divided into a predetermined period. This frequency-divided signal is supplied to an M-sequence generation circuit 13 consisting of n stages of shift renostars connected in series, and the n-bit signal generated in this generation circuit 13 is supplied to a latch circuit 14. On the other hand, the signal outputted from the basic clock generating circuit 11 is supplied to a second frequency dividing circuit 15, and is frequency-divided into a period that is, for example, m times that of the first frequency dividing circuit 12. This signal is supplied to the latch circuit 14, and from this latch circuit 14,
Consecutive n bits are extracted bit by bit, and a frequency selection code is generated.

尚、第1、第2の分周回路12t 15の分周率をそれ
ぞれ任意に可変し得るように構成することによシ、クロ
ック周波数を変えることができる。
Note that the clock frequency can be changed by configuring the first and second frequency dividing circuits 12t to 15 so that their frequency division ratios can be varied arbitrarily.

以上、詳述したようにこの発明によれば、発生されたM
系列のmピッ)(mは2n−1と互いに素で、且つ2n
−1より小さい自然数)毎に連続するnピ、トを取り出
すことにより、n段の直列接続シフトレジスタによシ作
られる一種類のM系列から導出される周波数選択用符号
の数を飛躍的に増大することができ、5SFH通信方式
における同時通信可能なチャンネル数を増大することが
可能な周波数選択用符号発生装置を提供できる。
As detailed above, according to the present invention, the generated M
m pitches of the series) (m is coprime to 2n-1, and 2n
By extracting consecutive n bits and gs for every (natural number smaller than -1), the number of frequency selection codes derived from one type of M sequence created by n stages of series-connected shift registers can be dramatically increased. It is possible to provide a frequency selection code generator that can increase the number of channels that can be simultaneously communicated in the 5SFH communication system.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は周波数ホッピング方式によるスプレッド・スペ
クトラム通信における周波数と時間の関係を説明するた
めに示す図、第2図(a) (b) (C)はそれぞれ
従来およびこの発明に係わる周波数選択用符号発生装置
の原理を説明するために示す図、第3図はこの発明に係
わる周波数選択用符号発生装置の一実施例を、示す構成
図である。 11・・・基本クロック発生回路、12.15・・・第
1.第2の分周回路、13・・・M系列発生回路、14
・・・ラッチ回路。 第1図 第2図 c)   6379 +7’。 (f*’c’ f+’ 6 f; 第3図
FIG. 1 is a diagram shown to explain the relationship between frequency and time in spread spectrum communication using the frequency hopping method, and FIG. FIG. 3, which is a diagram for explaining the principle of the generator, is a configuration diagram showing an embodiment of the frequency selection code generator according to the present invention. 11... Basic clock generation circuit, 12.15... 1st. Second frequency dividing circuit, 13...M sequence generation circuit, 14
...Latch circuit. Figure 1 Figure 2 c) 6379 +7'. (f*'c'f+' 6 f; Fig. 3

Claims (1)

【特許請求の範囲】[Claims] 周波数ホッピング方式の周波数選択用符号発生装置にお
いて、n段の直列接続シフトレジスタと、このシフトレ
ジスタの所定段よシ出力される信号の排他的論理和を初
段のシフトレジスタに帰還することによシnピットのM
系列を発生させる回路と、この発生されたM系列よりm
ピッ)(mは2n−1と互いに素で2n−1より小さい
自然数)毎に連続するnビットを周波数選択用符号とし
て取シ出す構成としたことを%徴とする周波数選択用符
号発生装置。
In a frequency hopping type frequency selection code generator, the system is generated by feeding back the exclusive OR of signals output from n stages of serially connected shift registers and a predetermined stage of the shift registers to the first stage shift register. M of n pit
A circuit that generates a sequence, and m from this generated M sequence.
A frequency selection code generator characterized by a structure in which consecutive n bits are extracted as a frequency selection code every time (m is a natural number that is coprime to 2n-1 and smaller than 2n-1).
JP57112063A 1982-06-29 1982-06-29 Code generator for frequency selection Granted JPS594243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57112063A JPS594243A (en) 1982-06-29 1982-06-29 Code generator for frequency selection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57112063A JPS594243A (en) 1982-06-29 1982-06-29 Code generator for frequency selection

Publications (2)

Publication Number Publication Date
JPS594243A true JPS594243A (en) 1984-01-11
JPH0427741B2 JPH0427741B2 (en) 1992-05-12

Family

ID=14577113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57112063A Granted JPS594243A (en) 1982-06-29 1982-06-29 Code generator for frequency selection

Country Status (1)

Country Link
JP (1) JPS594243A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7356104B2 (en) 2003-07-10 2008-04-08 Shinji Fukuda Radio communication apparatus and interference avoiding method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710554A (en) * 1980-06-20 1982-01-20 Nec Corp Modulation and demodulation device for frequency spread multiplex communication

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710554A (en) * 1980-06-20 1982-01-20 Nec Corp Modulation and demodulation device for frequency spread multiplex communication

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7356104B2 (en) 2003-07-10 2008-04-08 Shinji Fukuda Radio communication apparatus and interference avoiding method
US7555030B2 (en) 2003-07-10 2009-06-30 Panasonic Corporation Radio communication apparatus and interference avoiding method

Also Published As

Publication number Publication date
JPH0427741B2 (en) 1992-05-12

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