JPS63110837A - Transmitter for spectram scattering signal - Google Patents

Abstract

PURPOSE:To improve the efficiency of using a frequency by using as a scattering code a thing obtained by adding the same pattern with two or more chips to the output of M-frequency from a gold code generator. CONSTITUTION:A transmission signal string is inputted from a terminal 100' and sequentially inputted to a three-stage shift register 10. The contents of the register 10 are inputted in parallel as initial values for three stages among four stages of a shift register 11. Simultaneously the register 11 sets '1' to the fourth stage. The register 11 and an exclusive OR 31 constitute an M-system string generator. Based on a signal from a counter 30, a shift register 12 sets all contents to '1'. The register 12 and an exclusive OR 32 constitute the M- system string generator. With the aid of an exclusive OR 33, '1's outputted from the registers 11 and 12 and the M-system strings of one frequency, which have different generation polynominals are added according to a rule 2, and outputted as the scattering code. It is converted 34 into a voltage, multiplied 35 by a carrier signal and outputted.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a spread spectrum signal transmitter.

(Prior art) The so-called spread spectrum method, in which an information signal is multiplied by a wideband spreading code, transmitted, and then despread and returned to a narrowband signal on the receiving side, has the advantages of excellent interference characteristics, fading resistance, and secrecy. However, it is less efficient in frequency usage than communication systems that use narrowband signals.

On the other hand, in Japanese Patent Application No. 1988-033;1'88 [Spread Spectrum Communication System and Receiving Apparatus], information to be transmitted is inputted as an initial value into a register of a spreading code (Gold code) generator. , a spreading code that corresponds one-to-one to the initial value bit pattern is generated and transmitted, and the receiver sequentially changes the coefficients of a matched filter with respect to this signal over time to generate all spreading codes that may be transmitted. Detecting code slams and correlations. Since there is a one-to-one correspondence between the time position at which the peak value appears in the output of the matched filter and the initial value of the register of the transmitter's spreading code generator,
If the initial value of the register is transmitted as information by detecting this time position, the amount of transmitted information can be increased.

Furthermore, when the information rate is the same, compared to the conventional method of multiplying by a spreading code, this method requires less occupied bandwidth, and as a result, the S/N ratio is improved.

(Problem to be Solved by the Invention) The cross-correlation between different code words corresponding to different initial values of the N-stage register of the Gold code generator is the same as the autocorrelation of the M-sequence code when there is a phase difference. Yes, it is -1, so it is not completely zero. Since the autocorrelation is 2'-1,
The distance between code words is 2N. (References Written by R. Gold.

“Obtimal Binary Sequence for Spread Spectrum Multiplexing J (O
ptirnal Binary 5equences
for SpreadSpectrum Multip
lexing), IE Transactions on Information Theory (IE
EE Trans, Info, Th,), October 1967 issue) In addition to the fact that the code words are not completely orthogonal, the transmitting side changes the gold code's ``1'' to ``0'' and 0'' to ``0''. If you want to increase the amount of information by determining whether the correlation value is positive or negative by making it possible to send it even if it is reversed to 1", the correlation value will be 2N-1, 1, -
Since the value is either 1 or -2N÷1, the distance between codes is reduced to 2N-2, and the code error rate is degraded.

Furthermore, since the code word length output from the N-stage Gold code generator is an odd number of 2N-1 chips, this may be inconvenient in terms of the configuration of the device. For example, a 2N-1 stage counter required for a transmitter generally requires an additional circuit in addition to the 2N counter, resulting in a complicated configuration.

In this way, the code length of 2N chips is more convenient for the circuit configuration.

An object of the present invention is to provide a spread spectrum signal transmitter that solves these problems and has good frequency utilization efficiency.

(Means for Solving the Problem) The transmitter of the first aspect of the present invention comprises <a) an N-stage shift register to which a transmission digital signal is supplied; <b) a transmitter whose initial value is the contents of the N-stage shift register. 1 N-stage M-sequence generator and a second N-stage M-sequence generator with a constant initial value.
an N-stage gold code generator comprising a stage M-sequence generator and an exclusive OR to which the outputs of the first and second N-stage M-sequence generators are supplied; (c) the N-stage gold code generation; (d) a level converter that converts the voltage of the output of the encoder; (e) modulation for the output of the level converter; It consists of a modulator that performs the following.

A transmitter according to a second aspect of the present invention includes: (a) a 2N-stage shift register to which a transmission digital signal is supplied; (b) first and second N-stage M sequences whose initial values are the contents of the 2N-stage shift register; a generator, and the first and second
(c) an N-stage gold code generator consisting of an exclusive OR to which the output of the N-stage M-sequence generator is supplied; (c) one or more chips identical to the M period output of the N-stage gold code generator; an encoder that adds a pattern; (d) a level converter that converts the voltage of the output of the encoder; and (e) a modulator that modulates the output of the level converter.

It is composed of.

(Operation) Gold codes have the same period but different generator polynomials.
This is a sequence obtained by modulo 2 addition of two M sequences.

The Gold code generator therefore consists of two M-sequence generators and an adder that combines their outputs. The N-bit digital signal to be transmitted is
Input as the initial value of the step register. The initial value of the N-stage register of the other M-sequence generator is kept constant, and the same M-sequence is always generated. The modulo 2 addition of the outputs of these M-sequence generators is the Gold code. In this way, the initial value N
There is a one-to-one correspondence between the bits and the 2N gold codes.

However, it is known that the codeword length of the Gold code generated in this manner is 2N-1 chips, and the cross-correlation between different codewords generated from different initial values is -1.

In the present invention, a spread code obtained by adding one or more chips of the same pattern to the M-period output of a Gold code generator is used.

For example, if a code word of one period is added with the same pattern of one chip of "1'° or O"' as a spreading code, it is possible to make the cross-correlation between different code words 0.This is because Since the added 1 chip is equal for all codewords, the cross-correlation value increases by 1, and the cross-correlation value of the Gold code - 1 becomes O. In this way, we obtain completely orthogonal codes. By using this code, the sending side can change the gold code “1” to 0.
In addition, it is possible to transmit even if "0" is reversed to "1" (also when increasing the amount of information by determining whether the correlation value is positive or negative).
The distance between code words does not decrease and the code error rate does not deteriorate.

In this case, since the code word length is obviously 2N chips, the configuration of the device is also simpler than in the case of 2N-1.

A similar Gold code generator can also be used to further increase the amount of information transmitted. A 2N-bit digital signal to be transmitted is divided into N bits each and input as initial values to N-stage registers of two M-sequence generators constituting a Gold code generator. The modulo 2 addition of the outputs of these M-sequence generators plus one chip of the same pattern is transmitted as a transmission signal. In this way, different codes generated from different initial values are not completely orthogonal to each other, but the cross-correlation between these codes is 2(N+1 +
/2 (N is an odd number), or 2fN+21/2 (pJ
is an even number). This is because the cross-correlation of the Gold codes generated in this way is 2fN+ll/2-1~
2(N+11/2-1 (N odd number), t take-2
""2"z-L ~2(N+21/24 (N is an even number)
This is because the above-mentioned document makes clear that it is guaranteed to be within the range of .

(Example) Next, the present invention will be described in detail with reference to the drawings. FIG. 4 is a diagram showing an outline of a communication system using the transmitter of the present invention. A signal sequence to be transmitted is input from an input terminal 100 and stored in an N-stage shift register 110. Next, the N-bit data in the shift register 110 is loaded as the initial value of the spreading code generator 120. Spreading code generator 120 transmits a signal of one period (2N chips) to modulator 130 based on this initial value. In the modulator 130, the spreading code generator 12 uses the carrier frequency of the oscillator 140.
0 is subjected to two-phase phase modulation and transmitted from the antenna 150.

In the receiving section 11m, the signal received from the antenna 160 is synchronously detected by a synchronous detector 170. Serial-to-parallel conversion circuit 1
Reference numeral 80 outputs the code words for one period from the output of the synchronous detector 170 by converting them into serial/parallel, and holds them for one period. For the received signal held in the serial-to-parallel conversion circuit 180, the matched filter 190 changes its coefficients over time so as to realize all the transmission patterns of the 2N types of spreading codes, and converts the received signal and the spreading code. Calculate correlation. Since the cross-correlation between different spreading codes is completely zero and orthogonal, the maximum value appears at the output when the coefficients of the matched filter match the received signal. In other words, the time at which the output of the matched filter reaches its maximum value is uniquely determined by the initial value of the register of the spreading code generator 120 on the transmitting side. Therefore, if this peak is detected by the maximum value detection circuit 200 and the time position at that time is given as an initial value to the spreading code generator by the conversion circuit 210, an N-bit signal can be detected.

Next, a more specific embodiment of the transmitter in the outline shown in FIG. 4 will be described. The embodiment will be described for the simplest case where N=3.

FIG. 1 is a diagram showing a first embodiment of a transmitter according to the present invention. In this example, “0” is added to the gold code of 7 ticks.
It generates 8-chip mutually orthogonal spreading codes with . Actually, in order to simplify the circuit configuration, instead of adding "0" to the Gold code, "1" is added to each of the two different M sequences that make up the Gold code in advance.
The code obtained in this way is equal to the code obtained by adding the same button "0" to the Gold code, and is completely orthogonal.

A transmission signal sequence is input from a terminal 100' and is sequentially input to a three-stage shift register 10 driven by a clock supplied from a transmission signal clock source 20. After the 3 bits of the transmission signal are stored in the shift register 10, the contents of the shift register 10 are stored in parallel based on the signal from the counter 30 as initial values for the first to third stages of the four-stage shift register 11 that generates the M sequence. is input. At the same time, the shift register 11 sets 1 in the fourth stage register based on the signal from the counter 30. The shift register 11 and the exclusive OR 31 constitute a three-stage M-sequence generator. The counter 30 sends a signal to the shift register 11 and also sends a signal to the four-stage shift register 12. Shift register 12 sets all contents to 1 based on this signal. The shift register 12 and the exclusive OR 32 constitute an M-sequence generator. These two M-sequence generators are connected in advance so as to generate M-sequences with different generating polynomials, and are driven by a clock source 21. The oscillation frequency of the clock source 21 is 8/3fΔ of that of the clock source 20. Furthermore, every time the counter 30 counts eight clock signals from the clock 421, it sends a set signal to the register 11 to set the fourth register to 1 and input the contents of the register 10 to the remaining three registers. A set signal is issued to set the contents of all registers to 1. Register 11 and register 12 are clock source 21
Following the leading "'1", M sequences with different generating polynomials are generated and output to the exclusive OR 33. The period of the 3-stage M sequence is 7, and the code word length is 8 if you include the leading "1", so each time the initial value is loaded from register 10, registers 11 and 12 receive data for one period. The code word will be output.The M sequences for one period with different generator polynomials from the '1' output from the registers 11 and 12 are added modulo 2 by the exclusive OR 33 and then diffused. Output as a sign. The spreading code output from the exclusive OR 33 is converted by the level converter 34 into a voltage corresponding to "1" when it is "1" and a voltage corresponding to "-1" when it is "0". It is multiplied by the carrier signal from the oscillator 22 in the multiplier 35, subjected to two-phase phase modulation, and outputted from the output terminal 101. FIG. 2 shows the relationship between the transmitted data, the outputs of registers 11 and 12, and the generated spreading codes.

FIG. 3 shows a second embodiment of the transmitter of the present invention. In this embodiment, by inputting the 2N-bit digital signal to be transmitted as the initial value of the N-stage register of the two M-sequence generators constituting the N-stage Gold code generator,
It has the advantage that the amount of information to be transmitted can be approximately twice as much as when using the transmitter of the embodiment shown in FIG. A transmission signal sequence is input from a terminal 200, and a clock source 220 of the transmission signal is input.
The signals are sequentially input to a six-stage shift register 210 driven by the following. The contents of the shift register 210 are the transmission signal 6
After the bits are stored in the shift register 210, the bits are divided into 3 bits I~ and each generates an M sequence. A 4-stage shift register 211 and a 4-stage shift register 2
The counter 230 is the initial value from the first stage to the third stage of 12.
are input in parallel based on the signals from. The shift register 211 and the exclusive OR 231, and the shift register 212 and the exclusive OR 232 respectively
This constitutes a stage M-sequence generator. These two M-sequence generators are connected in advance so as to generate M-sequences with different generating polynomials, and are driven by a clock source 221. The oscillation frequency of the clock source 221 is 876 times that of the clock source 220. Also counter 23
0 is a set signal that sets 1 in the fourth register of register 211 and register 212, and inputs the contents of register 210 to the remaining three registers every time eight clock signals from clock source 221 are counted. The register 211 and the register 212 are driven by the clock source 221, and following the first "1", generate M sequences with mutually different generating polynomials, and perform exclusive OR 23.
Output to 3. The period of the 3rd stage M sequence is 7, and the first “
1", the code word length becomes 8, so the register 21
1 and register 212, the initial value is set to register 210.
Each time the code word is loaded from , one period's worth of code words are output. 1'' output from the register 211 and the register 212, and M for one period with different generating polynomials.
The series is subjected to modulo-2 addition by exclusive OR 233 and output as a spreading code. The level converter 234 converts the spreading code output from the exclusive OR 233 into a voltage corresponding to "1" when it is "1", and into "-1" when it is "0".
After being converted into a voltage corresponding to ``, it is multiplied by the carrier signal from the oscillator 222 in the multiplier 235, subjected to two-phase phase modulation, and outputted from the output terminal 201. In this way, the voltage is generated from different initial values. The cross-correlation between codes of different Gold codes is guaranteed not to exceed 2(N+11/2 (N is odd) or 2(N+21/2 (N is even)).

In the embodiment described above, a code word containing a gold code of one period was used as a transmission signal, but in the communication system of the present invention, a code word consisting of a gold code of one period or more can also be used as a transmission signal. be.

(Effects of the Invention) As described above, if the transmitter of the present invention is used, it is possible to use the spectrum 1 to ram spread communication methods, which have a larger amount of transmitted information than conventional spread spectrum methods, and which are of high quality and easy to configure. can be provided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the transmitter of the present invention, FIG. 2 is a diagram for explaining the present invention in detail, and FIG. 3 is a second embodiment of the transmitter of the present invention. FIG. 4 is a block diagram showing a communication system using a transmitter of the present invention. In the figure, 10 is a three-stage shift register, 11.12 is a four-stage shift register, 20.21 is a clock source, 22 is an oscillator, 31, 32, and 33 are exclusive OR circuits, 35 is a multiplier, and 210 is a 6-stage shift register. stage shift register, 211.212 is a 4 stage shift register, 220.221 is a clock source, 222
is an oscillator, 231.232.233 is an exclusive OR circuit, 235"'++- Figure 1 10.11, 12 Shift register 31.32, 33., exclusive OR circuit 20.21
Clock source 22 °° oscillator 35... Multiplier Fig. 2 Fig. 3 210.211.212 Shift register 231,
232, 233 exclusive OR circuit 235
- Multiplier 220, 221 - Clock source 222
Oscillator diagram 4

Claims (1)

[Claims] 1. A spread spectrum signal transmitter comprising the following (a) to (e). (a) an N-stage shift register to which a transmission digital signal is supplied; (b) a first N-stage M-sequence generator whose initial value is the contents of the N-stage shift register; and a second N-stage M-sequence generator whose initial value is constant. N
an N-stage gold code generator comprising a stage M-sequence generator and an exclusive OR to which the outputs of the first and second N-stage M-sequence generators are supplied; (c) the N-stage gold code generation; (d) a level converter that converts the voltage of the output of the encoder; (e) modulation for the output of the level converter; A modulator that performs 2. A spread spectrum signal transmitter comprising the following (a) to (e). (a) a 2N-stage shift register to which a transmission digital signal is supplied; (b) first and second N-stage M-sequence generators whose initial values are the contents of the 2N-stage shift register;
(c) an N-stage gold code generator consisting of an exclusive OR to which the output of the N-stage M-sequence generator is supplied; (c) one or more chips identical to the M period output of the N-stage gold code generator; an encoder that adds a pattern; (d) a level converter that converts the voltage of the output of the encoder; and (e) a modulator that modulates the output of the level converter.