JP2577987B2 - Pseudo random noise code generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to pseudorandom noise used in applications requiring a code division multiplexed signal such as spread spectrum communication (hereinafter abbreviated as SSC in the present specification). It relates to a code generator.

[Summary of the Invention] In a GOLD code obtained by adding a plurality of m-sequence codes by mod.2, by using the property that different patterns can be obtained by changing the phase difference of the underlying m-sequence code, one part A pseudo random noise code generator that controls the pattern of the generated code by fixing the initial state of the m-sequence code and externally giving the initial values of the other m-sequence codes.

[Prior Art] In applications requiring a code division multiplexed signal such as SSC, a pseudo random noise code generator (hereinafter abbreviated as a code generator in the present specification) can change an output code pattern. Is required. Conventionally, a circuit configuration as shown in FIG. 4 has been used as a code generator capable of generating an arbitrary m-sequence code by external control of a code period, a code pattern, and a code phase.

In Figure 4, SR ₁ ~SR _n-1 and SR _f flip-flops, E ₁ to E _n is the exclusive OR gates, so-called modular type shift register is constituted by both. Also,
MUX1 multiplexer to control the number of the modular shift register, AN ₂ ~AN _n denotes an AND gate for specifying the presence or absence of the feedback signal to each stage from the last stage output of the modular shift register, DS ₁ to DS _n Is a data select circuit for setting an initial value of the modular shift register. That is, the data c ₁ to c _i performs addressing of MUX1, to determine the number of modular type shift register, the period of the code, also by the data a ₂ ~a _n from the last stage of the modular shift register each stage The signal feedback state is determined, the code pattern is determined, and the initial value of the modular shift register is determined by the data b _{1 to} b _n , and the phase of the code can be independently controlled. A code can be generated. The three code data necessary for controlling this code are shared by a common data line DA to reduce the number of input terminals.
The signals are input in a time sharing manner from T1 to Tn. LAT1, LAT3 and LAT4
Code pattern data a respective ₂ ~a _n, code phase data
A latch circuit for inputting and holding b _{1 to} b _n and code cycle data c _{1 to} c _i , and DEC1 is a decoder circuit for selecting a latch circuit for writing data using 2-bit signals SEL0 and SEL1 It is. Since the output of the decoder circuit becomes active only when the latch enable signal LE is at "H" level, the timing of writing data to the latch circuit can be controlled by the latch enable signal. After setting the code data, the output of a new code is started by the STB signal, but the code pattern data and code cycle data are double-structured by LAT2 and LAT5 so that the code does not switch during the setting of the code data. Is held in the latch circuit. CLK is a clock signal input terminal, CODE
Is a sign output terminal.

By the way, in code division multiplex communication, signal concealment,
For the purpose of preventing interference and increasing the number of channels, a GOLD code in which the pattern of the same-period code is much larger than that of the m-sequence code is often used. The GOLD code is a code obtained by adding a plurality of m-sequence codes having the same period and different patterns by mod.2. From the r m-sequence code generators having an n-stage configuration, (2 ⁿ -1) · ( It is known that r-1) kinds of patterns can be obtained. GOLD using a conventional code generator
FIG. 5 shows a circuit configuration for obtaining the code. In FIG.
PNG1 and PNG2 are code generators having the configuration shown in FIG. 4, E1 is an exclusive OR gate for performing addition of mod.2, and FF1 is connected to E1 due to the difference in delay time between PNG1 and PNG2. This is a flip-flop provided to remove a generated hazard and obtain a code output synchronized with a clock. By changing the phase difference between two m-sequence codes having a period of 2 ⁿ −1, 2 ⁿ −1 kinds of GOLD codes can be obtained.
In the circuit shown in the figure, more kinds of GOLD codes can be obtained by changing the pattern of the m-sequence code.

[Problems to be Solved by the Invention] As described above, the conventional code generator can cope with the generation of various kinds of codes, but has the following drawbacks in consideration of practical use.

(1) Each time a channel is selected, that is, a code is set, three code data of a code period, a code pattern, and a code phase must be given to a plurality of code generators.

(2) Code data necessary for setting a desired channel, that is, a desired code, must be obtained in advance by analysis or the like.

Therefore, it is very difficult for a user who does not know how to configure the code generator to use the code generator.

[Object of the Invention] An object of the present invention is to provide a pseudo-random noise code generator which does not require a user to analyze code data and has a simple code setting method.

[Means for Solving the Problems] In order to achieve the above object, a code generator according to the present invention comprises first and second m-sequence code generators comprising a predetermined number of stages of modular or simple shift registers; First code pattern data supply means for supplying predetermined first code pattern data to the shift register of the first m-sequence code generator; and the first code in the shift register of the second m-sequence code generator. A second code pattern data supply unit for supplying predetermined second code pattern data different from the pattern data, and a first initial state for setting a predetermined initial state in a shift register of the first m-sequence code generator Setting means;
Second initial state setting means for setting an initial state in the shift register of the second m-sequence code generator according to the code phase data, and first and second signals from the first and second m-sequence code generators And a GOLD code generating means for generating a GOLD code by adding the m-sequence code of the above with mod.2.

[Operation] In the conventional method shown in FIG. 4, since three code data of the code period, the code pattern and the code phase can be controlled independently of each other, it is possible to cope with the generation of various kinds of codes. There was a disadvantage that the setting method became complicated. Therefore, in the present invention, the period of the generated code is fixed, and the target is
By narrowing down to GOLD codes, the code setting method is simplified.

EXAMPLES Hereinafter, the present invention will be described in more detail using examples with reference to the drawings. However, they are merely examples, and various modifications and improvements can be made without departing from the scope of the present invention. Of course, this is possible.

FIG. 1 shows a configuration example of a code generator according to the present invention. In FIG. 1, MSRG1 and MSRG2 are modular shift register circuits, and a specific example of the circuit is shown in FIG. 2. The difference from the modular shift register section in FIG. 4 is that the number of stages is fixed to n. That is the point. Further, E1 is exclusive OR gate for summing the two m-sequence code in Mod.2, but FF1 is a flip-flop which is provided to remove the hazard, SR _n terminal modular shift register circuit Is a signal obtained by extracting the input signal to the flip-flop of the n-th stage, so that a GOLD code having exactly the same phase as the m-sequence code output from CODE1 and CODE2 is obtained at the GOLD terminal. PTN1 and PTN2 in FIG.
A memory circuit that stores the code pattern data of RG1 and MSRG2, and LAT1 is a latch circuit that inputs and holds the code phase data of MSRG2 from outside. Also, TRS1, TRS
2 and TRS3 are bits for enabling the generation of two mirror image-related codes from the same code data described in Patent Application 3 “Pseudorandom Noise Code Generator” filed on the same date by the present applicant. This is an inversion circuit, and a specific example of the circuit is as shown in FIG.

 The operation of the above embodiment will be described below.

It is known that 2 ⁿ -1 GOLD codes can be obtained from two m-sequence codes having a period of 2 ⁿ -1 by changing the phase difference therebetween (RCDixon, Spread Spectrum Systems,
pp. 53-92, John Wiley & Sons (1984)). Therefore, in the method of the present invention, the number of stages of two MSRGs and the code pattern data are fixed, and only the code phase data is externally set. In FIG. 1, the initial state of MSRG1 is all "H".
Since the level is fixed, the phase difference between the two m-sequence codes can be changed by changing the initial state of MSRG2. The possible states of the n-stage modular shift register are all n-bit binary values excluding all 0s. That is, the code data provided from the outside is 1 to
It can be seen that there are 2 ⁿ -1 (decimal) 2 ⁿ -1 types, and different GOLD code outputs can be obtained for each. Therefore, the user can obtain 1-2 ⁿ −1 (1) corresponding to the initial state of MSRG2.
By allocating (zero-based) code data as a channel number, a code can be set only by designating the channel number without knowing the configuration of the code generator as in the conventional method.

Further, since the circuit of FIG. 2 has a built-in bit inversion circuit, the same channel number is designated for transmission / reception even in an SSC using a mirror image code for transmission / reception, such as the convolver system, and the T / signal is used. Communication can be easily performed by switching between transmission and reception. Also, PTN1, P in FIG.
If a RAM, an EPROM, or a latch circuit is used as the TN2 memory circuit and code pattern data can be rewritten, the number of channels can be expanded.

As described above, in the present specification, a code generator having a modular shift register configuration is taken as an example, but it is needless to say that a code generator having a simple shift register configuration is applicable.

[Effects of the Invention] As described above, according to the present invention, the channel selection, that is, the code setting method is simplified, and the channel number can be directly used as the code data. Can be

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a pseudo-random noise code generator according to the present invention, and FIGS. 2 and 3 are circuit configuration diagrams of a modular shift register circuit and a bit inversion circuit, respectively.
FIG. 4 is a circuit diagram of a conventional pseudo-random noise code generator, and FIG. 5 is a circuit diagram of a GOLD signal generation circuit using a conventional pseudo-random noise code generator.

Claims (1)

(57) [Claims] 1. A first and second m-sequence code generator comprising a predetermined number of stages of modular or simple type shift registers, and a first first and second m-sequence code generator having a predetermined first shift register.
A first code pattern data supply unit for supplying the second code pattern data, and a predetermined second code pattern data different from the first code pattern data to a shift register of a second m-sequence code generator. A second code pattern data supply means, and a first first predetermined m-sequence code generator,
A first initial state setting means for setting an initial state of the second m-sequence code generator; a second initial state setting means for setting an initial state according to the code phase data in a shift register of the second m-sequence code generator; GOLD that generates a GOLD code by adding the first and second m-sequence codes from the second m-sequence code generator with mod.2
A pseudo random noise code generator comprising: code generation means.